a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting T
c. I
SD
d. 1.6 mm from case.
= 25 °C, L = 15 mH, RG = 25 Ω, IAS = 11 A (see fig. 12).
J
≤ 11 A, dI/dt ≤ 126 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91241www.vishay.com
S-Pending-Rev. A, 26-Jun-08
WORK-IN-PROGRESS
600
11
920mJ
11A
18mJ
180W
- 55 to + 150
d
10lbf · in
1.1N · m
V
AT
°C
1
Page 2
IRFPC50A, SiHFPC50A
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOLTYP.MAX.UNIT
Maximum Junction-to-AmbientR
Case-to-Sink, Flat, Greased Surface
Maximum Junction-to-Case (Drain)
thJA
R
thCS
R
thJC
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER SYMBOLTEST CONDITIONS MIN.TYP.MAX.UNIT
Static
Drain-Source Breakdown Voltage V
Temperature Coefficient
V
DS
Gate-Source Threshold Voltage V
Gate-Source Leakage I
Zero Gate Voltage Drain Current I
Drain-Source On-State Resistance R
Forward Transconductance g
Dynamic
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Output Capacitance C
Effective Output Capacitance C
Total Gate Charge Q
Gate-Drain ChargeQ
Turn-On Delay Time t
Rise Timet
Turn-Off Delay Time t
Fall Time t
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current I
Pulsed Diode Forward Current
a
Body Diode VoltageV
Body Diode Reverse Recovery Timet
Body Diode Reverse Recovery ChargeQ
Forward Turn-On Timet
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
c. C
eff. is a fixed capacitance that gives the same charging time as C
oss
DS
ΔV
DS/TJ
GS(th)
V
GSS
DSS
VGS = 10 VID = 6.0 A
DS(on)
fs
iss
-270-
oss
-9.7-
rss
oss
eff.VDS = 0 V to 480 V
oss
g
--19
gs
--28
gd
d(on)
r
-33-
d(off)
-29-
f
S
I
SM
SD
rr
rr
on
V
V
V
MOSFET symbol
showing the
integral reverse
p - n junction diode
-40
0.24-
°C/W
-0.65
VGS = 0 V, ID = 250 µA 600--V
Reference to 25 °C, I
= 1 mA
D
-0.65-
VDS = VGS, ID = 250 µA 2.0-4.0V
= ± 30 V--± 100nA
GS
VDS = 600 V, VGS = 0 V --25
= 480 V, VGS = 0 V, TJ = 125 °C --250
DS
VDS = 50 V, ID = 6.0 A
VGS = 0 V,
V
DS
f = 1.0 MHz, see fig. 5
V
GS
= 0 V
V
DS
= 25 V,
= 1.0 V, f = 1.0 MHz-2830-
DS
= 480 V, f = 1.0 MHz-74-
b
b
--0.58Ω
7.7--S
-2100-
c
-81-
--70
= 11 A, VDS = 480 V
I
= 10 V
GS
D
see fig. 6 and 13
b
-15-
= 300 V, ID = 11 A
V
DD
R
= 6.2 Ω, RD= 30 Ω
G
see fig. 10
b
G
TJ = 25 °C, IS = 11 A, VGS = 0 V
TJ = 25 °C, IF = 11 A,
dI/dt = 100 A/µs
b
D
S
b
-40-
--11
--44
--1.4V
-500740ns
-4.06.0µC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
while VDS is rising from 0 to 80 % VDS.
oss
V/°C
µA
pF
nC Gate-Source Charge Q
ns
A
www.vishay.comDocument Number: 91241
2S-Pending-Rev. A, 26-Jun-08
Page 3
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
100
10
1
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
4.5V
100
10
IRFPC50A, SiHFPC50A
Vishay Siliconix
°
T = 150 C
J
°
T = 25 C
J
D
I , Drain-to-Source Current (A)
20μs PULSE WIDTH
°
T = 25 C
0.1
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
J
Fig. 1 - Typical Output Characteristics
100
10
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
4.5V
D
I , Drain-to-Source Current (A)
20μs PULSE WIDTH
°
T = 150 C
1
1 10 100
V , Drain- to-Source Volt age ( V)
DS
J
Fig. 2 - Typical Output Characteristics
D
I , Drain-to-Source Current (A)
100V
V = 50V
DS
1
4.05.06.07.08.09.0
V , Gate-to-Source Voltage (V)
GS
20μs PULSE WIDTH
Fig. 3 - Typical Transfer Characteristics
3.0
2.5
2.0
1.5
(Normalized)
1.0
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
13A
I =
D
V=
10V
GS
-60 -40 -20 0 20 40 60 80 100 120 140 160
T , Junction Temperature ( C)
J
°
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91241www.vishay.com
S-Pending-Rev. A, 26-Jun-083
Page 4
IRFPC50A, SiHFPC50A
Vishay Siliconix
100000
10000
1000
100
V = 0V, f = 1MHz
GS
C = C + C , C SHORTED
iss gs gd ds
C = C
rss gd
C = C + C
oss ds gd
C
iss
C
oss
C, Capacitance (pF)
10
1
1101001000
V , Drain-to-Source Voltage (V)
DS
C
rss
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
20
I =
13A
D
V= 480V
DS
V= 300V
16
DS
V= 120V
DS
100
10
1
SD
I , Reverse Drain Current (A)
0.1
0.20.40.60.81.01.21.41.6
°
T = 150 C
J
T = 25 C
J
V ,Source-to-Drain Voltage (V)
SD
°
V = 0 V
GS
Fig. 7 - Typical Source-Drain Diode Forward Voltage
1000
OPERATION IN THIS AREA LIMITED
100
BY R
DS(on)
12
8
4
GS
V , Gate-to-Source Voltage (V)
FOR TEST CIRCUIT
0
020406080
Q , Total Gate Charge (nC)
G
SEE FIGURE
13
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
10us
10
D
I , Drain Current (A)I , Drain Current (A)
1
°
= 25 C
C
T T= 150 C
Single Pulse
0.1
10 100 1000 1000
°
J
V , Drain-to-Source Voltage (V)
DS
100us
1ms
10ms
Fig. 8 - Maximum Safe Operating Area
www.vishay.comDocument Number: 91241
4S-Pending-Rev. A, 26-Jun-08
Page 5
IRFPC50A, SiHFPC50A
A
Vishay Siliconix
R
D.U.T.
D
+
V
-
DD
V
12
10
R
DS
V
GS
G
8
6
4
D
I , Drain Current (A)
2
0
255075100125150
T , Case Temperature ( C)
C
°
Fig. 9 - Maximum Drain Current vs. Case Temperature
1
D = 0.50
thJC
(Z )
0.01
0.1
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
Thermal Response
0.001
0.000010.00010.0010.010.1 1
t , Rectangular Pulse Duration (sec)
1
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
V
DS
90 %
10 %
V
GS
t
d(on)tr
t
d(off)tf
Fig. 10b - Switching Time Waveforms
P
DM
t
1
t
2
Notes:
1. Duty factor D = t / t
2. Peak T = Px Z+ T
1 2
JDMthJCC
V
DS
15 V
Driver
+
V
-
R
V
G
20 V
DS
t
L
D.U.T
I
AS
0.01
p
Ω
Fig. 12a - Unclamped Inductive Test Circuit
A
DD
I
AS
Fig. 12b - Unclamped Inductive Waveforms
t
p
Document Number: 91241www.vishay.com
S-Pending-Rev. A, 26-Jun-085
Page 6
IRFPC50A, SiHFPC50A
Vishay Siliconix
2000
TOP
I
D
4.9A
7.0A
1600
1200
800
400
AS
E , Single Pulse Avalanche Energy (mJ)
0
255075100125150
Starting T , Junction Temperature ( C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
730
720
710
700
690
680
J
BOTTOM
11A
°
Q
G
10 V
Q
GS
V
G
Q
GD
Charge
Fig. 13a - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
50 kΩ
12 V
0.2 µF
V
GS
0.3 µF
D.U.T.
3 mA
I
Current sampling resistors
G
I
D
Fig. 13b - Gate Charge Test Circuit
+
V
DS
-
670
DSav
V , Avalanche Voltage (V)
660
650
012345678910111213
I , Avalanche Current (A)
av
Fig. 12d - Typical Drain-to-Source Voltage vs.
Avalanche Current
www.vishay.comDocument Number: 91241
6S-Pending-Rev. A, 26-Jun-08
Page 7
IRFPC50A, SiHFPC50A
Peak Diode Recovery dV/dt Test Circuit
Vishay Siliconix
D.U.T
+
-
R
G
Driver gate drive
P.W.
+
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
-
• dV/dt controlled by R
• Driver same type as D.U.T.
• I
controlled by duty factor "D"
SD
• D.U.T. - device under test
Period
-
D =
G
P. W.
Period
+
+
V
DD
-
= 10 V*
V
GS
waveform
SD
Body diode forward
current
waveform
DS
Body diode forward drop
Ripple ≤ 5 %
= 5 V for logic level devices
GS
Diode recovery
dV/dt
dI/dt
V
DD
I
SD
Reverse
recovery
current
Re-applied
voltage
D.U.T. I
D.U.T. V
Inductor current
*V
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?91241.
Document Number: 91241www.vishay.com
S-Pending-Rev. A, 26-Jun-087
Page 8
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
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therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
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