Datasheet IRFP9240 Datasheet (Intersil)

IRFP9240

Data Sheet July 1999

12A, 200V, 0.500 Ohm, P-Channel Power
MOSFET

This P-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanchemodeofoperation.Allof
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.

Formerly developmental type TA17522.

Ordering Information

PART NUMBER PACKAGE BRAND

IRFP9240 TO-247 IRFP9240

NOTE: When ordering, use the entire part number.

File Number

Features

• 12A, 200V

DS(ON)

= 0.500Ω

•r

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

Symbol

D

G

S

2294.3

Packaging

JEDEC STYLE TO-247

SOURCE

DRAIN

GATE

DRAIN
(TAB)

4-71

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

IRFP9240

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

IRFP9240 UNITS

Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DGR

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

TC = 125oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P

DS

D
D

DM

GS

D

-200 V

-200 V

-12

-7.5

-48 A
±20 V
150 W

A
A

Linear Derating Factor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 W/oC

Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ,T

AS

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

790 mJ

-55 to 150

300
260

o

C

o

C

o

C

NOTE:

1. TJ = 25oC to 125oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate Threshold Voltage V

GS(TH)VGS

Zero Gate Voltage Drain Current I

On-State Drain Current (Note 2) I

D(ON)VDS

Gate to Source Leakage Current I
Drain to Source On Resistance (Note 2) r

DS(ON)ID

Forward Transconductance (Note 2) g
Turn-On Delay Time t

d(ON)VDD

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Total Gate Charge

Q

g(TOT)VGS

(Gate to Source + Gate to Drain)
Gate to Source Charge Q
Gate to Drain “Miller” Charge Q
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Internal Drain Inductance L

Internal Source Inductance L

Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R

DSSID

DSS

GSS

fs

r

f

gs
gd

ISS
OSS
RSS

D

S

θJC

θJA

= -250µA, VGS = 0V (Figure 10) -200 - - V

= VDS, ID = -250µA -2.0 - -4.0 V
VDS = Rated BV
VDS = 0.8 x Rated BV

> I

D(ON)

, VGS = 0V - - 25 µA

DSS

, VGS = 0V, TJ = 125oC - - 250 µA

DSS

x r

DS(ON)MAX

, VGS = -10V -12 - - A

VGS = ±20V - - ±100 nA

= -6.3A, VGS = -10V (Figures 8, 9) - 0.380 0.500 Ω

VDS≤ -50V, ID = -6.3A (Figure 12) 3.8 5.7 - S

= -100V, ID≈ -12A, RG = 9.1Ω,
VGS = -10V, RL = 7.6Ω, (Figures 17, 18)
MOSFET Switching Times are Essentially Indepen­dent of Operating Temperature

-1822ns

-4568ns

-7590ns

-2944ns

= -10V, ID = -12A, VDS = 0.8 x Rated BV
I

= -1.5mA (Figures 14, 19, 20)

g(REF)

DSS

Gate Charge is Essentially Independent of Operat­ing Temperature

-3857nC

-8-nC

-21-nC

VDS = -25V, VGS = 0V, f = 1MHz
(Figure 11)

- 1400 - pF

- 350 - pF

- 140 - pF

Measured From the Con­tact Screw on Header
Closerto Source and Gate
Pins to Center of Die

Measured From the
Source Pin, 6mm (0.25in)
From Header to Source
Bonding Pad

Modified MOSFET
Symbol Showing the
Internal Devices
Inductances

D

L

D

G

L

S

S

- 5.0 - nH

- 12.5 - nH

- - 0.83oC/W

Free Air Operation - - 30

o

C/W

4-72

IRFP9240

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current I
Pulse Source to Drain Current

SD

I

SDM

(Note 3)

Source to Drain Diode Voltage (Note 2) V
Reverse Recovery Time t
Reverse Recovery Charge Q

NOTES:

2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD= 50V, starting TJ= 25oC, L = 8.2mH, RG= 50Ω, peak IAS= 12A (Figures 15, 16).

Modified MOSFET Symbol
Showing the Integral Re-

D

verse P-N Junction Rectifier

G

S

TJ = 25oC, ISD = -12A, VGS = 0V, (Figure 13) - - -1.5 V

SD

TJ = 25oC, ISD = -11A, dISD/dt = 100A/µs - 210 - ns

rr

TJ = 25oC, ISD = -11A, dISD/dt = 100A/µs - 2.0 - µC

RR

- - -12 A

- - -48 A

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0.0
0 25 50 75 100 150

TC, CASE TEMPERATURE (oC)

Unless Otherwise Specified

125

FIGURE 1. NORMALIZED POWERDISSIPATION vs CASE

TEMPERATURE

2
1

0.5

15

12

9

6

, DRAIN CURRENT (A)

D

I

3

0

25 75 125

50 100

TC, CASE TEMPERATURE (oC)

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

150

0.2

0.1

0.1

0.05

0.02

-2

10

THERMAL IMPEDANCE

-3

10

0.01

-5

10

, NORMALIZED

θJC

Z

SINGLE PULSE

4-73

-4

10

-3

10

t1, RECTANGULAR PULSE DURATION (S)

-2

10

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

P

DM

t

1

t

2

NOTES:
DUTY FACTOR: D = t
PEAK TJ = PDM x Z

0.1 1 10

θJC

1/t2

x R

θJC

+ T

C

IRFP9240

Typical Performance Curves

3

-10

2

-10

-10
OPERATION IN THIS

AREA IS LIMITED
BY r

, DRAIN CURRENT (A)

-1

D

I

TJ = MAX RATED
SINGLE PULSE

-0.1

-1 -10

DS(ON)

VDS, DRAIN TO SOURCE VOLTAGE (V)

Unless Otherwise Specified (Continued)

10µs

100µs

1ms

10ms

, DRAIN CURRENT (A)
I

-10

DC

2

-10

3

20

16

12

8

D

4

0

020406080

VGS = -10V

VGS = -8V

VDS, DRAIN TO SOURCE VOLTAGE (V)

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

20

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

16

12

VGS = -10V

VGS = -8V

VGS = -7V

2

-10

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

≤ -50V

V

DS

-10

VGS = -7V

VGS = -6V

VGS = -5V

VGS = -4V

100

8

, DRAIN CURRENT (A)

D

I

4

0

0

2
VDS, DRAIN TO SOURCE VOLTAGE (V)

46 10

VGS = -6V

VGS = -5V

VGS = -4V

8

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

5

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

4

3

VGS= -10V

2

, DRAIN TO SOURCE

ON RESISTANCE (Ω)

1

DS(ON)

r

0

0

-10

-20

ID, DRAIN CURRENT (A)

VGS= -20V

-30 -40

NOTE: Heating effect of 2µs pulse is minimal.

FIGURE 8. DRAIN TO SOURCE ON RESISTANCEvs GATE

VOLTAGE AND DRAIN CURRENT

-50

TJ = 25oCTJ = 150oC

-1.0

, DRAIN CURRENT (A)

D

I

-0.1
0

3.0

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

= -10V, ID = -6.3A

V

GS

2.4

1.8

1.2

ON RESISTANCE

0.6

NORMALIZED DRAIN TO SOURCE

0

-40 0 40

V

GS

T

J

-4 -6 -8 -10-2

, GATE TO SOURCE VOLTAGE (V)

80

, JUNCTION TEMPERATURE (oC)

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

120

160

4-74

IRFP9240

Typical Performance Curves

1.25
ID = 250µA

1.15

1.05

0.95

BREAKDOWN VOLTAGE

0.85

NORMALIZED DRAIN TO SOURCE

0.75

-40 0 40
T

, JUNCTION TEMPERATURE (oC)

J

Unless Otherwise Specified (Continued)

80 120 160

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

10

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDS ≤ -50V

8

6

4

2

, TRANSCONDUCTANCE (S)

fs

g

0

0 -4 -8 -12 -16

ID, DRAIN CURRENT (A)

TJ = 25oC

TJ = 150oC

-20

3000

VGS= 0V, f = 1MHz
C

= CGS + C

ISS

C

= C

RSS

2400

C

≈ CDS+ C

OSS

1800

1200

C, CAPACITANCE (nF)

600

0

-1 -2 -5 -10 -2 -5

GD

GD

GD

C

ISS

C

OSS

C

RSS

VDS, DRAIN TO SOURCE VOLTAGE (V)

-10

FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

-100

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

TJ = 150oC

-10

-1.0

, DRAIN CURRENT (A)

SD

I

-0.1

-0.4
V

SD

-0.8 -1.4
, SOURCE TO DRAIN VOLTAGE (V)

TJ = 25oC

-1.0 -1.2 -1.6 -1.8-0.6

2

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

20

ID = -12A

16

12

8

, GATE TO SOURCE (V)

GS

4

V

0

0 122436 4860

Q

TOTAL GATE CHARGE (nC)

g(TOT),

VDS = -160V

VDS = -100V
VDS = -40V

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

4-75

IRFP9240

so

Test Circuits and Waveforms

V

DS

VARY t

TO OBTAIN

P

REQUIRED PEAK I

0V
V

GS

t

P

AS

L

R

G

-

V

DD

+

DUT

I

AS

0.01Ω

0

V

DD

I

AS

t

P

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

BV

t

AV

DSS

V

DS

DUT

R

V

GS

G

FIGURE 17. SWITCHING TIME TEST CIRCUIT

CURRENT

REGULATOR

12V

BATTERY

0.2µF

50kΩ

0.3µF

t

ON

t

d(ON)

t

R

L

-

V

DD

+

0

V

DS

V

GS

0

10%

r

10%

90%

50%

t

d(OFF)

t

OFF

50%

90%

t

f

10%

PULSE WIDTH

90%

FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

-V

DS

(ISOLATED
SUPPLY)

DUT

D

0

V

DS

Q

gs

Q

gd

V

GS

G

0

I

g(REF)

IG CURRENT

SAMPLING

RESISTOR RESISTOR

FIGURE 19. GATE CHARGE TEST CIRCUIT

4-76

S

CURRENT

I

D

SAMPLING

DUT

+V

DS

Q

g(TOT)

V

DD

0

I

g(REF)

FIGURE 20. GATE CHARGE WAVEFORMS

IRFP9240

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