Datasheet IRFP460 Datasheet (Philips)

Page 1
Philips Semiconductors Product specification
PowerMOS transistors IRFP460 Avalanche energy rated
FEATURES SYMBOL QUICK REFERENCE DATA
• Repetitive Avalanche Rated
• Fast switching V
d
= 500 V
DSS
• High thermal cycling performance I
• Low thermal resistance
g
s
R
DS(ON)
= 20 A
D
0.27
GENERAL DESCRIPTION PINNING SOT429 (TO247)
N-channel, enhancement mode PIN DESCRIPTION field-effect power transistor, intendedforuse in off-line switched 1 gate mode power supplies, T.V. and computer monitor power supplies, 2 drain d.c.tod.c.converters,motorcontrol circuits and general purpose 3 source switching applications.
The IRFP460 is supplied in the
tab drain
2
1
3
SOT429 (TO247) conventional leaded package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DSS
V
DGR
V
GS
I
D
I
DM
P
D
Tj, T
Drain-source voltage Tj = 25 ˚C to 150˚C - 500 V Drain-gate voltage Tj = 25 ˚C to 150˚C; RGS = 20 k - 500 V Gate-source voltage - ± 30 V Continuous drain current Tmb = 25 ˚C; VGS = 10 V - 20 A
Tmb = 100 ˚C; VGS = 10 V - 12.4 A Pulsed drain current Tmb = 25 ˚C - 80 A Total dissipation Tmb = 25 ˚C - 250 W Operating junction and - 55 150 ˚C
stg
storage temperature range
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
E
AS
E
AR
IAS, I
1 pulse width and repetition rate limited by Tj max.
September 1999 1 Rev 1.000
Non-repetitive avalanche Unclamped inductive load, IAS = 20 A; - 1300 mJ energy tp = 0.2 ms; Tj prior to avalanche = 25˚C;
VDD 50 V; RGS = 50 ; VGS = 10 V Repetitive avalanche energy1IAR = 20 A; tp = 2.5 µs; Tj prior to - 32 mJ
avalanche = 25˚C; RGS = 50 ; VGS = 10 V Repetitive and non-repetitive - 20 A
AR
avalanche current
Page 2
Philips Semiconductors Product specification
PowerMOS transistors IRFP460 Avalanche energy rated
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
R
th j-mb
R
th j-a
ELECTRICAL CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
V
(BR)DSS
T
j
R
DS(ON)
V
GS(TO)
g
fs
I
DSS
I
GSS
Q
g(tot)
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
d
L
d
L
s
C
iss
C
oss
C
rss
Thermal resistance junction - - 0.5 K/W to mounting base Thermal resistance junction SOT429 package, in free air - 45 - K/W to ambient
Drain-source breakdown VGS = 0 V; ID = 0.25 mA 500 - - V voltage
/ Drain-source breakdown VDS = VGS; ID = 0.25 mA - 0.1 - %/K
voltage temperature coefficient Drain-source on resistance VGS = 10 V; ID = 10 A - 0.2 0.27 Gate threshold voltage VDS = VGS; ID = 0.25 mA 2.0 3.0 4.0 V Forward transconductance VDS = 30 V; ID = 10 A 13 18 - S Drain-source leakage current VDS = 500 V; VGS = 0 V - 2 50 µA
VDS = 400 V; VGS = 0 V; Tj = 125 ˚C - 100 1000 µA Gate-source leakage current VGS = ±30 V; VDS = 0 V - 10 200 nA
Total gate charge ID = 20 A; V Gate-source charge - 12 18 nC
= 400 V; VGS = 10 V - 147 190 nC
DD
Gate-drain (Miller) charge - 78 100 nC Turn-on delay time VDD = 250 V; RD = 12 ; - 23 - ns
Turn-on rise time RG = 3.9 -72-ns Turn-off delay time - 150 - ns Turn-off fall time - 75 - ns
Internal drain inductance Measured from tab to centre of die - 3.5 - nH Internal drain inductance Measured from drain lead to centre of die - 4.5 - nH Internal source inductance Measured from source lead to source - 7.5 - nH
bond pad Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 3000 - pF
Output capacitance - 480 - pF Feedback capacitance - 270 - pF
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
S
I
SM
V
SD
t
rr
Q
rr
September 1999 2 Rev 1.000
Continuous source current Tmb = 25˚C - - 20 A (body diode) Pulsed source current (body Tmb = 25˚C - - 80 A diode) Diode forward voltage IS = 20 A; VGS = 0 V - - 1.5 V
Reverse recovery time IS = 20 A; VGS = 0 V; dI/dt = 100 A/µs - 900 - ns Reverse recovery charge - 15 - µC
Page 3
Philips Semiconductors Product specification
PowerMOS transistors IRFP460 Avalanche energy rated
PD%
120 110 100
90 80 70 60 50 40 30 20 10
0
0 20 40 60 80 100 120 140
Normalised Power Derating
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅PD/P
ID%
120 110 100
90 80 70 60 50 40 30 20 10
0
0 20 40 60 80 100 120 140
Tmb / C
= f(Tmb)
D 25 ˚C
Normalised Current Derating
Fig.2. Normalised continuous drain current.
ID% = 100⋅ID/I
= f(Tmb); conditions: VGS ≥ 10 V
D 25 ˚C
P
D
PHW20N50E
D = tp/T
tp
T
Zth j-mb (K/W)
1
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
single pulse
0.001 1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01
Pulse width, tp (s)
Fig.4. Transient thermal impedance.
Z
= f(t); parameter D = tp/T
th j-mb
Drain Current, ID (A)
20
Tj = 25 C
18 16 14 12 10
8 6 4 2 0
012345
Drain-Source Voltage, VDS (V)
Fig.5. Typical output characteristics
ID = f(VDS); parameter V
PHW20N50E
VGS = 10 V
8 V
5 V
4.8 V
4.6 V
4.4 V
4.2 V 4 V
.
GS
Peak Pulsed Drain Current, IDM (A)
100
10
RDS(on) = VDS/ ID
1
0.1 10 100 1000
Drain-Source Voltage, VDS (V)
d.c.
PHW20N50E
tp = 10 us
100us
1 ms
10 ms
100 ms
Fig.3. Safe operating area. Tmb = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter t
Drain-Source On Resistance, RDS(on) (Ohms)
0.5 4V
4.2V
0.45
0.4
0.35
0.3
0.25
0.2
0 2 4 6 8 101214161820
4.6 V
4.4 V
4.8V
Drain Current, ID (A)
5V
Fig.6. Typical on-state resistance
R
p
= f(ID); parameter V
DS(ON)
PHW20N50E
Tj = 25 C
VGS = 6 V
10V
.
GS
September 1999 3 Rev 1.000
Page 4
Philips Semiconductors Product specification
PowerMOS transistors IRFP460 Avalanche energy rated
Drain current, ID (A)
30
VDS > ID X RDS(ON)
25
20
15
10
5
0
012345678
Gate-source voltage, VGS (V)
150 C
PHW20N50E
Tj = 25 C
Fig.7. Typical transfer characteristics.
ID = f(VGS); parameter T
Transconductance, gfs (S)
20
VDS > ID X RDS(ON)
18 16 14 12 10
8 6 4 2 0
0 5 10 15 20 25 30
Drain current, ID (A)
Tj = 25 C
Fig.8. Typical transconductance
gfs = f(ID); parameter T
j
PHW20N50E
150 C
.
j
VGS(TO) / V
4
3
2
1
0
-60 -40 -20 0 20 40 60 80 100 120 140
max.
typ.
min.
Tj / C
Fig.10. Gate threshold voltage
V
= f(Tj); conditions: ID = 0.25 mA; VDS = V
GS(TO)
ID / A
1E-01
1E-02
1E-03
1E-04
1E-05
1E-06
0 1 2 3 4
SUB-THRESHOLD CONDUCTION
2 %
typ
VGS / V
Fig.11. Sub-threshold drain current.
ID = f(V
; conditions: Tj = 25 ˚C; VDS = V
GS)
.
GS
98 %
GS
a
2
1
0
-60 -40 -20 0 20 40 60 80 100 120 140
Fig.9. Normalised drain-source on-state resistance.
a = R
DS(ON)/RDS(ON)25 ˚C
Normalised RDS(ON) = f(Tj)
Tj / C
= f(Tj); ID = 10 A; VGS = 10 V
Capacitances, Ciss, Coss, Crss (pF)
10000
1000
100
0.1 1 10 100 Drain-Source Voltage, VDS (V)
Fig.12. Typical capacitances, C
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
PHW20N50E
, C
iss
oss
Ciss
Coss Crss
, C
rss
.
September 1999 4 Rev 1.000
Page 5
Philips Semiconductors Product specification
PowerMOS transistors IRFP460 Avalanche energy rated
Gate-source voltage, VGS (V)
15 14
ID = 20A
13
Tj = 25 C
12 11 10
9 8 7 6 5 4 3 2 1 0
0 25 50 75 100 125 150 175 200
Gate charge, QG (nC)
300V
200V
VDD = 400 V
PHW20N50E
Fig.13. Typical turn-on gate-charge characteristics.
V
= f(QG); parameter V
GS
Switching times, td(on), tr, td(off), tf (ns)
600
500
400
300
200
100
0
0 5 10 15 20 25 30
Gate resistance, RG (Ohms)
DS
PHW20N50E
td(off)
tr, tf
td(on)
Source-Drain Diode Current, IF (A)
50
VGS = 0 V
45 40 35 30 25 20 15 10
5 0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5
Drain-Source Voltage, VSDS (V)
150 C
PHW20N50E
Tj = 25 C
Fig.16. Source-Drain diode characteristic.
IF = f(V
Non-repetitive Avalanche current, IAS (A)
100
10
VDS
tp
ID
1 1E-06 1E-05 1E-04 1E-03 1E-02
); parameter T
SDS
Tj prior to avalanche = 25 C
125 C
PHW20N50E
Avalanche time, tp (s)
j
Fig.14. Typical switching times; t
d(on)
, tr, t
, tf = f(RG)
d(off)
Fig.17. Maximum permissible non-repetitive
avalanche current (IAS) versus avalanche time (tp);
unclamped inductive load
Normalised Drain-source breakdown voltage
1.15
V(BR)DSS @ Tj V(BR)DSS @ 25 C
1.1
1.05
1
0.95
0.9
0.85
-100 -50 0 50 100 150 Tj, Junction temperature (C)
Fig.15. Normalised drain-source breakdown voltage
V
(BR)DSS/V(BR)DSS 25 ˚C
= f(Tj)
;
Maximum Repetitive Avalanche Current, IAR (A)
100
10
1
0.1 1E-06 1E-05 1E-04 1E-03 1E-02
Avalanche time, tp (s)
Tj prior to avalanche = 25 C
125 C
PHW20N50E
Fig.18. Maximum permissible repetitive avalanche
current (IAR) versus avalanche time (tp)
September 1999 5 Rev 1.000
Page 6
Philips Semiconductors Product specification
PowerMOS transistors IRFP460 Avalanche energy rated
MECHANICAL DATA
Plastic single-ended through-hole package; heatsink mounted; 1 mounting hole; 3-lead TO-247 SOT429
α
E P
R
(1)
L
1
b
2
123
b
DIMENSIONS (mm are the original dimensions)
A
A
UNIT
mm
Note
1. Tinning of terminals are uncontrolled within zone L1.
1
1.9
5.3
1.7
4.7
OUTLINE VERSION
SOT429 TO-247
b
1
1.2
2.2
0.9
1.8
IEC JEDEC EIAJ
b
2
3.2
2.8
c
0.9
0.621201615
b 1
ee
DbE
REFERENCES
q
S
D
Y
L
w
M
0 10 20 mm
scale
L
16154.0
(1)
1
3.6
e
5.45
A
A
1
Q
3.7
2.6
3.3
5.3
2.4
c
7.5
3.5
7.1
3.3
EUROPEAN
PROJECTION
β
wSRqQPLY
15.7
0.4
15.3
ISSUE DATE
α
6° 4°
98-04-07 99-08-04
17° 13°
β
Fig.19. SOT429; pin 2 connected to mounting base
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide.
2. Refer to mounting instructions for SOT429 envelope.
3. Epoxy meets UL94 V0 at 1/8".
September 1999 6 Rev 1.000
Page 7
Philips Semiconductors Product specification
PowerMOS transistors IRFP460 Avalanche energy rated
DEFINITIONS
Data sheet status
Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1999
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
September 1999 7 Rev 1.000
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