Datasheet IRFP 4568 Datasheet

S

D

G

Applications

)

l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits

PD -96175

IRFP4568PbF

HEXFET® Power MOSFET

V

DSS

R

DS(on

typ.

max.

150V

4.8m

5.9m

: :

I

D

(Silicon Limited)

Benefits

l Improved Gate, Avalanche and Dynamic dV/dt

Ruggedness

l Fully Characterized Capacitance and Avalanche

SOA

l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free

GDS

Gate Drain Source

D

G

TO-247AC

IRFP4568PbF

S

D

Absolute Maximum Ratings

Symbol Parameter Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited)

I

@ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited)

D

I

DM

PD @TC = 25°C

V

GS

dv/dt T

J

T

STG

Pulsed Drain Current

Maximum Power Dissipation

Linear Derating Factor

Gate-to-Source Voltage

Peak Diode Recovery

Operating Junction and

Storage Temperature Range

Soldering Temperature, for 10 seconds

(1.6mm from case)

Mounting torque, 6-32 or M3 screw

c

e

Max.

171

121

684

517

3.45

± 30

18.5

-55 to + 175

300

10lbxin (1.1Nxm)

171

A

W

W/°C

V

V/ns

°C

Avalanche Characteristics

E

AS (Thermally limited)

I

AR

E

AR

Single Pulse Avalanche Energy

Avalanche Current

Repetitive Avalanche Energy

c

f

d

763

See Fig. 14, 15, 22a, 22b,

mJ

A

mJ

Thermal Resistance

Symbol Parameter Typ. Max. Units

R

θJC

R

θCS

R

θJA

www.irf.com 1

Junction-to-Case

Case-to-Sink, Flat Greased Surface

Junction-to-Ambient

j

ij

––– 0.29

0.24 –––

––– 40

°C/W

09/08/08

IRFP4568PbF

s

/

g

s

g

s

/

f

Static @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Unit

V

(BR)DSS

∆V

(BR)DSS

R

DS(on)

V

GS(th)

I

DSS

I

GSS

R

G

Dynamic @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Unit

fs Forward Transconductance 162 ––– ––– S

Q

g

Q

gs

Q

gd

Q

sync

t

d(on)

t

r

t

d(off)

t

f

C

iss

C

oss

C

rss

C

eff. (ER)

oss

C

eff. (TR)

oss

Drain-to-Source Breakdown Voltage 150 ––– ––– V

∆T

Breakdown Voltage Temp. Coefficient ––– 0.17 ––– V/°C

J

Static Drain-to-Source On-Resistance ––– 4.8 5.9 Gate Threshold Voltage 3.0 ––– 5.0 V Drain-to-Source Leakage Current ––– ––– 20

––– ––– 250 Gate-to-Source Forward Leakage ––– ––– 100 Gate-to-Source Reverse Leaka

e ––– ––– -100

Internal Gate Resistance ––– 1.0 –––

Total Gate Charge ––– 151 227 Gate-to-Source Charge ––– 52 ––– Gate-to-Drain ("Miller") Charge ––– 55 ––– Total Gate Charge Sync. (Qg - Qgd)

––– 96 ––– Turn-On Delay Time ––– 27 ––– Rise Time ––– 119 ––– Turn-Off Delay Time ––– 47 ––– Fall Time ––– 84 ––– Input Capacitance ––– 10470 ––– Output Capacitance ––– 977 ––– Reverse Transfer Capacitance ––– 203 –––

Effective Output Capacitance (Energy Related) Effective Output Capacitance (Time Related)

––– 897 –––

h

––– 1272 –––

g

Conditions

VGS = 0V, ID = 250µA Reference to 25°C, I

= 10V, ID = 103A

V

mΩ

GS

= VGS, ID = 250µA

V

DS

V

=150V, VGS = 0V

DS

µA

V

= 150V, VGS = 0V, TJ = 125°C

DS

= 20V

V

GS

nA

V

= -20V

GS

Ω

Conditions

VDS = 50V, ID = 103A I

= 103A

D

= 75V

V

DS

nC

ns

pF

= 10V

V

GS

= 103A, VDS =0V, VGS = 10V

I

D

V

DD

I

=103A

D

R

=1.0Ω

G

VGS = 10V V

GS

V

DS

f

= 98V

f

= 0V

= 50V ƒ = 1.0MHz, (See Fig 5) V

= 0V, VDS = 0V to 120V

GS

VGS = 0V, VDS = 0V to 120V

= 5mA

D

f

c

f

h

(SeeFig.11)

g

Diode Characteristics

Symbol Parameter Min. Typ. Max. Unit

I

S

I

SM

V

SD

t

rr

Q

rr

I

RRM

t

on

Notes:

 Repetitive rating; pulse width limited by max. junction

temperature.

 Limited by T

RG = 25Ω, I above this value.

 I

≤ 103A, di/dt ≤ 360A/µs, V

SD

Continuous Source Current

(Body Diode) Pulsed Source Current

(Body Diode)

c

––– –––

171

684

Diode Forward Voltage ––– ––– 1.3 V Reverse Recovery Time ––– 110 –––

––– 133 –––

Reverse Recovery Charge ––– 515 –––

––– 758 ––– Reverse Recovery Current ––– 8.8 ––– A Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

 Pulse width ≤ 400µs; duty cycle ≤ 2%.  C

eff. (TR) is a fixed capacitance that gives the same charging time

oss

, starting TJ = 25°C, L = 0.144mH

Jmax

= 103A, VGS =10V. Part not recommended for use

AS

DD

≤ V

(BR)DSS

, TJ ≤ 175°C.

as C

 C

C

 When mounted on 1" square PCB (FR-4 or G-10 Material). For recom

mended footprint and soldering techniques refer to application note #AN-994.

 R

while V

oss

eff. (ER) is a fixed capacitance that gives the same energy as

oss

while V

oss

is measured at TJ approximately 90°C.

θ

is rising from 0 to 80% V

DS

is rising from 0 to 80% V

DS

Conditions

MOSFET symbol

A

showing the integral reverse

A

p-n junction diode. TJ = 25°C, IS = 103A, VGS = 0V TJ = 25°C VR = 100V,

ns

T

= 125°C IF = 103A

nC

J

TJ = 25°C TJ = 125°C TJ = 25°C

DSS

.

di

.

D

G

S

f

dt = 100A/µs

2 www.irf.com

IRFP4568PbF

1000

TOP 15V

)

100

A

( t n e

r

r u

C e

c

r u o S

o

t

n

i a

r D

,

D

I

10

1

0.1

BOTTOM 4.5V

VGS

10V

8.0V

7.0V

6.0V

5.5V

5.0V

60µs PULSE WIDTH

≤

Tj = 25°C

4.5V

0.01

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics

1000

) A

( t

100

n e

r

r u

C e

c

r

10

u o S

o

t

n

i a

r

1

D ,

D

I

TJ = 175°C

TJ = 25°C

V

= 50V

DS

≤

60µs PULSE WIDTH

0.1 3 4 5 6 7 8 9

VGS, Gate-to-Source Voltage (V)

Fig 3. Typical Transfer Characteristics

1000

TOP 15V

) A

( t n e

r

100

r u

C e

c

r u o S

o

t

n

i a

r D

,

D

I

BOTTOM 4.5V

10

VGS

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

60µs PULSE WIDTH

≤

Tj = 175°C

1

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

Fig 2. Typical Output Characteristics

3.0

e c n a

t s

i s e

R n O e

c

r u o S

o

t

n

i a

r D

,

) n o

( S D

R

ID = 103A

V

= 10V

2.5

)

2.0

d e z

i

l a

m

r

1.5

o N

(

1.0

GS

0.5

-60 -40 -20 0 20 40 60 80 100120140160180

TJ , Junction Temperature (°C)

Fig 4. Normalized On-Resistance vs. Temperature

1000000

100000

) F p

( e

10000

c n a

t

i c a p

1000

a C

, C

100

10

V

= 0V, f = 1 MHZ

GS

C

= C

+ Cgd, C

gs

gd

+ C

ds

iss

C

rss

C

oss

C

iss

C

oss

C

rss

SHORTED

ds

gd

1 10 100 1000

VDS, Drain-to-Source Voltage (V)

14.0

ID= 103A

12.0

) V

( e

g

10.0

a

t

l o V

e

8.0

c

r u o S

-

6.0

o

t

e

t a

4.0

G ,

S G

V

2.0

VDS= 120V

VDS= 75V

VDS= 30V

0.0 0 50 100 150 200

QG, Total Gate Charge (nC)

Fig 6. Typical Gate Charge vs. Gate-to-Source VoltageFig 5. Typical Capacitance vs. Drain-to-Source Voltage

www.irf.com 3

IRFP4568PbF

1000

) A

( t n e

r

100

u C n

i a

r D e

s

r e v e

R ,

D S

I

1.0

TJ = 175°C

10

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8

VSD, Source-to-Drain Voltage (V)

TJ = 25°C

Fig 7. Typical Source-Drain Diode

Forward Voltage

180

160

140

) A

(

120

t n e

r

100

u C n

i

80

a

r D

60

,

D

I

40

20

0

25 50 75 100 125 150 175

TC , Case Temperature (°C)

Fig 9. Maximum Drain Current vs.

V

GS

= 0V

10000

OPERATION IN THIS AREA

) A

1000

( t n e

r

r u

C

100

e c

r u o S

-

10

o

t

n

i a

r D ,

1

D

I

Tc = 25°C Tj = 175°C Single Pulse

0.1

0.1 1 10 100 1000

LIMITED BY RDS(on)

100µsec

1msec

DC

10msec

VDS, Drain-to-Source Voltage (V)

Fig 8. Maximum Safe Operating Area

) V

(

190

e g a

t

l o V

n w

o d k a e

r B

e c

r u o S

o

t

n

i a

r D

,

S S D

) R B

(

V

Id = 5mA

185

180

175

170

165

160

155

150

145

140

-60 -40 -20 0 20 40 60 80 100120140160180

TJ , Temperature ( °C )

Fig 10. Drain-to-Source Breakdown Voltage

Case Temperature

12.0

10.0

8.0

) J µ

( y

6.0

g

r e n E

4.0

2.0

0.0 0 20 40 60 80 100 120 140 160

V

DS,

Fig 11. Typical C

Drain-to-Source Voltage (V)

Stored Energy

OSS

3500

) J

m

(

3000

y g

r e n E

2500

e h c n

2000

a

l a v A

e

1500

s

l u P

e

l

1000

g n

i S ,

500

S A

E

0

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

TOP 21.5A

BOTTOM 103A

I

D

29.3A

Fig 12. Maximum Avalanche Energy vs. DrainCurrent

4 www.irf.com

1

τ

W

/ C

° )

C J h

t

Z (

e

0.01

s n o p s e

R l a

0.001

m

r e h T

0.1

D = 0.50

0.20

0.10

0.05

0.02

0.01

SINGLE PULSE ( THERMAL RESPONSE )

τ

J

τ

J

τ

1

τ

1

Ci= τi/Ri

R

1

R

1

τ

R

2

3

R

2

τ

2

Ri (°C/W) τi (sec)

R

3

τ

0.06336 0.000278

C

τ

0.11088 0.005836

3

τ

3

0.11484 0.053606

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

0.0001 1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000

Duty Cycle = Single Pulse

Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Tj = 150°C and

Tstart =25°C (Single Pulse)

100

) A

( t n e

r

r u

C

10

e h c n a

l a v A

1

0.01

0.05

0.10

Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Τ j = 25°C and

Tstart = 150°C.

0.1

1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Fig 14. Typical Avalanche Current vs.Pulsewidth

IRFP4568PbF

900

TOP Single Pulse

800

) J

700

m

( y

g

600

r e n E

500

e h c n

400

a

l a v A

300

,

R A

200

E

BOTTOM 1.0% Duty Cycle ID = 103A

100

0

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T

2. Safe operation in Avalanche is allowed as long asT

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.

4. P

D (ave)

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase

. This is validated for every part type.

jmax

is not exceeded.

jmax

= Average power dissipation per single avalanche pulse.

during avalanche).

6. I

= Allowable avalanche current.

av

7. ∆T = Allowable rise in junction temperature, not to exceed T

(assumed as

jmax

25°C in Figure 14, 15). t

Average time in avalanche.

av =

D = Duty cycle in avalanche = t Z

(D, tav) = Transient thermal resistance, see Figures 13)

thJC

P

D (ave)

·f

av

= 1/2 ( 1.3·BV·Iav) = DT/ Z

I

2DT/ [1.3·BV·Zth]

av =

E

= P

AS (AR)

D (ave)·tav

thJC

Fig 15. Maximum Avalanche Energy vs. Temperature

www.irf.com 5

IRFP4568PbF

6.0

5.5

) V

( e

5.0

g a

t

l

4.5

o V

d

l

4.0

o h s e

3.5

r h

t e

3.0

t a

G ,

2.5

) h

t

(

2.0

S G

V

1.5

1.0

ID = 250µA

ID = 1.0mA

ID = 1.0A

-75 -50 -25 0 25 50 75 100 125 150 175

TJ , Temperature ( °C )

Fig 16. Threshold Voltage vs. Temperature

70

IF = 103A

60

VR = 100V

TJ = 25°C

50

TJ = 125°C

)

40

A

(

R R

I

30

20

10

60

IF = 68A

VR = 100V

50

TJ = 25°C

TJ = 125°C

40

) A

(

30

R R

I

20

10

0

0 200 400 600 800 1000

diF /dt (A/µs)

Fig. 17 - Typical Recovery Current vs. dif/dt

3600

3200

2800

2400

) A

(

2000

R R

Q

1600

1200

IF = 68A

VR = 100V

TJ = 25°C

TJ = 125°C

800

0

0 200 400 600 800 1000

diF /dt (A/µs)

400

0 200 400 600 800 1000

diF /dt (A/µs)

Fig. 19 - Typical Stored Charge vs. dif/dtFig. 18 - Typical Recovery Current vs. dif/dt

4000

3600

3200

2800

) A

2400

(

R R

2000

Q

1600

1200

IF = 103A

VR = 100V

TJ = 25°C

TJ = 125°C

800

400

0 200 400 600 800 1000

diF /dt (A/µs)

Fig. 20 - Typical Stored Charge vs. dif/dt

6 www.irf.com

IRFP4568PbF

A





Reverse Recovery Current

Driver Gate Drive

P.W.

D.U.T. ISDWaveform

D.U.T. VDSWaveform

Inductor Current

Inductor Curent

* V

GS

D.U.T

+

-

R

G

+



Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

-

• Low Leakage Inductance Current Transformer



-

• dv/dt controlled by R

• Driver same type as D.U.T.

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

G

+

V

DD

Re-Applied Voltage

+

-

Period

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

= 5V for Logic Level Devices

D =

P. W .

Period

VGS=10V

V

DD

I

SD

*

Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET® Power MOSFETs

V

15V

V

DS

L

DRIVER

t

p

(BR)DSS

R

G

V

20V

GS

Fig 22a. Unclamped Inductive Test Circuit

V

GS

R

G

10V

V

GS

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

D.U.T

I

AS

Ω

0.01

t

p

+

V

DD

-

I

AS

Fig 22b. Unclamped Inductive Waveforms

R

V

DS

D

V

DS

90%

D.U.T.

+

V

DD

-

10% V

GS

t

d(on)tr

t

d(off)tf

Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms

Current Regulator

Same Type as D.U.T.

.2µF

12V

V

GS

50KΩ

3mA

.3µF

D.U.T.

+

V

DS

-

Vds

Vgs(th)

Id

Vgs

I

Current Sampling Resistors

Fig 24a. Gate Charge Test Circuit

www.irf.com 7

I

G

D

Qgs1

Qgs2 Qgd Qgodr

Fig 24b. Gate Charge Waveform

IRFP4568PbF

TO-247AC Package Outline

Dimensions are shown in millimeters (inches)

TO-247AC Part Marking Information

(;$03/(

1RWH3LQDVVHPEO\OLQHSRVLWLRQ

TO-247AC package is not recommended for Surface Mount Application.

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

8 www.irf.com

7+,6,6$1,5)3( :,7+$66(0%/<

/27&2'( $66(0%/('21:: ,17+($66(0%/</,1(+

LQGLFDWHV/HDG)UHH

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

,17(51$7,21$/

5(&7,),(5

/2*2

$66(0%/< /27&2'(

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.

Qualification Standards can be found on IR’s Web site.

Visit us at www.irf.com for sales contact information. 09/2008

,5)3(

+



3$57180%(5

'$7(&2'( <($5  :((. /,1(+

TAC Fax: (310) 252-7903