Datasheet irfp450apbf Datasheet

Page 1
SMPS MOSFET
Document Number: 91230
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1
PD -95054
IRFP450APbF
HEXFET® Power MOSFET
Applications
l Switch Mode Power Supply ( SMPS ) l Uninterruptable Power Supply l High speed power switching l Lead-Free
V
DSS
Rds(on) max I
500V 0.40Ω 14A
Benefits
l Low Gate Charge Qg results in Simple
Drive Requirement
l Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche Voltage and Current
l Effective Coss Specified ( See AN 1001)
TO-247AC
SDG
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 14 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 8.7 A I
DM
PD @TC = 25°C Power Dissipation 190 W
V
GS
dv/dt Peak Diode Recovery dv/dt 4.1 V/ns T
J
T
STG
Pulsed Drain Current 56
Linear Derating Factor 1.5 W/°C Gate-to-Source Voltage ± 30 V
Operating Junction and -55 to + 150 Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Mounting torqe, 6-32 or M3 screw 10 lbf•in (1.1N•m)
°C
D
Typical SMPS Topologies:
l Two Transistor Forward l Half Bridge, Full Bridge
l PFC Boost
Notes through are on page 8
2/26/04
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IRFP450APbF
Document Number: 91230
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2
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
I
DSS
I
GSS
Dynamic @ TJ = 25°C (unless otherwise specified)
g
fs
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff. Effective Output Capacitance ––– 96 ––– VGS = 0V, VDS = 0V to 400V
oss
Avalanche Characteristics
E
AS
I
AR
E
AR
Thermal Resistance
R
θJC
R
θCS
R
θJA
Diode Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Drain-to-Source Breakdown Voltage 500 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.58 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance ––– ––– 0.40 Ω VGS = 10V, ID = 8.4A Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 400V, VGS = 0V, TJ = 125°C Gate-to-Source Forward Leakage ––– ––– 100 VGS = 30V Gate-to-Source Reverse Leakage ––– ––– -100
VDS = 500V, VGS = 0V
µA
nA
VGS = -30V
Parameter Min. Typ. Max. Units Conditions Forward Transconductance 7.8 ––– ––– S VDS = 50V, ID = 8.4A Total Gate Charge ––– ––– 64 ID = 14A Gate-to-Source Charge ––– ––– 16 nC VDS = 400V Gate-to-Drain ("Miller") Charge ––– ––– 26 VGS = 10V, See Fig. 6 and 13 Turn-On Delay Time ––– 15 ––– VDD = 250V Rise Time ––– 36 ––– ID = 14A Turn-Off Delay Time ––– 35 ––– RG = 6.2Ω
ns
Fall Time ––– 29 ––– RD = 17Ω,See Fig. 10 Input Capacitance ––– 2038 ––– VGS = 0V Output Capacitance ––– 307 ––– VDS = 25V Reverse Transfer Capacitance ––– 10 ––– pF ƒ = 1.0MHz, See Fig. 5 Output Capacitance ––– 2859 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz Output Capacitance ––– 81 ––– VGS = 0V, VDS = 400V, ƒ = 1.0MHz
Parameter Typ. Max. Units
Single Pulse Avalanche Energy ––– 760 mJ Avalanche Current ––– 14 A Repetitive Avalanche Energy ––– 19 mJ
Parameter Typ. Max. Units
Junction-to-Case ––– 0.65 Case-to-Sink, Flat, Greased Surface 0.24 ––– °C/W Junction-to-Ambient 40
Parameter Min. Typ. Max. Units Conditions Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode)
––– –––
––– –––
Diode Forward Voltage ––– ––– 1.4 V TJ = 25°C, IS = 14A, VGS = 0V Reverse Recovery Time ––– 487 731 ns TJ = 25°C, IF = 14A Reverse RecoveryCharge ––– 3.9 5.8 µC di/dt = 100A/µs  Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
14
56
showing the
A
p-n junction diode.
D
G
S
Page 3
IRFP450APbF
Document Number: 91230
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3
100
10
1
TOP
BOTTOM
VGS 15V 10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
4.5V
0.1
D
I , Drain-to-Source Current (A)
20µs PULSE WIDTH
°
T = 25 C
0.01
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
J
Fig 1. Typical Output Characteristics
100
100
10
TOP
BOTTOM
VGS 15V 10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
4.5V
1
D
I , Drain-to-Source Current (A)
20µs PULSE WIDTH
0.1
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
T = 150 C
°
J
Fig 2. Typical Output Characteristics
3.0
I =
D
13A
14A
°
T = 150 C
J
10
°
T = 25 C
J
1
D
I , Drain-to-Source Current (A)
V = 50V
DS
0.1
4.0 5.0 6.0 7.0 8.0 9.0 10.0
V , Gate-to-Source Voltage (V)
GS
20µs PULSE WIDTH
2.5
2.0
1.5
(Normalized)
1.0
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
T , Junction Temperature ( C)
J
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance
Vs. Temperature
V =
GS
°
10V
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IRFP450APbF
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Document Number: 91230
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100000
10000
1000
100
V = 0V, f = 1MHz
GS
C = C + C , C SHORTED
iss gs gd ds
C = C
rss gd
C = C + C
oss ds gd
C
iss
C
oss
C, Capacitance (pF)
10
1
1 10 100 1000
V , Drain-to-Source Voltage (V)
DS
C
rss
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
°
T = 150 C
J
10
20
I =
13A
14A
D
16
12
8
4
GS
V , Gate-to-Source Voltage (V)
V = 400V
DS
V = 250V
DS
V = 100V
DS
FOR TEST CIRCUIT
0
0 15 30 45 60 75
Q , Total Gate Charge (nC)
G
SEE FIGURE
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
13
10us
°
T = 25 C
J
1
SD
I , Reverse Drain Current (A)
V = 0 V
0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4
V ,Source-to-Drain Voltage (V)
SD
GS
Fig 7. Typical Source-Drain Diode
Forward Voltage
10
D
I , Drain Current (A)I , Drain Current (A)
°
= 25 C
C
T T= 150 C Single Pulse
1
10 100 1000
°
J
V , Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
100us
1ms
10ms
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IRFP450APbF
Document Number: 91230
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5
14
12
10
8
6
D
4
I , Drain Current (A)
2
0
25 50 75 100 125 150
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
1
R
V
DS
V
GS
R
G
D
D.U.T.
10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
10% V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
+
V
DD
-
D = 0.50
thJC
0.01
Thermal Response (Z )
0.001
0.20
0.1
0.10
0.05
0.02
0.01
0.00001 0.0001 0.001 0.01 0.1 1
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
t , Rectangular Pulse Duration (sec)
1
J DM thJC C
1 2
P
DM
t
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Page 6
IRFP450APbF
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A
Document Number: 91230
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6
15V
DRIVER
+
-
V
R
20V
V
DS
G
t
L
D.U.T
I
AS
Ω
0.01
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
Q
GD
DD
1600
TOP
BOTTOM
1200
800
400
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150
Starting T , Junction Temperature( C)
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
640
I
D
6.3A
8.9A 14A
°
V
G
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T.
3mA
I
I
G
Current Sampling Resistors
+
V
DS
-
D
Fig 13b. Gate Charge Test Circuit
620
600
580
DSav
560
V , Avalanche Voltage (V)
540
02468101214
I , Avalanche Current (A)
av
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
Page 7
IRFP450APbF
Document Number: 91230
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7
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance Current Transformer
-
-
• dv/dt controlled by R
• Driver same type as D.U.T.
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
Period
P. W .
+
+
V
DD
-
VGS=10V
*
Reverse Recovery Current
Re-Applied Voltage
D.U.T. ISDWaveform
Body Diode Forward
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
* V
= 5V for Logic Level Devices
GS
Fig 14. For N-Channel HEXFETS
Current
di/dt
Diode Recovery
dv/dt
V
DD
I
SD
Page 8
IRFP450APbF
Document Number: 91230
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8
TO-247AC Package Outline
15.90 (.626)
15.30 (.602)
20.30 (.800)
19.70 (.775)
14.80 (.583)
14.20 (.559)
2.40 (.094)
2.00 (.079) 2X
5.45 (.215)
2X
1
- B -
23
3X
3.40 (.133)
3.00 (.118)
- A -
4.30 (.170)
3.70 (.145)
1.40 (.056)
1.00 (.039)
0.25 (.010)
TO-247AC Part Marking Informa-
THIS IS AN IRFPE30
EXAMPL E:
WIT H AS SE MB LY LOT CODE 5657 ASSEMBLE D ON WW 35, 2000 IN THE ASSEMBLY LINE "H"
Note: "P" in assembly line position ind icates "Lead-Free "
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
 Starting T
RG = 25Ω, I
I
SD
TJ ≤ 150°C
= 25°C, L =7.8mH
J
= 14A. (See Figure 12)
AS
≤ 14A, di/dt ≤ 130A/µs, V
DD
≤ V
(BR)DSS
3.65 (.143)
3.55 (.140)
0.25 (.010)
5.50 (.217)
2X
- C -
,
- D -
5.30 (.209)
4.70 (.185)
2.50 (.089)
1.50 (.059) 4
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH. 3 CONFORMS TO JEDEC OUTLINE TO-247-AC.
0.80 (.031)
3X
0.40 (.016)
2.60 (.102)
2.20 (.087)
IRFPE 30
56 57
PART NUMBE R
035H
DAT E CODE YEAR 0 = 200 0 WEEK 35 LINE H
LEAD ASSIGNMENTS Hexfet 1 - Gate 2 - Drai n 3 - Sour ce 4 - Drai n
5.50 (.217)
4.50 (.177)
C
M
D
MMB
A
S
INTER NAT IONAL
RECTIFIE R
LOGO
ASSEMBLY LOT CODE
Pulse width ≤ 300µs; duty cycle ≤ 2%.
C
eff. is a fixed capacitance that gives the same charging time
oss
as C
oss
while V
is rising from 0 to 80% V
DS
IGBT
LEAD ASSIGNMENTS
1 - Gate
1 - GATE
2 - Collecto r
2 - DRAIN
3 - Emitter
3 - SOURCE
4 - Collecto r
4 - DRAIN
DSS
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
02/04
Page 9
Legal Disclaimer Notice
Vishay
Notice
The products described herein were acquired by Vishay Intertechnology, Inc., as part of its acquisition of International Rectifier’s Power Control Systems (PCS) business, which closed in April 2007. Specifications of the products displayed herein are pending review by Vishay and are subject to the terms and conditions shown below.
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
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®
, IR®, the IR logo, HEXFET®, HEXSense®, HEXDIP®, DOL®, INTERO®, and POWIRTRAIN
®
Document Number: 99901 www.vishay.com Revision: 12-Mar-07 1
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