This advanced power MOSFET is designed, tested, and
guaranteed to withstand a specified level of energy in the
breakdown avalanche mode of operation. These are
N-Channel enhancement mode silicon gate power field
effecttransistorsdesigned for applications such as switching
regulators, switching converters, motor drivers, relay drivers
and drivers for high power bipolar switching transistors
requiring high speed and low gate drive power. They can be
operated directly from integrated circuits.
Formerly developmental type TA17464.
Ordering Information
PART NUMBERPACKAGEBRAND
IRFP360TO-247IRFP360
NOTE: When ordering, use the entire part number.
File Number
Features
• 23A, 400V
•r
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
= 0.200Ω
DS(ON)
Components to PC Boards”
Symbol
D
G
2290.3
Packaging
S
JEDEC STYLE TO-247
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
4-341
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
300
260
300
260
NOTE:
1. TJ= 25oC to 125oC.
Electrical SpecificationsT
= 25oC, Unless Otherwise Specified
C
PARAMETERSYMBOLTEST CONDITIONSMINTYPMAXUNITS
Drain to Source Breakdown VoltageBV
Gate Threshold VoltageV
GS(TH)VGS
Zero Gate Voltage Drain CurrentI
On-State Drain Current (Note 2)I
D(ON)
Gate to Source Leakage CurrentI
On Resistance (Note 2)r
FIGURE 6. SATURATION CHARACTERISTICSFIGURE 7. TRANSFER CHARACTERISTICS
2.0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
1.6
VGS = 10V
1.2
0.8
DRAIN TO SOURCE
ON RESISTANCE
DS(ON),
0.4
r
0
0306090120150
I
, DRAIN CURRENT (A)
D
VGS = 20V
3.0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
= 10V, ID =13A
V
GS
2.4
1.8
1.2
ON RESISTANCE
0.6
NORMALIZED DRAIN TO SOURCE
0
-40040
, JUNCTION TEMPERATURE (oC)
T
J
10
80
120
160
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
4-344
FIGURE 9. NORMALIZED DRAIN TOSOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
Page 5
IRFP360
Typical Performance Curves
1.25
ID = 250µA
1.15
1.05
0.95
BREAKDOWN VOLTAGE
0.85
NORMALIZED DRAIN TO SOURCE
0.75
-40040
, JUNCTION TEMPERATURE (oC)
T
J
Unless Otherwise Specified (Continued)
80
120
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
50
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
≥ 50V
V
DS
40
160
10000
8000
C
6000
4000
C, CAPACITANCE (nF)
2000
0
12 5102 5
ISS
C
OSS
C
RSS
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS= 0V, f = 1MHz
C
= CGS + C
C
C
ISS
RSS
OSS
= C
≈ C
GD
DS
GD
+ C
GD
10
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
2
10
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
2
30
20
, TRANSCONDUCTANCE (S)
10
fs
g
0
0 1020304050
TJ = 25oC
TJ = 150oC
ID, DRAIN CURRENT (A)
TJ = 150oC
10
TJ = 25oC
, SOURCE TO DRAIN CURRENT (A)
SD
I
1
00.40.81.21.6
, SOURCE TO DRAIN VOLTAGE (V)
V
SD
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENTFIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20
ID = 25A
16
12
8
4
, GATE TO SOURCE VOLTAGE (V)
GS
V
0
0255075100125
VDS = 80V
, GATE CHARGE (nC)
Q
g
VDS = 320V
4-345
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Page 6
IRFP360
Test Circuits and Waveforms
V
DS
BV
DSS
L
VARY t
TO OBTAIN
P
REQUIRED PEAK I
V
GS
AS
R
G
+
V
DD
-
DUT
0V
P
I
AS
0.01Ω
0
t
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUITFIGURE 16. UNCLAMPED ENERGY WAVEFORMS
t
P
I
AS
t
AV
V
DS
V
DD
R
G
V
GS
FIGURE 17. SWITCHING TIME TEST CIRCUIT
CURRENT
REGULATOR
12V
BATTERY
0.2µF
50kΩ
0.3µF
t
ON
t
d(ON)
t
R
L
+
V
DD
-
V
DS
90%
0
r
10%
DUT
V
GS
10%
0
50%
PULSE WIDTH
t
d(OFF)
90%
t
OFF
50%
t
f
10%
90%
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
V
DS
(ISOLATED
SUPPLY)
SAME TYPE
AS DUT
V
DD
Q
g(TOT)
Q
gd
Q
gs
V
GS
G
I
0
G(REF)
IG CURRENT
SAMPLING
RESISTORRESISTOR
FIGURE 19. GATE CHARGE TEST CIRCUIT
4-346
D
S
CURRENT
I
D
SAMPLING
DUT
V
DS
0
V
DS
I
G(REF)
0
FIGURE 20. GATE CHARGE WAVEFORMS
Page 7
IRFP360
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However,no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
4-347
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
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