Datasheet IRFP360 Datasheet (Intersil)

Page 1
IRFP360
Data Sheet July 1999
23A, 400V, 0.200 Ohm, N-Channel Power MOSFET
This advanced power MOSFET is designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. These are N-Channel enhancement mode silicon gate power field effecttransistorsdesigned for applications such as switching regulators, switching converters, motor drivers, relay drivers and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. They can be operated directly from integrated circuits.
Formerly developmental type TA17464.
Ordering Information
PART NUMBER PACKAGE BRAND
IRFP360 TO-247 IRFP360
NOTE: When ordering, use the entire part number.
File Number
Features
• 23A, 400V
•r
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
= 0.200Ω
DS(ON)
Components to PC Boards”
Symbol
D
G
2290.3
Packaging
S
JEDEC STYLE TO-247
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
4-341
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999
Page 2
IRFP360
Absolute Maximum Ratings T
= 25oC, Unless Otherwise Specified
C
IRFP360 UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
DGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
TC= 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
DS
D D
DM
GS
D
400 V 400 V
23 14
92 A ±20 V 250 W
A A
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 W/oC
Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T
AS
STG
1200 mJ
-55 to 150
o
C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Package Body for 10s, see Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
300 260
300 260
NOTE:
1. TJ= 25oC to 125oC.
Electrical Specifications T
= 25oC, Unless Otherwise Specified
C
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV Gate Threshold Voltage V
GS(TH)VGS
Zero Gate Voltage Drain Current I
On-State Drain Current (Note 2) I
D(ON)
Gate to Source Leakage Current I On Resistance (Note 2) r
DS(ON)ID
Forward Transconductance (Note 2) g Turn-On Delay Time t
d(ON)
Rise Time t Turn-Off Delay Time t
d(OFF)
Fall Time t Total Gate Charge
Q
g(TOT)VGS
(Gate to Source + Gate to Drain) Gate to Source Charge Q Gate to Drain “Miller” Charge Q Input Capacitance C Output Capacitance C Reverse Transfer Capacitance C Internal Drain Inductance L
Internal Source Inductance L
Thermal Resistance Junction to Case R Thermal Resistance Junction to Ambient R
DSSID
DSS
GSS
fs
r
f
gs
gd
ISS OSS RSS
D
S
θJC
θJA
= 250µA, VGS = 0V (Figure 10) 400 - - V
= VDS, ID = 250µA2-4V VDS = Rated BV VDS = 0.8 x Rated BV VDS > I
D(ON)
, VGS = 0V - - 25 µA
DSS
, VGS = 0V, TJ = 125oC - - 250 µA
DSS
x r
DS(ON)MAX
, VGS = 10V 23 - - A
VGS = ±20V - - ±100 nA
= 13A, VGS = 10V (Figures 8, 9) - 0.18 0.20 Ω VDS≥ 50V, IDS > 13A (Figure 12) 14 21 - S VDD = 200V, ID≈ 25A, RGS = 4.3Ω, VGS = 10V,
RL = 7.5Ω MOSFET Switching Times are Essentially Independent of Operating Temperature
-2233ns
- 94 140 ns
- 80 120 ns
-6699ns
= 10V, ID = 25A, VDS = 0.8 x Rated BV
I
= 1.5mA (Figure 14)
G(REF)
Gate Charge is Essentially Independent of Operating Temperature
DSS
- 68 100 nC
-17-nC
-24-nC
VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) - 4000 - pF
- 550 - pF
-97-pF
Measured between the Contact Screw on Header closer to Source and Gate Pins and Center of Die
MeasuredfromtheSource Lead, 6mm (0.25in) from Header and Source Bonding Pad
Modified MOSFET Symbol Showing the Internal Device Inductances
D
L
D
G
L
S
S
- 5.0 - nH
-13-nH
- - 0.50oC/W
Free Air Operation - - 30
o
C/W
4-342
Page 3
IRFP360
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current I Pulse Source to Drain Current (Note 2) I
Source to Drain Diode Voltage (Note 2) V
SD
SDM
SD
Reverse Recovery Time t Reverse Recovery Charge Q
RR
NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD= 50V, starting TJ= 25oC, L = 4mH, RG= 25Ω, Peak IAS = 23A.
ModifiedMOSFETSymbol Showing the Integral Reverse P-N Junction
D
- - 23 A
- - 92 A
Rectifier
G
S
TJ = 25oC, ISD = 23A, VGS = 0V (Figure 13) - - 1.8 V TJ = 25oC, ISD = 25A, dISD/dt = 100A/µs 200 460 1000 ns
rr
TJ = 25oC, ISD = 25A, dISD/dt = 100A/µs 3.1 7.1 16 µC
Typical Performance Curves
1.2
1.0
0.8
0.6
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
0 50 100 150
TC, CASE TEMPERATURE (oC)
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
1
0.5
25
20
15
10
, DRAIN CURRENT (A)
D
I
5
0
25 75 125
50 100
TC, CASE TEMPERATURE (oC)
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
150
o
TRANSIENT THERMAL
θJC,
Z
-2
10
IMPEDANCE (
-3
10
10
0.05
0.02
0.01
-5
0.1
SINGLE PULSE
0.2
0.1
C/W)
4-343
P
DM
t
1
t
θJC
2
1/t2
+ T
C
NOTES: DUTY FACTOR: D = t PEAK TJ = PDM x Z
-4
10
-3
10
t1, RECTANGULAR PULSE DURATION (S)
-2
10
0.1 1 10
FIGURE 3. TRANSIENT THERMAL IMPEDANCE
Page 4
IRFP360
Typical Performance Curves
3
10
2
10
10
, DRAIN CURRENT (A)
D
I
1
T
= 25oC
C
T
= MAX RATED
J
SINGLE PULSE
0.1 110
VDS, DRAIN TO SOURCE VOLTAGE (V)
OPERATION IN THIS AREA IS LIMITED BY r
DS(ON)
Unless Otherwise Specified (Continued)
10µs
100µs
1ms
10ms
DC
2
10
3
10
, DRAIN CURRENT (A)
D
I
40
VGS = 10V
32
24
16
8
0
0 40 80 120 160
VDS, DRAIN TO SOURCE VOLTAGE (V)
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
VGS = 6.0V
VGS = 5.5V
VGS = 5.0V VGS = 4.5V
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS
40
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
32
24
VGS = 10V
VGS = 6.0V
2
10
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX V
≥ 50V
DS
10
VGS = 4.0V
200
16
, DRAIN CURRENT (A)
D
I
8
0
0
2
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = 5.5V
VGS = 5.0V
VGS = 4.0V
46 10
VGS = 4.5V
8
1
, DRAIN CURRENT (A)
D
I
0.1 02468
TJ = 150oC
, GATE TO SOURCE VOLTAGE (V)
V
SD
TJ = 25oC
FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS
2.0
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
1.6 VGS = 10V
1.2
0.8
DRAIN TO SOURCE
ON RESISTANCE
DS(ON),
0.4
r
0
0 30 60 90 120 150
I
, DRAIN CURRENT (A)
D
VGS = 20V
3.0
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
= 10V, ID =13A
V
GS
2.4
1.8
1.2
ON RESISTANCE
0.6
NORMALIZED DRAIN TO SOURCE
0
-40 0 40 , JUNCTION TEMPERATURE (oC)
T
J
10
80
120
160
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
4-344
FIGURE 9. NORMALIZED DRAIN TOSOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
Page 5
IRFP360
Typical Performance Curves
1.25 ID = 250µA
1.15
1.05
0.95
BREAKDOWN VOLTAGE
0.85
NORMALIZED DRAIN TO SOURCE
0.75
-40 0 40 , JUNCTION TEMPERATURE (oC)
T
J
Unless Otherwise Specified (Continued)
80
120
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
50
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
≥ 50V
V
DS
40
160
10000
8000
C
6000
4000
C, CAPACITANCE (nF)
2000
0
12 5102 5
ISS
C
OSS
C
RSS
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS= 0V, f = 1MHz C
= CGS + C C C
ISS RSS OSS
= C
≈ C
GD
DS
GD
+ C
GD
10
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
2
10
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
2
30
20
, TRANSCONDUCTANCE (S)
10
fs
g
0
0 1020304050
TJ = 25oC
TJ = 150oC
ID, DRAIN CURRENT (A)
TJ = 150oC
10
TJ = 25oC
, SOURCE TO DRAIN CURRENT (A)
SD
I
1
0 0.4 0.8 1.2 1.6
, SOURCE TO DRAIN VOLTAGE (V)
V
SD
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20
ID = 25A
16
12
8
4
, GATE TO SOURCE VOLTAGE (V)
GS
V
0
0 25 50 75 100 125
VDS = 80V
, GATE CHARGE (nC)
Q
g
VDS = 320V
4-345
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Page 6
IRFP360
Test Circuits and Waveforms
V
DS
BV
DSS
L
VARY t
TO OBTAIN
P
REQUIRED PEAK I
V
GS
AS
R
G
+
V
DD
-
DUT
0V
P
I
AS
0.01Ω
0
t
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
t
P
I
AS
t
AV
V
DS
V
DD
R
G
V
GS
FIGURE 17. SWITCHING TIME TEST CIRCUIT
CURRENT
REGULATOR
12V
BATTERY
0.2µF
50kΩ
0.3µF
t
ON
t
d(ON)
t
R
L
+
V
DD
-
V
DS
90%
0
r
10%
DUT
V
GS
10%
0
50%
PULSE WIDTH
t
d(OFF)
90%
t
OFF
50%
t
f
10%
90%
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
V
DS
(ISOLATED SUPPLY)
SAME TYPE AS DUT
V
DD
Q
g(TOT)
Q
gd
Q
gs
V
GS
G
I
0
G(REF)
IG CURRENT
SAMPLING
RESISTOR RESISTOR
FIGURE 19. GATE CHARGE TEST CIRCUIT
4-346
D
S
CURRENT
I
D
SAMPLING
DUT
V
DS
0
V
DS
I
G(REF)
0
FIGURE 20. GATE CHARGE WAVEFORMS
Page 7
IRFP360
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However,no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240
4-347
EUROPE
Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
Loading...