Page 1
SMPS MOSFET
Absol
Diode Ch
Document Number: 91220
www.vishay.com
1
PD - 95051
IRFP31N50LPbF
Applications
HEXFET® Power MOSFET
• Zero Voltage Switching SMPS
V
• Telecom and Server Power Supplies
• Uninterruptible Power Supplies
• Motor Control applications
DSSRDS(on)
500V
0.15Ω
• Lead-Free
Features and Benefits
• SuperFast body diode eliminates the need for external
diodes in ZVS applications.
• Lower Gate charge results in simpler drive requirements.
• Enhanced dv/dt capabilities offer improved ruggedness.
• Higher Gate voltage threshold offers improved noise
immunity
.
ute Maximum Ratings
Parameter Max. Units
I
@ TC = 25°C Continuous Drain Current, V
D
I
@ TC = 100°C Continuous Drain Current, VGS @ 10V
D
I
DM Pulsed Drain Current
P
@TC = 25°C
D
V
GS
dv/dt Peak Diode Recovery dv/dt
T
J
T
STG
Power Dissipation 460 W
Linear Derating Factor 3.7 W/°C
Gate-to-Source Voltage ±30 V
Operating Junction and -55 to + 150
Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 screw
c
GS
d
@ 10V
31
20 A
124
19 V/ns
x
in (1.1Nxm)
10lb
aracteristics
Symbol Parameter Min. Typ. Max. UnitsConditions
I
S
I
SM
V
t
rr
Q
I
RRM
t
on
SD
rr
Continuous Source Current ––– ––– 31 MOSFET symbol
(Body Diode) A showing the
Pulsed Source Current ––– ––– 124 integral reverse
(Body Diode)
Diode Forward Voltage ––– ––– 1.5 V
Reverse Recovery Time ––– 170 250 ns
Reverse Recovery Charge ––– 570 860 nC
Reverse Recovery Current ––– 7.9 12 A
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
c
––– 220 330
––– 1.2 1.8 µC
p-n junction diode.
= 25°C, IS = 31A, VGS = 0V
T
J
= 25°C, IF = 31A
T
J
= 125°C, di/dt = 100A/µs
T
J
= 25°C, IS = 31A, VGS = 0V
T
J
= 125°C, di/dt = 100A/µs
T
J
= 25°C
T
J
typ.
Trr
typ.
I
170ns 31A
TO-247AC
f
f
f
f
2/26/04
D
Page 2
IRFP31N50LPbF
–
/
–
––––
g
–
g
–
––––
––––
––––
–
–
–
–
–
–
–
–
–
–
–
–
–
Single Pulse Aval
d
–
Aval
t
c
–
R
titive Aval
c
–
–
–
Document Number: 91220
www.vishay.com
2
Static @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units
V
(BR)DSS
∆V
R
DS(on)
V
GS(th)
I
DSS
I
GSS
R
G
(BR)DSS
Drain-to-Source Breakdown Voltage 500 –––––
∆T
Breakdown Voltage Temp. Coefficient –––0.28 –––V/°C
J
Static Drain-to-Source On-Resistance –––0.15 0.18
Gate Threshold Voltage3.0––
Drain-to-Source Leakage Current ––––––50 µA
––
Gate-to-Source Forward Leakage––––––100 nA
Gate-to-Source Reverse Leaka
e––––––-100
Internal Gate Resistance –––1.1 ––
V
Ω
5.0 V
2.0 mA
Ω
VGS = 0V, ID = 250µA
Reference to 25°C, I
V
GS
V
DS
V
DS
V
DS
V
GS
V
GS
f = 1MHz, open drain
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units
fs Forward Transconductance 15 –––––
Q
Q
Q
t
t
t
t
C
C
C
C
C
C
C
g
gs
gd
d(on)
r
d(off)
f
iss
oss
rss
oss
oss
oss
oss
eff.
eff. (ER)
Total Gate Charge––
Gate-to-Source Charge––
Gate-to-Drain ("Miller") Charge––
Turn-On Delay Time –––28 ––
Rise Time –––115 ––
Turn-Off Delay Time –––54 ––
Fall Time –––53 ––
Input Capacitance –––5000 ––
Output Capacitance –––553 ––
Reverse Transfer Capacitance –––59 ––
Output Capacitance –––6630 ––
Output Capacitance –––155 ––
Effective Output Capacitance ––
Effective Output Capacitance ––
276 ––
200 ––
(Energy Related)
210
100
58 nC
ns
pF
S
VDS = 50V, ID = 19A
= 31A
I
D
V
DS
V
GS
VDD = 250V
ID = 31A
R
G
V
GS
VGS = 0V
V
DS
ƒ = 1.0MHz, See Fig. 5
V
GS
VGS = 0V, VDS = 400V, ƒ = 1.0MHz
V
GS
Avalanche Characteristics
Symbol Parameter Typ. Units
E
AS
I
AR
E
AR
anche Curren
epe
anche Energy
anche Energy
––
––
––
Thermal Resistance
Symbol Parameter Typ. Units
R
θ
JC
R
θ
CS
R
θ
JA
Junction-to-Case ––
Case-to-Sink, Flat, Greased Surface 0.24 °C/W
Junction-to-Ambient ––
Conditions
= 1mA
= 10V, ID = 19A
D
f
= VGS, ID = 250µA
= 500V, VGS = 0V
= 400V, VGS = 0V, TJ = 125°C
= 30V
= -30V
Conditions
= 400V
= 10V, See Fig. 7 & 15
= 4.3Ω
= 10V, See Fig. 14a & 14b
= 25V
= 0V, VDS = 1.0V, ƒ = 1.0MHz
= 0V,VDS = 0V to 400V
Max.
460
31
46
Max.
0.26
–––
40
f
f
g
mJ
A
mJ
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See Fig. 11)
Starting T
I
AS
I
SD
TJ ≤ 150°C.
= 25°C, L = 1mH, RG = 25Ω,
J
= 31A (See Figure 12).
= 31A, di/dt ≤ 422A/µs, V
DD
≤ V
(BR)DSS
Pulse width ≤ 300µs; duty cycle ≤ 2%.
C
eff. is a fixed capacitance that gives the same charging time
oss
as C
,
while V
oss
C
eff.(ER) is a fixed capacitance that stores the same energy
oss
as C
while VDS is rising from 0 to 80% V
oss
is rising from 0 to 80% V
DS
DSS
DSS
.
.
Page 3
IRFP31N50LPbF
Document Number: 91220
www.vishay.com
3
1000
100
10
1
TOP
BOTTOM
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
5.0V
0.1
D
I , Drain-to-Source Current (A)
20µs PULSE WIDTH
°
T = 25 C
0.01
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
1000
J
100
10
TOP
BOTTOM
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
5.0V
1
D
I , Drain-to-Source Current (A)
20µs PULSE WIDTH
°
T = 150 C
0.1
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
J
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.0
I =
D
31A
100
°
T = 150 C
J
10
°
T = 25 C
J
1
D
I , Drain-to-Source Current (A)
V = 50V
DS
0.1
4 5 6 7 8 9 10 11
V , Gate-to-Source Voltage (V)
GS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
2.5
2.0
1.5
(Normalized)
1.0
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
T , Junction Temperature ( C)
J
Fig 4. Normalized On-Resistance
Vs. Temperature
V =
GS
°
10V
Page 4
IRFP31N50LPbF
Document Number: 91220
www.vishay.com
4
1000000
100000
)
F
p
(
e
c
10000
n
a
t
i
c
a
p
a
1000
C
,
C
100
10
1 10 100 1000
V
= 0V, f = 1 MHZ
GS
C
= C
iss
rss
oss
gs
= C
= C
C
C
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
16
I =
31A
D
12
+ Cgd, C
gd
+ C
ds
Ciss
Coss
Crss
V = 400V
V = 250V
V = 100V
gd
DS
DS
DS
SHORTED
ds
30
25
20
)
J
µ
(
y
15
g
r
e
n
E
10
5
0
0 100 200 300 400 500 600
V
Drain-to-Source Voltage (V)
DS,
Fig 6. Typ. Output Capacitance
Stored Energy vs. V
1000
100
°
T = 150 C
J
DS
8
4
GS
V , Gate-to-Source Voltage (V)
0
0 40 80 120 160
Q , Total Gate Charge (nC)
G
Fig 7. Typical Gate Charge vs.
Gate-to-Source Voltage
10
°
T = 25 C
J
1
SD
I , Reverse Drain Current (A)
V = 0 V
0.1
0.2 0.6 1.0 1.4 1.8
V ,Source-to-Drain Voltage (V)
SD
GS
Fig 8. Typical Source-Drain Diode
Forward Voltage
Page 5
IRFP31N50LPbF
Document Number: 91220
www.vishay.com
5
R
D.U.T.
D
+
V
DD
-
35
30
R
25
V
DS
V
GS
G
20
15
D
10
I , Drain Current (A)
5
0
25 50 75 100 125 150
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current vs.
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
t
d(on)tr
t
d(off)tf
Case Temperature
Fig 10b. Switching Time Waveforms
1
thJC
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
Thermal Response(Z )
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
0.001
0.00001 0.0001 0.001 0.01 0.1 1
t , Rectangular Pulse Duration (sec)
1
J DM thJ C C
1 2
P
DM
t
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Page 6
IRFP31N50LPbF
A
Document Number: 91220
www.vishay.com
6
1000
OPERATION IN THIS AREA LIMITED
100
10
D
I , Drain Current (A)I , Drain Current (A)
°
= 25 C
C
T T= 150 C
Single Pulse
1
10 100 1000
°
J
V , Drain-to-Source Voltage (V)
DS
BY R
DS(on)
Fig 12. Maximum Safe Operating
Area
15V
V
DS
L
DRIVER
10us
100us
1ms
10ms
1000
TOP
800
600
400
200
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150
Starting T , Junction Temperature( C)
J
BOTTOM
Fig 13. Maximum Avalanche Energy
Vs. Drain Current
V
(BR)DSS
t
p
I
D
14A
20A
31A
°
R
G
20V
D.U.T
I
AS
Ω
t
0.01
p
+
V
-
Fig 14a. Unclamped Inductive Test Circuit
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
+
V
DS
-
I
D
Fig 15a. Gate Charge Test Circuit
DD
I
AS
Fig 14b. Unclamped Inductive Waveforms
V
GS
Q
GS
V
G
Q
G
Q
GD
Charge
Fig 15b. Basic Gate Charge Waveform
Page 7
IRFP31N50LPbF
Document Number: 91220
www.vishay.com
7
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
• dv/dt controlled by R
G
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
Period
P. W .
+
+
V
DD
-
VGS=10V
*
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. ISDWaveform
Body Diode Forward
Current
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
* V
= 5V for Logic Level Devices
GS
di/dt
Diode Recovery
dv/dt
V
DD
I
SD
Fig 16. For N-Channel HEXFET® Power MOSFETs
Page 8
IRFP31N50LPbF
Document Number: 91220
www.vishay.com
8
TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
- A -
5.50 (.217)
2X
- C -
4.30 (.170)
3.70 (.145)
1.40 (.056)
1.00 (.039)
0.25 (.010)
3.65 (.143)
3.55 (.140)
0.25 (.010)
5.50 (.217)
4.50 (.177)
M
C
D
MMB
A
S
20.30 (.800)
19.70 (.775)
14.80 (.583)
14.20 (.559)
2.40 (.094)
2.00 (.079)
2X
5.45 (.215)
2X
15.90 (.626)
15.30 (.602)
- B -
1
23
3X
3.40 (.133)
3.00 (.118)
TO-247AC Part Marking Information
EXAMPLE:
THIS IS AN IRFPE 30
WITH ASSEMBLY
LOT CODE 5657
ASS EMB LED ON WW 35, 2000
IN THE AS SEMBLY LINE "H"
Note: "P" in assembly line
positio n indicates "L ead-Free"
INTER NATIONAL
RECTIF IER
LOGO
ASSEMBLY
LOT CODE
- D -
2.50 (.089)
1.50 (.059)
3X
2.60 (.10 2)
2.20 (.08 7)
IRFPE30
56 57
5.30 (.209)
4.70 (.185)
4
NOTES:
1 DIMENSIONING & TOLERANCING
PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
3 CONFORMS TO JEDEC OUTLINE
TO-247-AC.
LEAD ASSIGNMENTS
Hexfet
0.80 (.031)
0.40 (.016)
035H
LEAD ASSIGNMENTS
1 - Gate
2 - Drain
3 - Source
4 - Drain
PART NUMBER
DAT E CODE
YEAR 0 = 2000
WE EK 35
LINE H
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
IGBT
1 - Gate
2 - Coll ector
3 - Emitter
4 - Coll ector
TO-247AC package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
02/04
Page 9
Legal Disclaimer Notice
Vishay
Notice
The products described herein were acquired by Vishay Intertechnology, Inc., as part of its acquisition of
International Rectifier’s Power Control Systems (PCS) business, which closed in April 2007. Specifications of the
products displayed herein are pending review by Vishay and are subject to the terms and conditions shown below.
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or
anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.
International Rectifier
are registered trademarks of International Rectifier Corporation in the U.S. and other countries. All other product
names noted herein may be trademarks of their respective owners.
®
, IR®, the IR logo, HEXFET®, HEXSense®, HEXDIP®, DOL®, INTERO®, and POWIRTRAIN
®
Document Number: 99901 www.vishay.com
Revision: 12-Mar-07 1
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