Page 1
PD -95050C
IRFP2907PbF
HEXFET® Power MOSFET
Typical Applications
l
Telecom applications requiring soft start
D
V
= 75V
DSS
Benefits
l
Advanced Process Technology
l
Ultra Low On-Resistance
l
Dynamic dv/dt Rating
l
175°C Operating Temperature
l
Fast Switching
l
Repetitive Avalanche Allowed up to Tjmax
l
Lead-Free
G
R
S
= 4.5mΩ
DS(on)
ID = 209A
Description
This Stripe Planar design of HEXFET® Power MOSFETs
utilizes the lastest processing techniques to achieve
extremely low on-resistance per silicon area. Additional
features of this HEXFET power MOSFET are a 175°C
junction operating temperature, fast switching speed
and improved repetitive avalanche rating. These benefits
combine to make this design an extremely efficient and
TO-247AC
reliable device for use in a wide variety of applications.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 209
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 148 A
I
DM
PD @TC = 25°C Power Dissipation 470 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
T
J
T
STG
Pulsed Drain Current 840
Linear Derating Factor 3.1 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche Energy 1970 mJ
Avalanche Current See Fig.12a, 12b, 15, 16 A
Repetitive Avalanche Energy mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting Torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)
°C
Thermal Resistance
Parameter Typ. Max. Units
R
θ JC
R
θ CS
R
θ JA
Junction-to-Case ––– 0.32
Case-to-Sink, Flat, Greased Surface 0.24 ––– °C/W
Junction-to-Ambient ––– 40
www.irf.com 1
08/08/11
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IRFP2907PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
Δ V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff. Effective Output Capacitance ––– 2320 ––– V GS = 0V, VDS = 0V to 60V
oss
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Starting T
RG = 25Ω , I
I
SD
TJ ≤ 175°C
Pulse width ≤ 400μs; duty cycle ≤ 2%.
2 www.irf.com
Drain-to-Source Breakdown Voltage 75 ––– ––– V VGS = 0V, ID = 250μA
/ΔT
Breakdown Voltage Temp. Coefficient ––– 0.085 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance ––– 3.6 4.5 mΩ V GS = 10V, ID = 125A
Gate Threshold Voltage 2.0 ––– 4.0 V VDS = 10V, ID = 250μA
Forward Transconductance 130 ––– ––– S VDS = 25V, ID = 125A
Drain-to-Source Leakage Current
––– ––– 20
––– ––– 250 VDS = 60V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 200 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200
VDS = 75V, VGS = 0V
μ A
nA
VGS = -20V
Total Gate Charge ––– 410 620 ID = 125A
Gate-to-Source Charge ––– 92 140 nC VDS = 60V
Gate-to-Drain ("Miller") Charge ––– 140 210 VGS = 10V
Turn-On Delay Time ––– 23 ––– VDD = 38V
Rise Time ––– 190 ––– ID = 125A
Turn-Off Delay Time ––– 130 ––– RG = 1.2Ω
ns
Fall Time ––– 130 ––– VGS = 10V
5.0
Internal Drain Inductance
Internal Source Inductance ––– –––
––– –––
13
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
Input Capacitance ––– 13000 ––– VGS = 0V
Output Capacitance ––– 2100 ––– pF VDS = 25V
Reverse Transfer Capacitance ––– 500 ––– ƒ = 1.0MHz, See Fig. 5
Output Capacitance ––– 9780 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Output Capacitance ––– 1360 ––– VGS = 0V, VDS = 60V, ƒ = 1.0MHz
Parameter Min. Typ. Max. Units Conditions
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
209
840
showing the
A
p-n junction diode.
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 125A, VGS = 0V
Reverse Recovery Time ––– 140 210 ns TJ = 25°C, IF = 125A
Reverse RecoveryCharge ––– 880 1320 nC di/dt = 100A/μs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
C
eff. is a fixed capacitance that gives the same charging time
oss
= 25°C, L = 0.25mH
J
= 125A. (See Figure 12).
AS
≤ 125A, di/dt ≤ 260A/μs, V
DD
≤ V
(BR)DSS
as C
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 90A.
,
Limited by T
oss
while V
is rising from 0 to 80% V
DS
, see Fig.12a, 12b, 15, 16 for typical repetitive
Jmax
DSS
avalanche performance.
G
G
.
D
S
D
S
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IRFP2907PbF
1000
100
10
D
I , Drain-to-Source Current (A)
1
0.1 1 10 100
1000
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.5V
4.5V
20μ s PULSE WIDTH
T = 25 C
J
V , Drain-to-Source Voltage (V)
DS
°
1000
100
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
4.5V
D
I , Drain-to-Source Current (A)
20μ s PULSE WIDTH
°
T = 175 C
10
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
J
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.0
I =
D
209A
°
T = 175 C
J
100
°
T = 25 C
J
10
D
I , Drain-to-Source Current (A)
V = 25V
DS
1
4.0 5.0 6.0 7.0 8.0 9.0 10.0
V , Gate-to-Source Voltage (V)
GS
20μ s PULSE W IDTH
Fig 3. Typical Transfer Characteristics
2.5
2.0
1.5
(Normalized)
1.0
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature ( C)
J
Fig 4. Normalized On-Resistance
V =
GS
°
10V
Vs. Temperature
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Page 4
IRFP2907PbF
20000
16000
)
F
p
(
e
12000
c
n
a
t
i
c
a
p
8000
a
C
,
C
4000
0
1 10 100
V
= 0V, f = 1 MHZ
GS
C
= C
iss
gs
C
= C
rss
gd
C
= C
ds
+ C
oss
Ciss
Coss
Crss
+ Cgd, C
gd
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
°
T = 175 C
100
SD
I , Reverse Drain Current (A)
J
10
°
T = 25 C
1
0.1
0.0 0.5 1.0 1.5 2.0 2.5 3.0
V ,Source-to-Drain Voltage (V)
J
SD
SHORTED
ds
V = 0 V
GS
20
I =
125A
D
V = 60V
DS
V = 37V
16
12
8
4
GS
V , Gate-to-Source Voltage (V)
DS
FOR TEST CIRCUIT
0
0 100 200 300 400 500 600 700
Q , Total Gate Charge (nC)
G
SEE FIGURE
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
10000
OPERATION IN THIS AREA LIMITED
)
A
1000
(
t
n
e
r
r
u
C
100
e
c
r
u
o
S
-
10
o
t
n
i
a
r
D
,
1
D
I
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
0.1 1 10 100 1000
VDS, Drain-to-Source Voltage (V)
BY RDS(on)
13
100μ sec
1msec
10msec
DC
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
4 www.irf.com
Page 5
IRFP2907PbF
240
LIMITED BY PACKAGE
200
160
120
80
D
I , Drain Current (A)
40
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
1
R
V
DS
V
GS
R
G
D
D.U.T.
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
+
V
DD
-
W
/
C
°
)
C
J
h
t
Z
(
e
0.01
s
n
o
p
s
e
R
l
a
0.001
m
r
e
h
T
0.1
D = 0.50
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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Page 6
IRFP2907PbF
15V
DRIVER
+
-
V
R
20V
V
DS
G
t
L
D.U.T
I
AS
0.01
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
Q
GD
DD
5000
TOP
4000
3000
2000
1000
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting T , Junction Temperature ( C)
J
BOTTOM
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
D
51A
88A
125A
°
V
G
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2μF
12V
V
GS
.3μF
D.U.T.
3mA
I
G
Current Sampling Resistors
+
V
DS
-
I
D
Fig 13b. Gate Charge Test Circuit
4.0
3.5
)
V
(
3.0
e
c
a
i
r
a
2.5
V
,
)
h
t
(
2.0
S
G
V
1.5
1.0
-75 -50 -25 0 25 50 75 100 125 150 175
ID = 250μA
TJ , Temperature ( °C )
Fig 14. Threshold Voltage Vs. Temperature
6 www.irf.com
Page 7
1000
IRFP2907PbF
Duty Cycle = Single Pulse
)
A
(
100
t
n
e
r
r
u
C
e
h
c
n
a
l
10
a
v
A
1
1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
0.01
0.05
0.10
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ΔTj = 25°C due to
avalanche losses
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
2000
TOP Single Pulse
BOTTOM 10% Duty Cycle
)
J
1600
m
(
y
g
r
e
n
1200
E
e
h
c
n
a
l
800
a
v
A
,
R
A
400
E
0
25 50 75 100 125 150 175
ID = 125A
Starting TJ , Junction Temperature (°C)
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T
every part type.
. This is validated for
jmax
2. Safe operation in Avalanche is allowed as long asT
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. P
avalanche pulse.
= Average power dissipation per single
D (ave)
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I
= Allowable avalanche current.
av
7. ΔT = Allowable rise in junction temperature, not to exceed
T
(assumed as 25°C in Figure 15, 16).
jmax
t
Average time in avalanche.
av =
D = Duty cycle in avalanche = t
Z
(D, tav) = Transient thermal resistance, see figure 11)
thJC
av
·f
jmax
is
P
= 1/2 ( 1.3·BV·Iav) = D T/ Z
Fig 16. Maximum Avalanche Energy
Vs. Temperature
D (ave)
I
2D T/ [1.3·BV·Zth]
av =
E
= P
AS (AR)
D (ave)·tav
thJC
www.irf.com 7
Page 8
IRFP2907PbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
+
-
-
+
R
G
V
GS
• dv/dt controlled by R
• I SD controlled by Duty Factor "D"
G
• D.U.T. - Device Under Test
+
V
DD
-
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D =
P. W .
Period
VGS=10V
[ ] ***
D.U.T. ISDWaveform
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. VDSWaveform
Inductor Curent
*** V
= 5.0V for Logic Level and 3V Drive Devices
GS
Fig 17. For N-channel HEXFET
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
®
power MOSFETs
V
DD
[ ]
I
[ ]
SD
8 www.irf.com
Page 9
TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
IRFP2907PbF
TO-247AC Part Marking Information
EXAMPLE:
Note: "P" in as sembly line position
TO-247AC package is not recommended for Surface Mount Application.
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
IR WORLD HEADQUARTERS:101N Sepulveda Blvd., El Segundo, California 90245, USA Tel: (310) 252-7105
www.irf.com 9
THIS IS AN IRFPE30
WI T H AS S EMB LY
LOT CODE 5657
AS SE MB LED ON WW 35, 2001
IN THE AS S EMBLY LINE "H"
i ndi cates "L ead-F ree"
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
IRFP E30
135H
56 57
PART NUMB ER
DATE CODE
YEAR 1 = 2001
WEEK 35 LOT CODE
LINE H
Data and specifications subject to change without notice.
Visit us at www.irf.com for sales contact information.08/2011
TAC Fax: (310) 252-7903