Datasheet IRFP044NPBF Specification

l Advanced Process Technology

TO-247AC

l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated

G

Description

Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.

The TO-247 package is preferred for commercial-industrial
applications where higher power levels preclude the use of
TO-220 devices. The TO-247 is similar but superior to the
earlier TO-218 package because of its isolated mounting
hole.

PD - 9.1410A

IRFP044N

HEXFET® Power MOSFET

D

S

R

DS(on)

V

DSS

= 0.020Ω

ID = 53A

= 55V

Absolute Maximum Ratings

Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 53

@ TC = 100°C Continuous Drain Current, VGS @ 10V 37 A

I

D

I

DM

PD @TC = 25°C Power Dissipation 120 W

V

GS

E

AS

I

AR

E

AR

dv/d t Peak Diode Recovery dv/dt  5.0 V/ns
T

J

T

STG

Pulsed Drain Current  180

Linear Derating Factor 0.77 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche Energy 230 mJ
Avalanche Current 28 A
Repetitive Avalanche Energy 12 mJ

Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)

Thermal Resistance

Parameter Typ. Max. Units

R

θJC

R

θCS

R

θJA

Junction-to-Case ––– 1.3
Case-to-Sink, Flat, Greased Surface 0.24 ––– °C/W
Junction-to-Ambient ––– 40

°C

8/25/97

IRFP044N

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions

V

(BR)DSS

∆V

(BR)DSS

R

DS(on)

V

GS(th)

g

fs

I

DSS

I

GSS

Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

L

D

L

S

C

iss

C

oss

C

rss

Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA

/∆T

Breakdown Voltage Temp. Coefficient ––– 0.017 ––– V/°C Reference to 25°C, ID = 1mA

J

Static Drain-to-Source On-Resistance ––– – –– 0.020 Ω VGS = 10V, ID = 29A 
Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
Forward Transconductance 16 ––– ––– S VDS = 25V, ID = 28A

Drain-to-Source Leakage Current

––– ––– 25

––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 V
Gate-to-Source Reverse Leakage ––– ––– -100

VDS = 55V, VGS = 0V

µA

= 20V

GS

nA

VGS = -20V
Total Gate Charge ––– ––– 61 ID = 28A
Gate-to-Source Charge ––– ––– 13 nC VDS = 44V
Gate-to-Drain ("Miller") Charge ––– ––– 24 VGS = 10V, See Fig. 6 and 13 
Turn-On Delay Time ––– 12 ––– VDD = 28V
Rise Time ––– 80 ––– ID = 28A
Turn-Off Delay Time ––– 43 ––– RG = 12Ω

ns
Fall Time ––– 52 ––– RD = 0.98Ω, See Fig. 10 
Internal Drain Inductance

Internal Source Inductance ––– –––

5.0

––– –––

13

Between lead,
6mm (0.25in.)

nH

from package

and center of die contact
Input Capacitance ––– 1500 ––– VGS = 0V
Output Capacitance ––– 450 ––– pF VDS = 25V
Reverse Transfer Capacitance –– – 1 60 ––– ƒ = 1.0MHz, See Fig. 5 

D

G

S

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units Conditions

I

S

I

SM

V

SD

t

rr

Q

rr

t

on

Notes:

 Repetitive rating; pulse width limited by

max. junction temperature. ( See fig. 11 )

 V

DD

RG = 25Ω, I

 I

SD

TJ ≤ 175°C

Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode) 

––– –––

––– –––

Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 29A, VGS = 0V 
Reverse Recovery Time ––– 72 110 ns TJ = 25°C, IF = 28A
Reverse Recovery Charge ––– 210 310 µC di/dt = -100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

 Pulse width ≤ 300µs; duty cycle ≤ 2%.

= 25V, starting TJ = 25°C, L = 410µH

= 28A. (See Figure 12)

AS

≤ 28A, di/dt ≤ 240A/µs, V

DD

≤ V

(BR)DSS

 Uses IRFZ46N data and test conditions

,

53

180

showing the

A

p-n junction diode.



D

G

S

IRFP044N

1000

VGS
TOP 15V
10V

8.0V

7.0V

6.0V

5.5V

5.0V
BOTT OM 4.5V

100

10

4.5V

D

I , D rain -to-S ourc e Current (A)

20µs PULSE WIDTH
T = 25° C

1

0.1 1 10 100

V , Drain-to-Source Voltage (V)

DS

C

Fig 1. Typical Output Characteristics

1000

1000

VGS
TOP 15V
10V

8.0V

7.0V

6.0V

5.5V

5.0V
BOTT OM 4.5V

100

10

D

I , Drain-to-Sou rce C urrent (A )

4.5V

20µs P ULSE W I DTH
T = 175°C

A

1

0.1 1 10 100

V , Drain-to-So urc e V oltag e (V)

DS

C

A

Fig 2. Typical Output Characteristics

2.5

I = 46A

D

T = 25°C

100

10

D

I , D ra in-to - So urc e Cu r re nt (A)

1

45678910

V , Ga te-to-Source Voltage (V )

GS

J

T = 175°C

J

V = 25 V

DS

20µs PULSE WIDTH

Fig 3. Typical Transfer Characteristics

2.0

1.5

1.0

(No rm a lized)

0.5

DS(on)

R , Dr ain -to-S ou rc e O n R e si stan ce

A

0.0

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

T , Ju nc tio n T em peratu r e (° C)

J

V = 10V

GS

A

Fig 4. Normalized On-Resistance

Vs. Temperature

IRFP044N

2800

2400

2000

1600

1200

C, C apac itance (pF)

800

400

0

1 10 100

V = 0V , f = 1 M Hz

GS

C = C + C , C S HORTE D

iss gs gd ds

C = C

rss gd

C = C + C

oss ds gd

C

iss

C

oss

C

rs s

V , Drai n-to -Sourc e Voltag e (V )

DS

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

1000

20

I = 28A

V , G ate- to-S o urce V oltag e (V)

16

12

8

4

GS

D

V = 44V

DS

V = 28V

DS

FOR TEST CIRCUIT

A

0

0 102030405060

Q , Tota l Gate Ch arge (nC )

G

SEE FIGURE 13

A

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

1000

OPERATIO N IN TH IS A R EA LIMITE D
B Y R

DS(on)

100

T = 175°C

J

T = 25°C

J

10

SD

I , Re vers e Dra in C urre nt (A)

1

0.4 0.8 1.2 1.6 2.0 2.4

V , Source-to-Drain Voltage (V)

SD

Fig 7. Typical Source-Drain Diode

Forward Voltage

V = 0V

GS

100

10

D

I , D rain Cu rr ent (A )

T = 2 5° C

C

T = 1 75°C

J

Single Pulse

A

1

1 10 100

V , Drain-to-Source Voltage (V)

DS

10µs

100µ s

1ms

10m s

A

Fig 8. Maximum Safe Operating Area

IRFP044N

+

-

R

D.U.T.

D

V

DD

V

60

50

R

DS

V

GS

G

40

30

20

D

I , Drain Current (A)

10

0

25 50 75 100 125 150 175

T , Case Temperature ( C)

C

°

Fig 9. Maximum Drain Current Vs.

Case Temperature

10

thJC

1

D = 0.50

10V

Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit

V

DS

90%

10%
V

GS

t

d(on)tr

t

d(off)tf

Fig 10b. Switching Time Waveforms

0.20

0.10

0.05

0.1

0.02

Thermal Response (Z )

0.01

0.01

0.00001 0.0001 0.001 0.01 0.1 1

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

SINGLE PULSE

(THERMAL RESPONSE)

Notes:

1. Duty factor D = t / t

2. Peak T = P x Z + T

t , Rectangular Pulse Duration (sec)

1

J DM thJC C

1 2

P

DM

t

1

t

2

IRFP044N

D.U.T.

I

AS

L

0.01Ω

+

V

DD

-

R

10 V

V

DS

G

t

p

Fig 12a. Unclamped Inductive Test Circuit

V

(BR)DSS

t

p

V

DD

V

DS

I

AS

Fig 12b. Unclamped Inductive Waveforms

500

400

300

200

100

AS

V = 2 5 V

E , S ingle Pu lse Ava lanche E nerg y (m J)

DD

0

25 50 75 100 125 150 175

Starting T , Junction Temperature (°C)

J

I
TOP 11A
20A
BOTTOM 28 A

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

Current Regulator

Same Type as D.U.T.

D

A

Q

G

10 V

Q

GS

V

G

Q

GD

Charge

Fig 13a. Basic Gate Charge Waveform

50KΩ

12V

.2µF

V

GS

.3µF

D.U.T.

3mA

I

G

Current Sampling Resistors

I

D

Fig 13b. Gate Charge Test Circuit

+

V

DS

-

IRFP044N

+

-

Peak Diode Recovery dv/dt Test Circuit





D.U.T

+

-

R

G

Driver Gate Drive

P.W.

+

Circuit Layout Considerations

• Low Stray Inductance



• Ground Plane

• Low Leakage Inductance
Current Transformer

-

• dv/dt controlled by R

• Driver same type as D.U.T.

controlled by Duty Factor "D"

• I

SD

• D.U.T. - Device Under Test

Period

-

D =



G

P.W.

Period

+

V

DD

VGS=10V

*

Reverse
Recovery
Current

Re-Applied
Voltage

D.U.T. ISDWaveform

Body Diode Forward

Current

D.U.T. VDSWaveform

Body Diode Forward Drop

Inductor Curent

Ripple ≤ 5%

* V

= 5V for Logic Level Devices

GS

Diode Recovery

dv/dt

Fig 14. For N-Channel HEXFETS

di/dt

V

DD

I

SD

IRFP044N

Package Outline

TO-247AC Outline

Dimensions are shown in millimeters (inches)

15.90 (.626)

15.30 (.602)

- B -

3.65 (.143)

3.55 (.140)

0.25 (.010)

- A -

5.50 (.217)

DMMB

- D -

2.50 (.089)

1.50 (.059)

5.30 (.209)

4.70 (.185)

4

20.30 (.800)

19.70 (.775)

123

14.80 (.583)

14.20 (.559)

2.40 (.094)

2.00 (.079)
2X

5.45 (.215)
2X

1.40 (.056)

3X

1.00 (.039)

0.25 (.010)

3.40 (.133)

3.00 (.118)

Part Marking Information

TO-247AC

EXAMPLE : THIS IS AN IRF1010

EX AMPLE : THIS IS AN I RFPE30

W ITH ASSEMBLY

W ITH ASS E MBLY

LOT C O D E 9 B1 M

LO T COD E 3A1Q

5. 50 (.2 17 )

2X

4. 50 (.1 77 )

- C -

4.30 (.170)

3.70 (.145)

M

INTERNATIONAL

INTERNATIONAL

R ECT IF IER

REC TIFIER

LOG O

LOG O

ASSEMBLY

ASSE MBLY
LOT CODE

LOT C O D E

CA

S

3X

2.60 (.102)

2.20 (.087)

IRFPE30

IRF1010

9246

3A1Q 9302

9B 1 M

NOTES:

1 DIMENSIONING & TOLERANCING
PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
3 CONFORMS TO JEDEC OUTLINE
TO-247-AC.

0.80 (.031)

0.40 (.016)

LEAD AS SIGNM ENT S

1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN

PART NUMBER

PART NUMBER

DATE CODE

DATE CODE

(YYWW)

(YYWW)

YY = YEAR

YY = YE AR

WW = WEEK

WW WEEK

A

A

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http://www.irf.com/ Data and specifications subject to change without notice. 8 /9 7

Note: For the most current drawings please refer to the IR website at:

http://www.irf.com/package/