Datasheet IRFL024ZPBF Datasheet

Page 1
PD - 95312A
IRFL024ZPbF
HEXFET® Power MOSFET
Features
l Advanced Process Technology l Ultra Low On-Resistance l 150°C Operating Temperature l Fast Switching l Repetitive Avalanche Allowed up to Tjmax l Lead-Free
Description
This HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on­resistance per silicon area. Additional features of this design are a 150°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in a wide variety of applications.
Absolute Maximum Ratings
Parameter Units
ID @ TA = 25°C
ID @ TA = 70°C
I
DM
PD @TA = 25°C
PD @TA = 25°C
V
GS
E
AS (Thermally limited)
E
(Tested )
AS
I
AR
E
AR
T
J
T
STG
Continuous Drain Current, V
Continuous Drain Current, V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage V
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
Operating Junction and
Storage Temperature Range °C
c i j
c
@ 10V (Silicon Limited)
GS
@ 10V
GS
i
d
g
i
Thermal Resistance
Parameter Typ. Max. Units
R
θ
JA
R
θ
JA
Junction-to-Ambient (PCB mount, steady state)
Junction-to-Ambient (PCB mount, steady state)
D
V
= 55V
DSS
G
R
S
ID = 5.1A
= 57.5mΩ
SOT-223
Max.
i
h
See Fig.12a, 12b, 15, 16
i j
––– 45
––– 120
5.1
4.1
41
2.8
1.0
0.02
± 20
13
32
-55 to + 150
A
W
W/°C
mJ
A
mJ
°C/W
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09/16/10
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IRFL024ZPbF
Electrical Ch
@ T
= 25°C (unl
ified)
∆
aracteristics
J
Parameter Min. Typ. Max. Units
V
(BR)DSS
V
(BR)DSS
R
DS(on)
V
GS(th)
gfs Forward Transconductance 6.2 ––– ––– S
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff.
oss
Drain-to-Source Breakdown Voltage 55 ––– ––– V
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.053 ––– V/°C
J
Static Drain-to-Source On-Resistance ––– 46.2 57.5
Gate Threshold Voltage 2.0 ––– 4.0 V
Drain-to-Source Leakage Current ––– ––– 20 µA
Gate-to-Source Forward Leakage ––– ––– 200 nA
Gate-to-Source Reverse Leakage ––– ––– -200
Total Gate Charge ––– 9.1 14
Gate-to-Source Charge ––– 1.9 ––– nC
Gate-to-Drain ("Miller") Charge ––– 3.9 –––
Turn-On Delay Time ––– 7.8 –––
Rise Time ––– 21 ––– ns
Turn-Off Delay Time ––– 30 –––
Fall Time ––– 23 –––
Input Capacitance ––– 340 –––
Output Capacitance ––– 68 –––
Reverse Transfer Capacitance ––– 39 ––– pF
Output Capacitance ––– 210 –––
Output Capacitance ––– 55 –––
Effective Output Capacitance ––– 93 –––
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Continuous Source Current ––– ––– 5.1
(Body Diode) A
Pulsed Source Current ––– ––– 41
(Body Diode)
c
Diode Forward Voltage ––– ––– 1.3 V
Reverse Recovery Time ––– 15 23 ns
Reverse Recovery Charge ––– 9.8 15 nC
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
 Limited by T
RG = 25Ω, I
, starting TJ = 25°C, L = 2.8mH
Jmax
= 3.1A, VGS =10V.
AS
Part not recommended for use above this value.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%. C
eff. is a fixed capacitance that gives the same
oss
charging time as C
V
.
DSS
oss
while V
is rising from 0 to 80%
DS
2 www.irf.com
ess otherwise spec
Conditions
VGS = 0V, ID = 250µA
Reference to 25°C, I
mΩ
––– ––– 250
Limited by T
Jmax
repetitive avalanche performance.
This value determined from sample failure population.
100% tested to this value in production.
When mounted on 1 inch square copper board.When mounted on FR-4 board using minimum
recommended footprint.
= 10V, ID = 3.1A
V
GS
VDS = VGS, ID = 250µA
V
= 25V, ID = 3.1A
DS
V
= 55V, VGS = 0V
DS
= 55V, VGS = 0V, TJ = 125°C
V
DS
= 20V
V
GS
= -20V
V
GS
I
= 3.1A
D
= 44V
V
DS
VGS = 10V
e
VDD = 28V
= 3.1A
I
D
= 53 Ω
R
G
VGS = 10V
e
VGS = 0V
= 25V
V
DS
ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
= 0V, VDS = 44V, ƒ = 1.0MHz
V
GS
= 0V, VDS = 0V to 44V
V
GS
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
T
= 25°C, IS = 3.1A, VGS = 0V
J
TJ = 25°C, IF = 3.1A, VDD = 28V
di/dt = 100A/µs
, see Fig.12a, 12b, 15, 16 for typical
e
= 1mA
D
e
G
f
D
S
e
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IRFL024ZPbF
100
TOP 15V
) A
( t n e
r
r u
C e
c
r u o S
­o
t
­n
i a
r D
,
D
I
BOTTOM 4.5V
10
VGS
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V 30µs PULSE WIDTH
1
Tj = 25°C
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
100
100
VGS
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
) A
( t n e
r
10
r u
C e
c
r u o S
­o
t
­n
i a
r D
,
D
I
TOP 15V
BOTTOM 4.5V
1
30µs PULSE WIDTH
0.1
Tj = 150°C
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
12
)
Α
(
t n e
r
r u
C e
c
r
10
u o S
­o
t
­n
i a
r D
,
D
I
TJ = 25°C
TJ = 150°C
V
= 25V
DS
30µs PULSE WIDTH
1.0 4 5 6 7 8 9 10
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
) S
(
10
e c n a
t c
8
u d n o c s
6
n a
r T
d
r
4
a w
r o F ,
s
2
f
G
0
024681012
ID,Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
TJ = 25°C
TJ = 150°C
V
DS
= 10V
vs. Drain Current
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IRFL024ZPbF
10000
) F
1000
p
( e c n a
t
i c a p a
C ,
100
C
10
V
= 0V, f = 1 MHZ
GS
C
= C
= C
= C
+ Cgd, C
gs
gd
+ C
ds
iss
C
rss
C
oss
C
iss
C
oss
C
rss
1 10 100
VDS, Drain-to-Source Voltage (V)
SHORTED
ds
gd
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
100
) V
( e
g a
t
l o V
e c
r u o S
­o
t
­e
t a
G ,
V
12.0 ID= 3.1A
10.0
8.0
6.0
4.0
S G
2.0
0.0 0246810
VDS= 44V
VDS= 28V
VDS= 11V
Q
Total Gate Charge (nC)
G
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
1000
OPERATION IN THIS AREA
) A
( t n e
r
r u
C n
i a
r
10
D e
s
r e v e
R ,
D S
I
1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
TJ = 150°C
VSD, Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
TJ = 25°C
V
GS
= 0V
) A
( t
100
n e
r
r u
C e
c
r u
10
o S
­o
t
­n
i a
r D
1
, I
TA = 25°C
D
Tj = 150°C Single Pulse
0.1 1 10 100 1000
Fig 8. Maximum Safe Operating Area
LIMITED BY RDS(on)
100µsec
1msec
10msec
VDS, Drain-to-Source Voltage (V)
Forward Voltage
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IRFL024ZPbF
τ
6
5
) A
(
4
t n e
r
r u
C
3
n
i a
r D
2
,
D
I
1
0
25 50 75 100 125 150
TA ,Ambient Temperature (°C)
Fig 9. Maximum Drain Current vs.
Ambient Temperature
100
2.0
e c n a
t s
i s e
R n O e
c
r u o S
­o
t
­n
i a
r D
,
) n o
( S D
R
ID = 3.1A
V
= 10V
GS
1.5
) d e z
i
l a
m
r o
N
(
1.0
0.5
-60 -40 -20 0 20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
vs. Temperature
0.1
D = 0.50
10
0.20
0.10
0.05
R
R
R
2
3
R
2
τ
2
τ
2
Ri (°C/W) τi (sec)
R
3
τ
C
τ
3
5.0477 0.000463
19.9479 0.636160
τ
3
20.0169 21.10000
Notes:
J
τ
1
τ
1
Ci= τi/Ri
1
R
1
1
0.02
0.01
τ
J
τ
SINGLE PULSE ( THERMAL RESPONSE )
)
A J h
t
Z (
e s n o p s e
R l a
m
r e h T
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.01
1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10 100
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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IRFL024ZPbF
A
15V
DRIVER
+
-
V
DD
R
20V
V
V
DS
G
GS
L
D.U.T
I
AS
Ω
0.01
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
Q
GD
60
) J
m
( y
50
g
r e n E
e
40
h c n a
l a v
30
A e
s
l u P
20
e
l g n
i S
10
,
S A
E
0
25 50 75 100 125 150
TOP 0.77A
BOTTOM3.1A
Starting TJ , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
4.0
I
D
0.89A
) V
V
G
Charge
Fig 13a. Basic Gate Charge Waveform
L
0
1K
DUT
VCC
( e
g
3.5
a
t
l o V
d
l o h s
3.0
e
r h
t e
t a
G
) h
2.5
t
( S G
V
2.0
-75 -50 -25 0 25 50 75 100 125 150
ID = 250µA
TJ , Temperature ( °C )
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage vs. Temperature
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IRFL024ZPbF
10
Duty Cycle = Single Pulse
) A
(
1
t n e
r
r u
C e
h c n a
l
0.1
a v
A
0.01
1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01
0.01
0.05
0.10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆Tj = 25°C due to avalanche losses
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
14
TOP Single Pulse
12
) J
m
(
10
y g
r e n E
8
e h c n
6
a
l a v A ,
4
R A
E
2
0
25 50 75 100 125 150
BOTTOM 1% Duty Cycle ID = 3.1A
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T every part type.
2. Safe operation in Avalanche is allowed as long asT not exceeded.
. This is validated for
jmax
jmax
3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.
4. P
avalanche pulse.
= Average power dissipation per single
D (ave)
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I
= Allowable avalanche current.
av
7. ∆T = Allowable rise in junction temperature, not to exceed
T
(assumed as 25°C in Figure 15, 16).
jmax
t
Average time in avalanche.
av =
D = Duty cycle in avalanche = t Z
(D, tav) = Transient thermal resistance, see figure 11)
thJC
P
= 1/2 ( 1.3·BV·Iav) = DT/ Z
D (ave)
I
2DT/ [1.3·BV·Zth]
av =
E
= P
AS (AR)
·f
av
D (ave)·tav
thJC
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is
Page 8
IRFL024ZPbF
Reverse Recovery Current
Driver Gate Drive
D.U.T. ISDWaveform
D.U.T. VDSWaveform
Inductor Curent
* V
GS
D.U.T
+
-
R
G
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
-
• Low Leakage Inductance Current Transformer
-
• dv/dt controlled by R
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
G
+
V
DD
Re-Applied Voltage
+
-
Period
P.W.
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
= 5V for Logic Level Devices
D =
P. W .
Period
VGS=10V
V
DD
I
SD
*
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
R
D.U.T.
D
+
V
DD
-
V
DS
V
GS
R
G
10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10% V
GS
t
d(on)tr
t
d(off)tf
Fig 18b. Switching Time Waveforms
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Page 9
SOT-223 (TO-261AA) Package Outline
Dimensions are shown in milimeters (inches)
IRFL024ZPbF
SOT-223 (TO-261AA) Part Marking Information
HEXFET PRODUCT MARKING
THIS IS AN IRF L014
INTERNATIONAL
RECTIF IER
LOGO 314P
FL014
TOP
PAR T NUMBE R
DAT E CODE (YYWW) YY = YEAR WW = WEEK P = DE S IGNAT E S L E AD- F RE E
PRODUCT (OPT IONAL)
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
www.irf.com 9
LOT CODE
A = ASSEMBLY SITE
CODE
AXXXX
BOT TOM
Page 10
IRFL024ZPbF
SOT-223 (TO-261AA) Tape & Reel Information
Dimensions are shown in milimeters (inches)
4.10 (.161)
2.05 (.080)
330.00 (13.000) MAX.
1.95 (.077)
12.10 (.475)
11.90 (.469)
13.20 (.519)
12.80 (.504)
TR
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION: MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA- 541.
3. EACH O330.00 (13.00) REEL CONTAINS 2,500 DEVICES.
3.90 (.154)
1.85 (.072)
1.65 (.065)
7.55 (.297)
7.45 (.294)
1.60 (.062)
1.50 (.059) TYP.
7.10 (.279)
6.90 (.272)
15.40 (.607)
11.90 (.469)
4
7.60 (.299)
7.40 (.292)
0.35 (.013)
0.25 (.010)
16.30 (.641)
15.70 (.619)
2.30 (.090)
2.10 (.083)
50.00 (1.969) MIN.
NOTES :
1. OUTLINE COMFORMS TO EIA-418-1.
2. CONTROLLING DIMENSION: MILLIMETER..
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTOR TION @ OUTER EDGE.
14.40 (.566)
12.40 (.488)
3
18.40 (.724) MAX.
4
Data and specifications subject to change without notice.
This product has been designed for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 09/2010
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