Datasheet irfib7n50lpbf Datasheet

IRFIB7N50LPbF

S

D

G

V

Trr

I

A

Absolute Maximum Ratings

ID @ TC = 25°C

Continuous Drain Current, V

@ 10V

ID @ TC = 100°C

Continuous Drain Current, V

@ 10V

I

PD @TC = 25°C

V

Peak Diode Recovery dv/dt

24

V/ns

T

Diode Characteristics

Units

(Body Diode)

p-n junction diode.

t

TJ = 25°C, I

= 6.8A

TJ = 125°C, di/dt = 100A/µs

Q

TJ = 25°C, I

= 6.8A, V

= 0V

TJ = 125°C, di/dt = 100A/µs

I

TJ = 25°C

)

Document Number: 91177

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1

SMPS MOSFET

Applications

• Zero Voltage Switching SMPS

• Telecom and Server Power Supplies

• Uninterruptible Power Supplies

• Motor Control applications

• Lead-Free

Features and Benefits

• SuperFast body diode eliminates the need for external diodes in ZVS applications.

• Lower Gate charge results in simpler drive requirements.

• Enhanced dv/dt capabilities offer improved ruggedness.

• Higher Gate voltage threshold offers improved noise

immunity

DM

GS

dv/dt

J

STG

.

Parameter Max. Units

GS

Pulsed Drain Current Power Dissipation 46 W

Linear Derating Factor 0.37 W/°C Gate-to-Source Voltage ±30 V

Operating Junction and -55 to + 150 Storage Temperature Range °C

Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Mounting torque, 6-32 or M3 screw

c

e

DSSRDS(on)

500V

6.8

4.3 A 27

10lbxin (1.1Nxm)

PD - 95750

HEXFET® Power MOSFET

typ.

320mΩ

TO-220 Full-Pak

typ.

85ns 6.8

D

Symbol Parameter Min. Typ. Max.

I

S

I

SM

V

SD

rr

RRM

t

on

Conditions

Continuous Source Current ––– ––– 6.8 MOSFET symbol (Body Diode) A showing the

Pulsed Source Current ––– ––– 27 integral reverse

c

T

Diode Forward Voltage ––– ––– 1.5 V Reverse Recovery Time ––– 85 130 ns

––– 130 200

Reverse Recovery Charge ––– 280 420 nC

––– 570 860 Reverse Recovery Current ––– 5.9 8.9 A Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD

= 25°C, IS = 6.8A, VGS = 0V

J

F

S

GS

f

8/23/04

IRFIB7N50LPbF

Symbol

Parameter

Min.

Typ.

Max.

Units

V

Drain-to-Source Breakdown Voltage

500

–––

V∆V

/∆T

Breakdown Voltage Temp. Coefficient

–––

0.44

–––

V/°C

R

Static Drain-to-Source On-Resistance

–––

0.32

0.38ΩV

Gate Threshold Voltage

3.0

–––

5.0

V

I

Drain-to-Source Leakage Current

–––

–––50µA

–––

2.0mAI

Gate-to-Source Forward Leakage

–––

100nAGate-to-Source Reverse Leakage

–––

-100

RGInternal Gate Resistance

–––

0.88

–––

Dynamic @ T

= 25°C (unless otherwise specifi ed)

Symbol

Parameter

Min.

Typ.

Max.

Units

gfs

Forward Transconductance

4.7

–––

–––SQgTotal Gate Charge

–––

–––92QgsGate-to-Source Charge

–––

–––24nC

QgdGate-to-Drain ("Miller") Charge

–––

–––44t

Turn-On Delay Time

–––23–––

trRise Time

–––36–––nst

Turn-Off Delay Time

–––47–––

tfFall Time

–––19–––

C

Input Capacitance

–––

2220

–––

C

Output Capacitance

–––

230

–––

C

Reverse Transfer Capacitance

–––23–––

C

Output Capacitance

–––

2780

–––pFVGS = 0V, V

= 1.0V, ƒ = 1.0MHz

C

Output Capacitance

–––63–––

VGS = 0V, V

= 400V, ƒ = 1.0MHz

C

eff.

Effective Output Capacitance

–––

140

–––

C

eff. (ER)

Effective Output Capacitance

–––

100

–––

Avalanche Characteristics

Symbol

EASSingle Pulse Avalanche Energy

d

–––mJIARAvalanche Current

c

–––AEARRepetitive Avalanche Energy

c

–––

mJ

Thermal Resistance

Symbol

Parameter

Typ.

Units

R

Junction-to-Case

–––

°C/W

R

Junction-to-Ambient

–––

Conditions

Max.

Document Number: 91177

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2

Static @ TJ = 25°C (unless otherwise specifi ed)

(BR)DSS

DS(on)

GS(th)

DSS

GSS

d(on)

d(off)

iss

oss

rss

oss

J

(Energy Related)

VGS = 0V, ID = 250µA Reference to 25°C, I

= 10V, ID = 4.1A

V

GS

VDS = VGS, ID = 250µA

= 500V, VGS = 0V

V

DS

= 400V, VGS = 0V, TJ = 125°C

V

DS

VGS = 30V V

= -30V

GS

f = 1MHz, open drain

Ω

VDS = 50V, ID = 4.1A

= 6.8A

I

D

= 400V

V

DS

= 10V, See Fig. 7 & 16

V

GS

VDD = 250V

= 6.8A

I

D

Ω

= 9.0

R

G

= 10V, See Fig. 11a & 11b

V

GS

VGS = 0V

= 25V

V

DS

ƒ = 1.0MHz, See Fig. 5

= 0V,VDS = 0V to 400V

V

GS

= 1mA

D

f

DS

g

θJC

θJA

Notes:

 Repetitive rating; pulse width limited by

max. junction temperature. (See Fig. 12).

 Starting T

I

AS

 I

SD

dv/dt = 24V/ns, TJ ≤ 150°C.

= 25°C, L = 24mH, RG = 25Ω,

J

= 6.8A, (See Figure 14).

≤ 6.8, di/dt ≤ 650A/µs, V

Parameter Typ. Units

Max.

550



6.8

4.6

2.69 65

 Pulse width ≤ 300µs; duty cycle ≤ 2%.  C

eff. is a fixed capacitance that gives the same charging time

oss

DD

≤ V

(BR)DSS

as C

,

while V

oss

C

eff.(ER) is a fixed capacitance that stores the same energy

oss

as C

while VDS is rising from 0 to 80% V

oss

is rising from 0 to 80% V

DS

DSS

.

IRFIB7N50LPbF

Document Number: 91177

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3

100

TOP 15V

) A

(

10

t n e

r

r u

C e

c

r u o S

o

t

n

i a

r D

,

D

I

BOTTOM 5.0V

1

0.1

0.01

VGS

10V

8.0V

7.0V

6.5V

6.0V

5.5V

5.0V

60µs PULSE WIDTH

≤

Tj = 25°C

0.1 1 10 100 VDS, Drain-to-Source Voltage (V)

100

)

Α

(

t n e

r

10

r u

C e

c

r u o S

o

t

n

1

i a

r D

,

D

I

TJ = 175°C

TJ = 25°C

V

= 50V

DS

≤

60µs PULSE WIDTH

0.1 3 4 5 6 7 8 9

VGS, Gate-to-Source Voltage (V)

100

TOP 15V

) A

( t n e

r

10

r u

C e

c

r u o S

o

t

n

i a

r D

, I

BOTTOM 5.0V

1

D

VGS

10V

8.0V

7.0V

6.5V

6.0V

5.5V

5.0V

60µs PULSE WIDTH

≤

Tj = 150°C

0.1

0.1 1 10 100 VDS, Drain-to-Source Voltage (V)

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

3.0

e c n a

t s

i s e

R n O e

c

r u o S

o

t

n

i a

r D

,

) n o

( S D

R

ID = 6.8A V

= 10V

GS

2.5

2.0

) d e z

i

l

1.5

a m

r o

N

(

1.0

0.5

0.0

-60 -40 -20 0 20 40 60 80 100 120 140 160

TJ , Junction Temperature (°C)

Fig 3. Typical Transfer Characteristics

Fig 4. Normalized On-Resistance

vs. Temperature

IRFIB7N50LPbF

Document Number: 91177

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4

100000

10000

) F p

( e c n a

t

i

1000

c a p a

C ,

C

100

10

V

= 0V, f = 1 MHZ

GS

C

= C

iss rss oss

= C

gs

gd

ds

C

oss

C

rss

C C

1 10 100 1000

VDS, Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance vs.

Drain-to-Source Voltage

12.0 ID= 6.8A

)

10.0

V

( e

g a

t

l

8.0

o V

e c

r u

6.0

o S

o

t

e

t

4.0

a G

,

S G

2.0

V

0.0 0 10203040506070

VDS= 400V

Q

Total Gate Charge (nC)

G

+ Cgd, C

+ C

gd

iss

SHORTED

ds

) J µ

( y

g

r e n E

100.00

) A

( t

10.00

n e

r

r u

C n

i a

r

1.00

D e

s

r e v e

R ,

0.10

D S

I

0.01

12

10

8

6

4

2

0

0 50 100 150 200 250 300 350 400 450 500 550

V

Drain-to-Source Voltage (V)

DS,

Fig 6. Typ. Output Capacitance

Stored Energy vs. V

TJ = 150°C

0.0 0.2 0.4 0.6 0.8 1.0 1.2 VSD, Source-to-Drain Voltage (V)

TJ = 25°C

DS

V

GS

= 0V

Fig 7. Typical Gate Charge vs.

Gate-to-Source Voltage

Fig 8. Typical Source-Drain Diode

Forward Voltage

IRFIB7N50LPbF

+

-

V 9

1 V

Document Number: 91177

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5

) A

( t n e

r

r u

C e

c

r u o S

o

t

n

i a

r D ,

I

100

10

1

0.1

D

OPERATION IN THIS AREA LIMITED BY RDS(on)

DC

Tc = 25°C

100µsec

1msec

Tj = 150°C Single Pulse

0.01

10msec

1 10 100 1000 10000

VDS, Drain-to-Source Voltage (V)

Fig 9. Maximum Safe Operating Area

7

6

)

5

A

( t n e

r

4

r u

C n

i

3

a

r D ,

D

2

I

1

0

25 50 75 100 125 150

TC , Case Temperature (°C)

Fig 10. Maximum Drain Current vs.

Case Temperature

R

V

DS

V

GS

R

G

D

D.U.T.

10V

Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %

Fig 11a. Switching Time Test Circuit

DS

0%

V

DD

0%

GS

t

d(on)tr

t

d(off)tf

Fig 11b. Switching Time Waveforms

IRFIB7N50LPbF

τ

C

Document Number: 91177

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6

10

0.1

1

D = 0.50

0.20

0.10

0.05

0.02

0.01

SINGLE PULSE ( THERMAL RESPONSE )

τ

J

τ

J

τ

1

τ

1

Ci= τi/Ri

R

1

R

1

τ

R

2

3

R

2

τ

2

Ri (°C/W) τi (sec)

R

3

τ

0.2965 0.001144

τ

3

0.9847 0.151939

τ

3

1.4118 1.705500

Notes:

1. Duty Factor D = t1/t2

)

C J h

t

Z (

e s n o p s e

R l a

m

r e h T

0.01

0.001

2. Peak Tj = P dm x Zthjc + Tc

0.0001 1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10 100

t1 , Rectangular Pulse Duration (sec)

Fig 12. Maximum Effective Transient Thermal Impedance, Junction-to-Case

5.0

) V

( e

g

4.0

a

t

l o V

d

l o h s

3.0

e

r h

t e

t a

G

) h

2.0

t

( S G

V

ID = 250µA

1.0

-75 -50 -25 0 25 50 75 100 125 150

TJ , Temperature ( °C )

Fig 13. Threshold Voltage vs.Temperature

V

S

Current Regulator

I

A

2500

Document Number: 91177

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7

) J

m

( y

g

r

2000

e n E

e h c

1500

n a

l a v A

e s

1000

l u P

e

l g n

i

500

S ,

S A

E

0

25 50 75 100 125 150

TOP 1.4A

BOTTOM6.8A

Starting TJ , Junction Temperature (°C)

Fig 14. Maximum Avalanche Energy

vs. Drain Current

IRFIB7N50LPbF

I

D

1.7A

15V

DRIVER

+

-

V

R

G

20V

V

DS

t

L

D.U.T

I

AS

Ω

0.01

p

Fig 15a. Unclamped Inductive Test Circuit

Same Type as D.U.T.

50KΩ

.2µF

12V

V

GS

.3µF

D.U.T.

3mA

I

G

Current Sampling Resistors

+

V

D

-

I

D

Fig 16a. Gate Charge Test Circuit

DD

V

(BR)DSS

t

p

AS

Fig 15b. Unclamped Inductive Waveforms

Q

G

10 V

Q

GS

G

Q

GD

Charge

Fig 16b. Basic Gate Charge Waveform

IRFIB7N50LPbF

R V

+

-

Document Number: 91177

www.vishay.com

8

Peak Diode Recovery dv/dt Test Circuit

+





D.U.T

-

R

G

Driver Gate Drive

P.W.

+

Circuit Layout Considerations

• Low Stray Inductance



• Ground Plane

• Low Leakage Inductance Current Transformer

-



-

• dv/dt controlled by R

• Driver same type as D.U.T.

G

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

Period

D =

Period

P. W .

+

V

DD

VGS=10V

*

Reverse Recovery Current

e-Applied

oltage

D.U.T. ISDWaveform

Body Diode Forward

Current

D.U.T. VDSWaveform

Body Diode Forward Drop

Inductor Curent

Ripple ≤ 5%

* V

= 5V for Logic Level Devices

GS

di/dt

Diode Recovery

dv/dt

V

I

SD

Fig 17. For N-Channel HEXFET® Power MOSFETs

DD

TO-220 Full-Pak Package Outline

Document Number: 91177

www.vishay.com

9

Dimensions are shown in millimeters (inches)

IRFIB7N50LPbF

TO-220 Full-Pak Part Marking Information

EXAMPLE: THIS IS AN IRFI840G

TO-220AB FullPak package is not recommended for Surface Mount Application.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

WITH ASSEMBLY LOT CODE 3432 ASS E MBLED ON WW 24 199 9 IN THE ASSEMBLY LINE "K"

Note: "P" in assembly line position indicates "Lead-Free"

INT E RN AT IONAL

R E CTIF IE R

LOGO

ASSEMBLY LOT CODE

IR FI84 0G

924K

34 32

PAR T NUMBER

DATE CODE YE AR 9 = 199 9 WEEK 24 LINE K

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.

Qualification Standards can be found on IR’s Web site.

TAC Fax: (310) 252-7903

08/04

Legal Disclaimer Notice

Vishay

Notice

The products described herein were acquired by Vishay Intertechnology, Inc., as part of its acquisition of International Rectifier’s Power Control Systems (PCS) business, which closed in April 2007. Specifications of the products displayed herein are pending review by Vishay and are subject to the terms and conditions shown below.

Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.

Information contained herein is intended to provide a product description only. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.

The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Vishay for any damages resulting from such improper use or sale.

International Rectifier are registered trademarks of International Rectifier Corporation in the U.S. and other countries. All other product names noted herein may be trademarks of their respective owners.

®

, IR®, the IR logo, HEXFET®, HEXSense®, HEXDIP®, DOL®, INTERO®, and POWIRTRAIN

®

Document Number: 99901 www.vishay.com Revision: 12-Mar-07 1