Page 1
PD - 9.1487B
TO-220 FULLPAK
PRELIMINARY
IRFI9540N
HEXFET® Power MOSFET
l Advanced Process Technology
l Isolated Package
l High Voltage Isolation = 2.5KVRMS
l Sink to Lead Creepage Dist. = 4.8mm
l P-Channel
l Fully Avalanche Rated
G
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use
in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial
applications. The moulding compound used provides
a high isolation capability and a low thermal resistance
between the tab and external heatsink. This isolation
is equivalent to using a 100 micron mica barrier with
standard TO-220 product. The Fullpak is mounted to
a heatsink using a single clip or by a single screw
fixing.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ -10V -15
ID @ TC = 100°C Continuous Drain Current, VGS @ -10V -10 A
I
DM
PD @TC = 25°C Power Dissipation 54 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt -5.0 V/ns
T
J
T
STG
Pulsed Drain Current -76
Linear Derating Factor 0.36 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche Energy 430 mJ
Avalanche Current -11 A
Repetitive Avalanche Energy 5.4 mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
Junction-to-Case ––– 2.8
Junction-to-Ambient ––– 65
D
V
R
DS(on)
= -100V
DSS
= 0.117Ω
ID = -15A
S
°C/W
°C
3/16/98
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IRFI9540N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C Drain to Sink Capacitance ––– 12 ––– ƒ = 1.0MHz
Drain-to-Source Breakdown Voltage -100 ––– ––– V VGS = 0V, ID = -250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– -0.11 ––– V/°C Reference to 25°C, ID = -1mA
J
Static Drain-to-Source On-Resistance ––– ––– 0.117 Ω VGS = -10V, ID = -7.8A
Gate Threshold Voltage -2.0 ––– -4.0 V VDS = VGS, ID = -250µA
Forward Transconductance 5.3 ––– ––– S VDS = -50V, ID = -11A
Drain-to-Source Leakage Current
––– ––– -25
––– ––– -250 VDS = -80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100
VDS = -100V, VGS = 0V
µA
nA
VGS = -20V
Total Gate Charge ––– ––– 97 ID = -11A
Gate-to-Source Charge ––– ––– 15 nC VDS = -80V
Gate-to-Drain ("Miller") Charge ––– ––– 51 VGS = -10V, See Fig. 6 and 13
Turn-On Delay Time ––– 15 ––– VDD = -50V
Rise Time ––– 67 ––– ID = -11A
Turn-Off Delay Time ––– 51 ––– RG = 5.1Ω
ns
Fall Time ––– 51 ––– RD = 4.2Ω, See Fig. 10
4.5
Internal Drain Inductance
Internal Source Inductance ––– –––
––– –––
7.5
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
Input Capacitance ––– 1300 ––– VGS = 0V
Output Capacitance ––– 400 ––– VDS = -25V
Reverse Transfer Capacitance ––– 240 ––– ƒ = 1.0MHz, See Fig. 5
pF
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting T
RG = 25Ω, I
I
SD
TJ ≤ 175°C
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
Diode Forward Voltage ––– ––– -1.6 V TJ = 25°C, IS = -7.8A, VGS = 0V
Reverse Recovery Time ––– 150 220 ns TJ = 25°C, IF = -11A
Reverse Recovery Charge ––– 830 1200 nC di/dt = -100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
= 25°C, L = 7.1mH
J
= -11A. (See Figure 12)
AS
≤ -11A, di/dt ≤ -470A/µs, V
DD
≤ V
(BR)DSS
t=60s, ƒ=60Hz
Uses IRF9540N data and test conditions
,
-15
-76
showing the
A
p-n junction diode.
D
G
S
Page 3
IRFI9540N
A
A
A
)
A
100
VGS
TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
10
D
-I , Dra in-to-S ou rc e Current (A)
-4.5 V
20µs PU LS E WIDT H
T = 25°C
1
0.1 1 10 100
-V , D ra in-to-Sourc e V o ltage (V)
DS
c
Fig 1. Typical Output Characteristics
100
100
VGS
TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
10
D
-I , D ra in- to- S ou rc e C u rre n t (A )
-4.5 V
20µs PU LS E WIDTH
T = 175°C
1
0.1 1 10 100
-V , D ra in-to-S o u rce V o ltage (V )
DS
C
Fig 2. Typical Output Characteristics
2.5
I = -19A
D
T = 25°C
J
T = 175°C
10
1
D
-I , Dr a in -to-S our c e Cu r rent ( A)
0.1
45678910
-V , G a te - to -S o urc e V o ltage (V
GS
J
V = -25V
DS
20µs PULSE W IDTH
Fig 3. Typical Transfer Characteristics
2.0
1.5
1.0
(N o rmaliz e d)
0.5
DS(on)
R , D ra in -to -S o u rc e On R e sis ta n c e
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Tem pe rature (°C)
J
Fig 4. Normalized On-Resistance
Vs. Temperature
V = -10 V
GS
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IRFI9540N
A
A
A
A
3000
2500
2000
1500
1000
C, Capacitance (pF)
500
0
1 10 100
V = 0V, f = 1M H z
GS
C = C + C , C S H O RTE D
iss g s g d d s
C = C
rss g d
C = C + C
oss d s g d
C
iss
C
oss
C
rss
-V , Drain-to-Source Voltage (V)
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
20
I = -11 A
D
V = -80 V
DS
V = -50 V
16
12
GS
8
4
DS
V = -20 V
DS
-V , Gate -to -S o u rc e Volta g e (V )
FOR TEST CIRCUIT
0
0 20406080100
Q , To ta l Gate Cha rg e (n C)
G
SEE FIGURE 13
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
O P E R A T IO N IN T H IS A R E A L IM IT E D
BY R
DS(on)
10
T = 175°C
J
T = 25°C
J
1
SD
-I , R e ve rs e D ra in C u rre nt (A )
0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
-V , Source-to-Drain Voltage (V)
SD
V = 0V
Fig 7. Typical Source-Drain Diode
GS
100
100µs
10
D
-I , Drain C urrent (A)
T = 2 5° C
C
T = 175°C
J
Single P ulse
1
1 10 100 1000
-V , D ra in-to-S o u rce V o ltage (V )
DS
1ms
10ms
Fig 8. Maximum Safe Operating Area
Forward Voltage
Page 5
IRFI9540N
15
10
5
D
-I , Drain Current (A)
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
R
D.U.T.
D
-
+
V
DS
V
GS
R
G
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
GS
10%
90%
V
DS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
V
DD
thJC
D = 0.50
1
0.20
0.10
0.05
0.1
0.02
0.01
Thermal Response (Z )
0.01
0.00001 0.0001 0.001 0.01 0.1 1 10
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
t , Rectangular Pulse Duration (sec)
1
J DM thJC C
1 2
P
DM
t
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Page 6
IRFI9540N
(BR)
A
L
D.U.T
I
AS
0.01
t
p
DRIVER
Ω
15V
V
DD
R
-20 V
V
DS
G
Fig 12a. Unclamped Inductive Test Circuit
I
AS
t
p
V
DSS
1200
1000
A
800
600
400
200
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting T , Junction Temperature (°C)
J
I
TO P -4.7A
D
-8.1A
BOTTO M -11A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Q
G
-10V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T .
-3mA
I
G
Current Sampling Resistors
V
DS
+
I
D
Fig 13b. Gate Charge Test Circuit
Page 7
IRFI9540N
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
+
-
-
+
R
G
V
GS
• dv/dt controlled by R
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
+
V
DD
-
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D =
P.W.
Period
VGS=10V
[ ] ***
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. ISDWaveform
Body Diode Forward
Current
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
*** V
= 5.0V for Logic Level and 3V Drive Devices
GS
di/dt
Diode Recovery
dv/dt
Fig 14. For P-Channel HEXFETS
V
DD
[ ]
I
[ ]
SD
Page 8
IRFI9540N
A
A
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
10.60 (.417)
10.40 (.409)
16.00 (.630)
15.80 (.622)
1 2 3
13.70 (.540)
13.50 (.530)
1.40 (.055)
3X
1.05 (.042)
2.54 (.100)
2 X
3X
Part Marking Information
TO-220 Fullpak
EXAMPLE : THIS IS AN IRF1010
E X A MP L E : T H IS IS AN IRF I8 4 0 G
WITH ASSEMBLY
W IT H A S SE MB L Y
L OT C OD E E 4 0 1
LO T C O D E 9 B 1 M
3.70 (.145)
3.20 (.126)
1.15 (.045)
MIN.
3.30 (.130)
3.10 (.122)
0.90 (.035)
0.70 (.028)
0.25 (.010)
3.40 (.133)
ø
3.10 (.123)
- A -
- B -
M
4.80 (.189)
4.60 (.181)
7.10 (.280)
6.70 (.263)
A M B
INTE RNATIONAL
INTERNATIONAL
RECTIFIER
R E CT IF IE R
LO GO
L OG O
ASSEMBLY
ASSEMBLY
LO T C OD E
L O T C O DE
2.80 (.110)
2.60 (.102)
NOTES:
1 DIMENSIONING & TOLERANCING
PE R ANSI Y14.5M , 1982
2 CONTROLLING DIMENSION: INCH.
0.48 (.019)
3X
0.44 (.017)
2.85 (.112)
2.65 (.104)
IRF1010
IRFI840G
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
MINIMUM CREEPAGE
DISTANCE BETW E EN
A-B-C-D = 4.80 (.189)
PART NUMBER
PART NUM BER
9246
9B 1M
E401 9245
DATE CODE
(YYW W)
YY = YE AR
WW = WEEK
C
D
A
B
DATE CODE
(YYWW )
YY = YEAR
WW = WEEK
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/ Data and specifications subject to change without notice. 3/98
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