Page 1
PD - 9.1527
TO-220 FULLPAK
PRELIMINARY
IRFI9520N
HEXFET® Power MOSFET
l Advanced Process Technology
l Isolated Package
l High Voltage Isolation = 2.5KVRMS
l Sink to Lead Creepage Dist. = 4.8mm
l P-Channel
l Fully Avalanche Rated
G
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use
in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial
applications. The moulding compound used provides
a high isolation capability and a low thermal resistance
between the tab and external heatsink. This isolation
is equivalent to using a 100 micron mica barrier with
standard TO-220 product. The Fullpak is mounted to
a heatsink using a single clip or by a single screw
fixing.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ -10V -5.5
ID @ TC = 100°C Continuous Drain Current, VGS @ -10V -3.9 A
I
DM
PD @TC = 25°C Power Dissipation 30 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt -5.0 V/ns
T
J
T
STG
Pulsed Drain Current -27
Linear Derating Factor 0.2 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche Energy 140 mJ
Avalanche Current -4.0 A
Repetitive Avalanche Energy 3.0 mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
Junction-to-Case ––– 5.0
Junction-to-Ambient ––– 65
D
V
R
DS(on)
= -100V
DSS
= 0.48Ω
ID = -5.5A
S
°C/W
°C
3/16/98
Page 2
IRFI9520N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C Drain to Sink Capacitance ––– 12 ––– ƒ = 1.0MHz
Drain-to-Source Breakdown Voltage -100 ––– ––– V VGS = 0V, ID = -250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– -0.10 ––– V/°C Reference to 25°C, ID = -1mA
J
Static Drain-to-Source On-Resistance ––– ––– 0.48 Ω VGS = -10V, ID = -4.0A
Gate Threshold Voltage -2.0 ––– -4.0 V VDS = VGS, ID = -250µA
Forward Transconductance 1.4 ––– ––– S VDS = -50V, ID = -4.0A
Drain-to-Source Leakage Current
––– ––– -2 5
––– ––– -250 VDS = -80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100
VDS = -100V, VGS = 0V
µA
nA
VGS = -20V
Total Gate Charge ––– ––– 27 ID = -4.0A
Gate-to-Source Charge ––– ––– 5.0 nC VDS = -80V
Gate-to-Drain ("Miller") Charge ––– ––– 15 VGS = -10V, See Fig. 6 and 13
Turn-On Delay Time ––– 14 ––– VDD = -50V
Rise Time ––– 47 ––– ID = -4.0A
Turn-Off Delay Time ––– 28 ––– RG = 22Ω
ns
Fall Time ––– 31 ––– RD = 12Ω, See Fig. 10
4.5
Internal Drain Inductance
Internal Source Inductance ––– –––
––– –––
7.5
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
Input Capacitance ––– 350 ––– VGS = 0V
Output Capacitance – –– 110 ––– VDS = -25V
Reverse Transfer Capacitance ––– 70 ––– ƒ = 1.0MHz, See Fig. 5
pF
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting T
RG = 25Ω, I
I
SD
TJ ≤ 175°C
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
Diode Forward Voltage ––– ––– -1.6 V TJ = 25°C, IS = -3.1A, VGS = 0V
Reverse Recovery Time ––– 100 150 ns TJ = 25°C, IF = -4.0A
Reverse Recovery Charge ––– 420 630 µC di/dt = -100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
= 25°C, L = 18mH
J
= -4.0A. (See Figure 12)
AS
≤ -4.0A, di/dt ≤ -300A/µs, V
DD
≤ V
(BR)DSS
t=60s, ƒ=60Hz
Uses IRF9520N data and test conditions
,
-5.5
-27
showing the
A
p-n junction diode.
D
G
S
Page 3
IRFI9520N
100
10
1
D
-I , Drain-to-Source Current (A)
0.1
0.1 1 10 100
VGS
TOP
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
BOTTOM
-4.5V
-4.5V
20µs PULSE WIDTH
T = 25 C
J
-V , Drain-to-Source Voltage (V)
DS
°
Fig 1. Typical Output Characteristics,
100
100
10
1
D
-I , Drain-to-Source Current (A)
0.1
0.1 1 10 100
VGS
TOP
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
BOTTOM
-4.5V
-4.5V
20µs PULSE WIDTH
T = 175 C
J
-V , Drain-to-Source Voltage (V)
DS
°
Fig 2. Typical Output Characteristics,
2.5
I =
D
-5.2A
T = 175 C
J
10
T = 25 C
J
1
D
-I , Drain-to-Source Current (A)
V = 10V
DS
0.1
4 5 6 7 8 9 10
-V , Gate-to-Source Voltage (V)
GS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
°
°
2.0
1.5
1.0
(Normalized)
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature( C)
J
V =
GS
°
-10V
Fig 4. Normalized On-Resistance
Vs. Temperature
Page 4
IRFI9520N
800
600
400
C, Capacitance (pF)
200
0
1 10 100
V
=
0V,
GS
C
=
iss gs gd , ds
C
=
rss gd
C
=
oss ds gd
C
iss
C
oss
C
rss
-V , Drain-to-Source Voltage (V)
DS
f = 1MHz
C
+ C
C SHORTED
C
C
+ C
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
°
T = 175 C
J
10
20
I =
-4.0 A
D
16
12
8
4
GS
-V , Gate-to-Source Voltage (V)
0
0 5 10 15 20 25
Q , Total Gate Charge (nC)
G
V =-80V
DS
V =-50V
DS
V =-20V
DS
FOR TEST CIRCUIT
SEE FIGURE
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
OPERATION IN THIS AREA LIMITED
10
BY R
DS(on)
10us
100us
13
°
T = 25 C
J
1
SD
-I , Reverse Drain Current (A)
V = 0 V
0.1
0.2 0.8 1.4 2.0 2.6
-V ,Source-to-Drain Voltage (V)
SD
GS
Fig 7. Typical Source-Drain Diode
Forward Voltage
1ms
1
D
-I , Drain Current (A)I , Drain Current (A)
°
= 25 C
C
T T= 175 C
Single Pulse
0.1
1 10 100 1000
°
J
-V , Drain-to-Source Voltage (V)
DS
10ms
Fig 8. Maximum Safe Operating Area
Page 5
IRFI9520N
6.0
4.0
2.0
D
-I , Drain Current (A)
0.0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
R
D.U.T.
D
-
+
V
DS
V
GS
R
G
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
GS
10%
90%
V
DS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
V
DD
D = 0.50
thJC
Thermal Response (Z )
0.01
0.20
1
0.10
0.05
0.02
0.01
0.1
0.00001 0.0001 0.001 0.01 0.1 1
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
t , Rectangular Pulse Duration (sec)
1
J DM thJC C
1 2
P
DM
t
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Page 6
IRFI9520N
(BR)
L
D.U.T
I
AS
0.01
p
DRIVER
Ω
15V
V
DD
R
V
G
-20 V
DS
t
Fig 12a. Unclamped Inductive Test Circuit
I
AS
t
p
V
DSS
400
TOP
I
D
-1.7A
-2.8A
A
300
200
100
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting T , Junction Temperature( C)
J
BOTTOM
-4.0A
°
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Q
G
-10V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T .
-3mA
I
G
Current Sampling Resistors
V
DS
+
I
D
Fig 13b. Gate Charge Test Circuit
Page 7
IRFI9520N
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
+
-
-
+
R
G
V
GS
• dv/dt controlled by R
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
+
V
DD
-
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D =
P.W.
Period
VGS=10V
[ ] ***
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. ISDWaveform
Body Diode Forward
Current
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
*** V
= 5.0V for Logic Level and 3V Drive Devices
GS
di/dt
Diode Recovery
dv/dt
Fig 14. For P-Channel HEXFETS
V
DD
[ ]
I
[ ]
SD
Page 8
IRFI9520N
A
A
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
10.60 (.417)
10.40 (.409)
16.00 (.630)
15.80 (.622)
1 2 3
13.70 (.540)
13.50 (.530)
1.40 (.055)
3X
1.05 (.042)
2.54 (.100)
2 X
3X
Part Marking Information
TO-220 Fullpak
EXAMPLE : THIS IS AN IRF1010
E X A MPLE : T HIS IS AN IRFI8 4 0G
WITH ASSEMBLY
W IT H ASS E MBL Y
L OT C O DE E 4 01
LO T C O D E 9 B 1 M
3.70 (.145)
3.20 (.126)
1.15 (.045)
MIN.
3.30 (.130)
3.10 (.122)
0.90 (.035)
0.70 (.028)
0.25 (.010)
3.40 (.133)
ø
3.10 (.123)
- A -
- B -
M
4.80 (.189)
4.60 (.181)
7.10 (.280)
6.70 (.263)
A M B
INTERNATIONAL
INTERNATIONAL
RECTIFIER
R E CT IFIER
LO GO
L OGO
ASSEMBLY
ASSEMBLY
LO T C ODE
L O T C O DE
2.80 (.110)
2.60 (.102)
NOTES:
1 DIMENSIONING & TOLERANCING
PE R ANSI Y14.5M, 1982
2 CONTROLLING DIMENSION: INCH.
0.48 (.019)
3X
0.44 (.017)
2.85 (.112)
2.65 (.104)
IRF1010
IRFI840G
LEAD ASSIGNMENTS
1 - GA TE
2 - DR A IN
3 - SO U RCE
MINIMUM CREEPAGE
DISTANCE BETW E EN
A-B-C-D = 4.80 (.189)
PART NUMBER
PART NUM BER
9246
9B 1M
E401 9245
DATE CODE
(YYW W)
YY = YE AR
WW = WEEK
C
D
A
B
DATE CODE
(YYWW )
YY = YEAR
WW = WEEK
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ki, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/ Data and specifications subject to change without notice. 3/98
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