Datasheet irfi4905 Datasheet

Page 1
PD - 9.1526A
TO-220 FULLPAK
IRFI4905
HEXFET® Power MOSFET
l Advanced Process Technology l Isolated Package l High Voltage Isolation = 2.5KVRMS  l Sink to Lead Creepage Dist. = 4.8mm l P-Channel l Fully Avalanche Rated
G
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. The moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ -10V -41 ID @ TC = 100°C Continuous Drain Current, VGS @ -10V -29 A I
DM
PD @TC = 25°C Power Dissipation 63 W
V
GS
E
AS
I
AR
E
AR
dv/d t Peak Diode Recovery dv/dt  -5.0 V/ns T
J
T
STG
Pulsed Drain Current  -260
Linear Derating Factor 0.42 W/°C Gate-to-Source Voltage ± 20 V Single Pulse Avalanche Energy 930 mJ Avalanche Current -38 A Repetitive Avalanche Energy 6.3 mJ
Operating Junction and -55 to + 175 Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Mounting torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
Junction-to-Case ––– 2.4 Junction-to-Ambient ––– 65
D
S
V
R
DS(on)
DSS
= -41A
I
D
= -55V
= 0.02Ω
°C/W
°C
8/25/97
Page 2
IRFI4905
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage -55 ––– ––– V VGS = 0V, ID = -250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– -0.05 –– – V/°C Reference to 25°C, ID = -1mA
J
Static Drain-to-Source On-Resistance – –– ––– 0.02 Ω VGS = -10V, ID = -22A Gate Threshold Voltage -2.0 ––– -4.0 V VDS = VGS, ID = -250µA Forward Transconductance 21 ––– ––– S VDS = -25V, ID = -38A
Drain-to-Source Leakage Current
––– ––– -25
––– ––– -250 VDS = -44V, VGS = 0V, TJ = 150°C Gate-to-Source Forward Leakage ––– ––– 1 00 V Gate-to-Source Reverse Leakage ––– ––– -100
VDS = -55V, VGS = 0V
µA
= 20V
GS
nA
VGS = -20V Total Gate Charge ––– ––– 180 ID = -38A Gate-to-Source Charge ––– –– – 32 nC VDS = -44V Gate-to-Drain ("Miller") Charge ––– ––– 86 VGS = -10V, See Fig. 6 and 13  Turn-On Delay Time ––– 18 ––– VDD = -28V Rise Time ––– 99 ––– ID = -38A Turn-Off Delay Time ––– 61 ––– RG = 2.5Ω
ns Fall Time ––– 96 ––– RD = 0.72Ω, See Fig. 10 Internal Drain Inductance
Internal Source Inductance ––– –––
4.5
––– –––
7.5
Between lead, 6mm (0.25in.)
nH
from package
and center of die contact Input Capacitance ––– 3400 ––– VGS = 0V Output Capacitance ––– 1400 ––– pF VDS = -25V Reverse Transfer Capacitance ––– 640 –– – ƒ = 1.0MHz, See Fig. 5
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting T
RG = 25Ω, I
I
SD
TJ ≤ 175°C
Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode) 
––– –––
––– –––
Diode Forward Voltage ––– ––– -1.6 V TJ = 25°C, IS = -22A, VGS = 0V Reverse Recovery Time ––– 89 130 ns TJ = 25°C, IF = -38A Reverse RecoveryCharge ––– 230 350 µC di/dt = -100A/µs Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
= 25°C, L = 1.3mH
J
= -38A. (See Figure 12)
AS
≤ -38A, di/dt ≤ -270A/µs, V
DD
≤ V
(BR)DSS
t=60s, ƒ=60Hz
Uses IRF4905 data and test conditions
,
-41
-260
showing the
A
p-n junction diode.

D
G
S
Page 3
IRFI4905
1000
VGS TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V BO T T OM - 4. 5V
100
10
D
-I , Drain-to-S ource C urrent (A)
-4.5V
20µs PULSE WIDTH T = 25°C
1
0.1 1 10 100
-V , Drain -to -S o urc e V o ltag e ( V)
DS
c
Fig 1. Typical Output Characteristics
1000
1000
VGS TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V BO T T OM - 4. 5V
100
10
D
-I , Drain-to-Source Current (A )
-4.5V
20µs PULSE WIDTH T = 175°C
A
1
0.1 1 10 100
-V , Drain-to-So urc e V oltag e (V )
DS
C
A
Fig 2. Typical Output Characteristics
2.0
I = -64 A
D
T = 25°C
100
10
D
-I , Drain- to - S o ur c e C ur r e n t ( A)
1
45678910
-V , G ate - to -S ourc e V o l ta g e (V)
GS
J
T = 175°C
J
V = - 2 5V
DS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
1.5
1.0
(No rm a lized)
0.5
DS(on)
R , D rain -to-S ou rc e O n R e si stan ce
A
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Ju nc tion Temperat ure ( °C )
J
V = - 1 0V
GS
A
Fig 4. Normalized On-Resistance
Vs. Temperature
Page 4
IRFI4905
7000
6000
5000
4000
3000
C, C apac itance (pF)
2000
1000
0
1 10 100
V = 0V , f = 1MHz
GS
C = C + C , C SHORTED
iss gs gd ds
C = C
rss gd
C = C + C
oss ds g d
C
iss
C
oss
C
rs s
-V , Drain -to-So urc e V oltag e (V)
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
20
I = -38A
D
V = -4 4 V
16
12
8
4
GS
DS
V = -2 8 V
DS
-V , Ga te-to- So u rce V oltag e (V )
FOR TEST CIRCUIT
A
0
0 40 80 120 160 200
Q , Total G ate C ha rge (n C )
G
SEE FIGURE 13
A
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
O PERATION IN T HIS ARE A LIM ITED BY R
DS(on)
100
T = 175°C
J
T = 25°C
J
10
SD
-I , R everse D rain Current (A )
V = 0V
1
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
-V , Source-to-Drain Voltage (V)
SD
GS
Fig 7. Typical Source-Drain Diode
Forward Voltage
100
100µs
1ms
10
D
-I , Dra in C u rren t (A)
T = 25 ° C
C
T = 17 5 ° C
J
A
Sin gle Pulse
1
1 10 100
-V , Drain-to-So urc e V olta ge (V )
DS
10ms
A
Fig 8. Maximum Safe Operating Area
Page 5
IRFI4905
+
-
50
40
30
20
D
-I , Drain Current (A)
10
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
R
V
DS
V
GS
R
G
D
D.U.T.
-10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
GS
10%
90% V
DS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
V
DD
thJC
D = 0.50
1
0.20
0.10 P
1 2
DM
t
1
t
2
0.05
0.1
0.02
Thermal Response (Z )
0.01
0.01
SINGLE PULSE
(THERMAL RESPONSE)
0.00001 0.0001 0.001 0.01 0.1 1 10
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
J DM thJC C
Page 6
IRFI4905
L
D.U.T
I
AS
0.01
t
p
DRIVER
Ω
15V
V
DD
R
G
-20V
V
DS
Fig 12a. Unclamped Inductive Test Circuit
I
AS
t
p
V
(BR)DSS
2500
I
D
TO P - 16 A
-27A
2000
A
1500
1000
500
AS
E , S in gle Pulse A valanche Energ y (m J)
0
25 50 75 100 125 150 175
Starting T , Junction Temperature (°C)
J
BO TTOM -3 8A
A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Q
G
-10V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T .
-3mA
I
G
Current Sampling Resistors
I
­V
DS
+
D
Fig 13b. Gate Charge Test Circuit
Page 7
IRFI4905
+
-
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance Current Transformer
-
+
-
-
+
R
G
V
GS
• dv/dt controlled by R
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
V
DD
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D =
P.W.
Period
VGS=10V
[ ] ***
Reverse Recovery Current
Re-Applied Voltage
D.U.T. ISDWaveform
Body Diode Forward
Current
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
*** V
= 5.0V for Logic Level and 3V Drive Devices
GS
Fig 14. For P-Channel HEXFETS
di/dt
Diode Recovery
dv/dt
V
DD
[ ]
I
[ ]
SD
Page 8
IRFI4905
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
10.60 (.417)
10.40 (.409)
16.00 (.630)
15.80 (.622)
1 2 3
13.70 (.540)
13.50 (.530)
1.40 (.055)
3X
1.05 (.042)
2.54 (.100) 2X
3X
Part Marking Information
TO-220 Fullpak
EXAMPLE : THIS IS AN IRFI840G
EXAMPLE : THIS IS AN IRF1010
WITH AS SEM BL Y
W ITH ASSEMBLY
LOT C OD E E4 01
LOT C O D E 9 B1 M
3.70 (.145)
3.20 (.126)
1.15 (.045) MIN .
3.30 (.130)
3.10 (.122)
0.90 (.035)
0.70 (.028)
0.25 (.010)
3.40 (.133)
ø
3.10 (.123)
- A -
- B -
M
4.80 (.189)
4.60 (.181)
7.10 (.280)
6.70 (.263)
A M B
INTERNATIONAL
INT ERN ATIO NAL
R ECT IFIER
RE CTIFIER
LOG O
LOGO
ASSEMBLY
AS SE M BL Y
LOT C O D E
LO T CO D E
2.80 (.110)
2.60 (.102)
NOTES: 1 DIMEN SIONING & TOLERANCING
PER AN S I Y14.5M , 1982 2 CO N TR OLLING DIMEN S ION: INCH.
0.48 (.019)
3X
0.44 (.017)
2.85 (.112)
2.65 (.104)
IRF1010
IRFI840G
LEAD ASSI G NMENTS 1 - G A TE 2 - D RAIN 3 - SO URCE
MINIM UM CRE EPAGE DISTANCE BETWEEN A-B-C -D = 4.80 (.189)
PART NUMBER
PART NU MBE R
9246
E401 9245
9B 1 M
DATE CODE
DATE CODE
(YYWW)
(YYWW )
YY = YEAR
YY = YE AR
WW = WEEK
WW = WEEK
C
D
A
B
A
A
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
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IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
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http://www.irf.com/ Data and specifications subject to change without notice. 8/97
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