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PD - 9.1374B
TO-220 FULLPAK
IRFI3205
HEXFET® Power MOSFET
l Advanced Process Technology
l Ultra Low On-Resistance
l Isolated Package
l High Voltage Isolation = 2.5KVRMS
l Sink to Lead Creepage Dist. = 4.8mm
l Fully Avalanche Rated
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
G
D
V
= 55V
DSS
R
S
DS(on)
I
D
= 0.008Ω
= 64A
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 64
@ TC = 100°C Continuous Drain Current, VGS @ 10V 45 A
I
D
I
DM
PD @TC = 25°C Power Dissipation 63 W
V
GS
E
AS
I
AR
E
AR
dv/d t Peak Diode Recovery dv/dt 5.0 V/ns
T
J
T
STG
Pulsed Drain Current 390
Linear Derating Factor 0.42 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche Energy 480 mJ
Avalanche Current 59 A
Repetitive Avalanche Energy 6.3 mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
Junction-to-Case ––– 2.4 °C/W
Junction-to-Ambient ––– 65 °C/W
°C
8/25/97
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IRFI3205
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C Drain to Sink Capacitance ––– 12 ––– ƒ = 1.0MHz
Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.057 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance ––– ––– 0.008 Ω VGS = 10V, ID = 34A
Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
Forward Transconductance 42 ––– –– – S VDS = 25V, ID = 59A
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– – –– 100 V
Gate-to-Source Reverse Leakage ––– ––– -100
VDS = 55V, VGS = 0V
µA
= 20V
GS
nA
VGS = -20V
Total Gate Charge ––– – – – 170 ID = 59A
Gate-to-Source Charge –– – – –– 32 nC VDS = 44V
Gate-to-Drain ("Miller") Charge ––– ––– 74 VGS = 10V, See Fig. 6 and 13
Turn-On Delay Time ––– 14 ––– VDD = 28V
Rise Time ––– 100 ––– ID = 59A
Turn-Off Delay Time ––– 43 ––– RG = 2.5Ω
ns
Fall Time ––– 70 ––– RD = 0.39Ω, See Fig. 10
Internal Drain Inductance
Internal Source Inductance ––– –––
4.5
––– –––
7.5
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
Input Capacitance ––– 4000 ––– VGS = 0V
Output Capacitance ––– 1300 ––– VDS = 25V
Reverse Transfer Capacitance ––– 480 – –– ƒ = 1.0MHz, See Fig. 5
pF
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
V
DD
RG = 25Ω, I
I
SD
TJ ≤ 175°C
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 34A, VGS = 0V
Reverse Recovery Time ––– 110 170 ns TJ = 25°C, IF = 59A
Reverse RecoveryCharge ––– 450 680 µC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
= 25V, starting TJ = 25°C, L = 190µH
= 59A. (See Figure 12)
AS
≤ 59A, di/dt ≤ 290A/µs, V
DD
≤ V
(BR)DSS
,
t=60s, ƒ=60Hz
Uses IRF3205 data and test conditions
64
390
showing the
A
p-n junction diode.
D
G
S
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IRFI3205
1000
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTT OM 4.5V
100
D
I , D rain-to-Source C urrent (A)
10
0.1 1 10 100
V , D rain-to-Source Voltage (V)
DS
4.5V
20µs PULSE WIDTH
T
J
T = 2 5 ° C
C
Fig 1. Typical Output Characteristics
1000
1000
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTT OM 4.5V
100
4.5V
D
I , D rain-to-Sou rce C urrent (A )
20µs PUL SE W IDTH
T
T = 175°C
J
A
10
0.1 1 10 100
V , Drain-to-So urc e V oltag e (V)
DS
C
A
Fig 2. Typical Output Characteristics
2.0
I = 98A
D
T = 25°C
J
T = 175°C
100
10
D
I , Dra in -to-Sou r ce Curr ent (A)
1
45678910
V , Ga te-to-S o urce Voltage (V)
GS
J
V = 25 V
DS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
1.5
1.0
(No rm alized)
0.5
DS(on)
R , D rain -to-S o urc e O n R e si stan ce
A
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Ju nc tion Tempe ratur e (°C )
J
V = 1 0V
GS
A
Fig 4. Normalized On-Resistance
Vs. Temperature
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IRFI3205
8000
7000
6000
5000
4000
3000
V = 0 V, f = 1 MHz
GS
C = C + C , C SH ORTED
iss gs gd ds
C = C
rss gd
C = C + C
oss ds gd
C
iss
C
oss
C, C apac itance (pF)
2000
1000
C
rs s
0
1 10 100
V , Drai n-to -Source V olt ag e (V )
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
20
I = 59A
D
V = 4 4V
DS
V = 2 8V
DS
V = 1 1V
DS
V , G a te-to- So u rce Voltage (V )
16
12
8
4
GS
FOR TEST CIRCUIT
A
0
0 30 60 90 120 150 180
Q , Total Ga te Ch arg e (nC)
G
SEE FIGUR E 13
A
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
T = 175°C
J
100
T = 25 °C
J
SD
I , Rev ers e Dr ain C u rren t (A)
10
0.6 1.0 1.4 1.8 2.2 2.6 3.0
V , Source-to-Drain Voltage (V)
SD
V = 0V
Fig 7. Typical Source-Drain Diode
Forward Voltage
GS
10µs
100
100µs
1ms
10
D
I , D rain Cu rren t (A )
T = 2 5°C
C
T = 1 75°C
J
A
Single Pulse
1
1 10 100
V , Drain-to-So urc e Vo ltag e (V)
DS
10ms
A
Fig 8. Maximum Safe Operating Area
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IRFI3205
+
-
70
60
50
40
30
D
I , Drain Current (A)
20
10
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
R
V
DS
V
GS
R
G
D
D.U.T.
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
V
DD
thJC
D = 0.50
1
0.20
0.10
P
1 2
DM
t
1
t
2
0.05
0.1
0.02
Thermal Response (Z )
0.01
SINGLE PULSE
(THERMAL RESPONSE)
0.01
0.00001 0.0001 0.001 0.01 0.1 1 10
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
J DM thJC C
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IRFI3205
D.U.T .
I
AS
L
0.01Ω
+
V
DD
-
R
10 V
V
DS
G
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
V
DD
V
DS
I
AS
1200
1000
800
600
400
200
AS
V = 25V
E , S in gle Pu lse Ava lanche E nerg y (mJ)
DD
0
25 50 75 100 125 150 175
Starting T , Junction Temperature (°C)
J
I
TOP 24A
4 2 A
BOTTOM 59A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
D
A
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
V
G
Q
GD
Charge
Current Regulator
Same Type as D.U.T.
12V
V
GS
Fig 13b. Gate Charge Test CircuitFig 13a. Basic Gate Charge Waveform
50KΩ
.2µF
.3µF
3mA
Current Sampling Resistors
+
V
D.U.T.
I
G
I
D
DS
-
Page 7
IRFI3205
+
-
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
• dv/dt controlled by R
• Driver same type as D.U.T.
controlled by Duty Factor "D"
• I
SD
• D.U.T. - Device Under Test
Period
-
D =
G
P.W.
Period
+
V
DD
VGS=10V
*
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. ISDWaveform
Body Diode Forward
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
* V
= 5V for Logic Level Devices
GS
Fig 14. For N-Channel HEXFETS
Current
di/dt
Diode Recovery
dv/dt
V
DD
I
SD
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IRFI3205
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
10.60 (.417)
10.40 (.409)
16.00 (.630)
15.80 (.622)
1 2 3
13.70 (.540)
13.50 (.530)
1.40 (.055)
3X
1.05 (.042)
2.54 (.100)
2X
3X
Part Marking Information
TO-220 Fullpak
EXAMPLE : THIS IS A N IRFI840G
EXAMPLE : THIS IS AN IRF1010
WITH AS SEM BL Y
W ITH ASSEMBLY
LOT C OD E E 4 01
LOT CODE 9 B 1 M
3.40 (.133)
ø
3.10 (.123)
- A -
3.70 (.145)
3.20 (.126)
1.15 (.045)
MIN.
3.30 (.130)
3.10 (.122)
0.90 (.035)
0.70 (.028)
0.25 (.010) M A M B
- B -
4.80 (.189)
4.60 (.181)
7.10 (.280)
6.70 (.263)
INTERNATIONAL
INT ERN ATION AL
R ECT IF IE R
RE CTIFIER
LOG O
LOGO
ASSEMBLY
AS SE M BL Y
LOT CODE
LO T CO D E
2.80 (.110)
2.60 (.102)
NO TE S:
1 DIMEN SIONING & TOLERAN C ING
PE R ANS I Y14.5M, 1982
2 CON T R OLLING DIMENSION: INCH.
0.48 (.019)
3X
0.44 (.017)
2.85 (.112)
2.65 (.104)
IRF1010
IRFI840G
LEAD ASSIGNMENTS
1 - GATE
2 - DRA IN
3 - SOU RCE
MINIMUM CREEPAGE
DISTANC E BET W EEN
A-B-C-D = 4.80 (.189)
9246
E401 9245
9B 1 M
C
D
A
B
PART NUM BER
PART NU MBE R
DATE CODE
DATE CODE
(YYWW)
(YYWW )
YY = YEAR
YY = YE AR
WW = WEEK
WW = WEEK
A
A
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/ Data and specifications subject to change without notice. 8/ 97
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