Page 1
PD - 9.1373A
TO-220 FULLPAK
IRFI1010N
HEXFET® Power MOSFET
l Advanced Process Technology
l Isolated Package
l High Voltage Isolation = 2.5KVRMS
l Sink to Lead Creepage Dist. = 4.8mm
l Fully Avalanche Rated
G
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 49
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 35 A
I
DM
PD @TC = 25°C Power Dissipation 58 W
V
GS
E
AS
I
AR
E
AR
dv/d t Peak Diode Recovery dv/dt 5.0 V/ns
T
J
T
STG
Pulsed Drain Current 290
Linear Derating Factor 0.38 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche Energy 360 mJ
Avalanche Current 43 A
Repetitive Avalanche Energy 5.8 mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
Junction-to-Case ––– 2.6
Junction-to-Ambient ––– 65
D
R
DS(on)
V
DSS
= 55V
= 0.012Ω
ID = 49A
S
°C/W
°C
8/25/97
Page 2
IRFI1010N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C Drain to Sink Capacitance ––– 12 ––– ƒ = 1.0MHz
Drain-to-Source Breakdown Voltage 55 –– – ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.06 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance ––– ––– 0.012 Ω VGS = 10V, ID = 26A
Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
Forward Transconductance 30 ––– ––– S VDS = 25V, ID = 43A
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 V
Gate-to-Source Reverse Leakage ––– – –– -100
VDS = 55V, VGS = 0V
µA
= 20V
GS
nA
VGS = -20V
Total Gate Charge ––– ––– 130 ID = 43A
Gate-to-Source Charge ––– – –– 23 nC VDS = 44V
Gate-to-Drain ("Miller") Charge ––– ––– 53 VGS = 10V, See Fig. 6 and 13
Turn-On Delay Time ––– 11 ––– VDD = 28V
Rise Time ––– 66 ––– ID = 43A
Turn-Off Delay Time ––– 40 ––– RG = 3.6Ω
ns
Fall Time ––– 46 ––– RD = 0.62Ω, See Fig. 10
Internal Drain Inductance
Internal Source Inductance ––– –––
4.5
––– –––
7.5
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
Input Capacitance ––– 2900 ––– VGS = 0V
Output Capacitance ––– 880 ––– VDS = 25V
Reverse Transfer Capacitance ––– 330 ––– ƒ = 1.0MHz, See Fig. 5
pF
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
V
DD
RG = 25Ω, I
I
SD
TJ ≤ 175°C
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
Diode Forward Voltage ––– –– – 1.3 V TJ = 25°C, IS = 26A, VGS = 0V
Reverse Recovery Time – – – 81 1 2 0 ns TJ = 25°C, IF = 43A
Reverse RecoveryCharge ––– 240 370 nC di/dt = 100A/µs
Pulse width ≤ 300µs; duty cycle ≤ 2%.
= 25V, starting TJ = 25°C, L = 390µH
= 43A. (See Figure 12)
AS
≤ 43A, di/dt ≤ 260A/µs, V
DD
≤ V
(BR)DSS
,
t=60s, ƒ=60Hz
Uses IRF1010N data and test conditions
49
290
showing the
A
p-n junction diode.
D
G
S
Page 3
IRFI1010N
1000
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTT OM 4.5V
100
D
I , D rain-to-Sou rce C urrent (A )
4.5V
10
0.1 1 10 100
V , D rain-to-Source Voltage (V)
DS
1000
20µs PULSE WIDTH
T = 25° C
C
1000
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTT OM 4.5V
100
D
I , D rain-to-Sou rce C urrent (A )
4.5V
20µs P ULSE WIDTH
T = 175°C
A
10
0.1 1 10 100
V , Drain-to-So urc e V oltag e (V)
DS
C
A
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.0
I = 72A
D
T = 25°C
J
100
10
D
I , Dr a in -to- So u rce C urr en t (A)
1
45678910
V , Ga te-to-S o urce Voltage (V )
GS
T = 175°C
J
V = 25 V
DS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
2.5
2.0
1.5
(Norm a lized)
1.0
0.5
DS(on)
R , Drain -to-So urc e O n Re sis tan ce
A
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Ju nc tio n T em peratu r e (°C )
J
V = 10V
GS
A
Fig 4. Normalized On-Resistance
Vs. Temperature
Page 4
IRFI1010N
5000
4000
3000
2000
C, C apac itance (pF)
1000
0
1 10 100
V = 0V, f = 1MHz
GS
C = C + C , C SHORTED
iss gs gd ds
C = C
rss gd
C
C = C + C
iss
oss ds gd
C
oss
C
rs s
V , Drai n-to -Sourc e V olt ag e (V )
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
20
I = 43A
V , G ate- to-S ou rce V oltag e (V)
16
12
8
4
GS
D
V = 44V
DS
V = 28V
DS
FOR TEST CIRCUIT
A
0
0 20 40 60 80 100 120 140
Q , Total Ga te Ch arg e (nC)
G
SEE FIG URE 1 3
A
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
O PER ATION IN T HIS A R E A LI MITED
BY R
DS(on)
100
T = 175°C
J
T = 25°C
J
SD
I , Re ve rse Dr a in C ur rent ( A)
10
0.4 0.8 1.2 1.6 2.0 2.4 2.8
V , Source-to-Drain Voltage (V)
SD
V = 0V
Fig 7. Typical Source-Drain Diode
Forward Voltage
GS
10µs
100
100µs
10
D
I , Dra in C ur rent (A )
T = 25°C
C
T = 175°C
J
A
Single Pulse
1
1 10 100
V , Drain-to-So urc e Vo ltag e (V)
DS
1ms
10ms
A
Fig 8. Maximum Safe Operating Area
Page 5
IRFI1010N
+
-
R
D.U.T.
D
V
DD
V
50
40
R
DS
V
GS
G
30
20
D
I , Drain Current (A)
10
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
Fig 9. Maximum Drain Current Vs.
Fig 10a. Switching Time Test Circuit
V
DS
90%
°
10%
V
GS
Fig 10b. Switching Time Waveforms
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
t
d(on)tr
t
d(off)tf
Case Temperature
10
thJC
D = 0.50
1
0.20
0.10
0.05
0.1
0.02
Thermal Response (Z )
0.01
0.01
0.00001 0.0001 0.001 0.01 0.1 1 10
SINGLE PULSE
(THERMAL RESPONSE)
1. Duty factor D = t / t
2. Peak T =P x Z + T
t , Rectangular Pulse Duration (sec)
1
Notes:
J DM thJC C
1 2
P
DM
t
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Page 6
IRFI1010N
15V
DRIVER
+
-
R
20V
V
DS
G
t
L
D.U.T
I
AS
Ω
0.01
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
1000
800
600
V
DD
A
400
200
AS
V = 25V
E , Single Pu lse A valanche Energ y (mJ)
DD
0
25 50 75 100 125 150 175
Starting T , Junction Temperature (°C)
J
I
TOP 18A
31A
BOTTOM 43 A
D
A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Current Regulator
Same Type as D.U.T.
Q
G
10 V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
50KΩ
12V
.2µF
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
I
D
Fig 13b. Gate Charge Test Circuit
+
V
DS
-
Page 7
IRFI1010N
+
-
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
• dv/dt controlled by R
• Driver same type as D.U.T.
controlled by Duty Factor "D"
• I
SD
• D.U.T. - Device Under Test
Period
-
D =
G
P.W.
Period
+
V
DD
VGS=10V
*
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. ISDWaveform
Body Diode Forward
Current
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
* V
= 5V for Logic Level Devices
GS
Diode Recovery
dv/dt
Fig 14. For N-Channel HEXFETS
di/dt
V
DD
I
SD
Page 8
IRFI1010N
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
10.60 (.417)
10.40 (.409)
16.00 (.630)
15.80 (.622)
1 2 3
13.70 (.540)
13.50 (.530)
1.40 (.055)
3X
1.05 (.042)
2.54 (.100)
2X
3X
Part Marking Information
TO-220 Fullpak
EXAMPL E : THIS IS AN IRF1010
EXAMPLE : THIS IS A N IRFI840G
W ITH ASSEMBLY
WITH A S SEMBL Y
LOT C OD E E 4 01
L O T C O DE 9 B 1 M
ø
3.70 (.145)
3.20 (.126)
1.15 (.045)
MIN.
3.30 (.130)
3.10 (.122)
0.90 (.035)
0.70 (.028)
0.25 (.010)
3.40 (.133)
3.10 (.123)
- A -
- B -
M
4.80 (.189)
4.60 (.181)
7.10 (.280)
6.70 (.263)
A M B
INTERNATIO N AL
INT ERNATIONAL
R E CTIF IE R
RE CTIFIER
L O GO
LOGO
ASSEMBLY
AS SE M BL Y
LO T CODE
LO T CO D E
2.80 (.110)
2.60 (.102)
NOTES:
1 DIMENSIONING & TOLERANCING
PER A N SI Y1 4.5M, 1982
2 CO NTROLLING DIMENSION: INCH.
0.48 (.019)
3X
0.44 (.017)
2.85 (.112)
2.65 (.104)
IRF1010
IRFI840G
LEA D ASSIGNM EN T S
1 - G A TE
2 - D R A IN
3 - SO URCE
MINIMUM CREEPAGE
DISTA NCE BETW E EN
A-B-C -D = 4.80 (.189)
PART NUM BER
PART NU MBE R
9246
9B 1M
E401 9245
DATE CODE
(YYW W)
DATE CODE
(YYWW)
YY = YEAR
YY = YE AR
WW = WEEK
WW = WEEK
C
D
A
B
A
A
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/ Data and specifications subject to change without notice. 8/97
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