Datasheet IRFF9130 Datasheet (Intersil)

IRFF9130

Data Sheet February 1999

-6.5A, -100V, 0.300 Ohm, P-Channel Power
MOSFET

This P-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanchemodeofoperation.Allof
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.

Formerly developmental type TA17511.

Ordering Information

PART NUMBER PACKAGE BRAND

IRFF9130 TO-205AF IRFF9130

NOTE: When ordering, include the entire part number.

File Number 2216.3

Features

• -6.5A, -100V

•r

DS(ON)

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

= 0.300Ω

Symbol

D

G

S

Packaging

DRAIN
(CASE)

JEDEC TO-205AF

SOURCE

GATE

4-101

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

IRFF9130

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

IRFF9130 UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain to Gate Voltage (RGS = 20MΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

DGR

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Maximum Power Dissipation (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

DS

D

DM

GS

D

-100 V

-100 V

-6.5 A

-26 A

±20 V

25 W

Linear Derating Factor (Figure 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 W/oC

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T

AS

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

500 mJ

-55 to 150

300

o

C

o

C

NOTE:

1. TJ = 25oC to 125oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate to Threshold Voltage V

GS(TH)VGS

Zero-Gate Voltage Drain Current I

On-State Drain Current (Note 2) I

D(ON)VDS

Gate to Source Leakage I
Drain to Source On Resistance (Note 2) r

DS(ON)VGS

Forward Transconductance (Note 2) g

DSSVGS

DSS

GSS

fs

= 0V, ID = -250µA, (Figure 10) -100 - - V

= VDS, ID = -250µA -2.0 - -4.0 V
VDS = Rated BV
VDS = 0.8 x Rated BV

> I

D(ON) xrDS(ON)MAX,VGS

, VGS = 0V - - -25 µA

DSS

, VGS = 0V, TC = 125oC - - -250 µA

DSS

= -10V -6.5 - - A

VGS = ±20V - - ±100 nA

= -10V, ID = -3A, (Figures 8, 9) - 0.25 0.300 Ω
VDS≥ I

D(ON)

x r

DS(ON)MAX

, ID = -3A,

2.5 3.5 - S

(Figure 12)

Turn-On Delay Time t

d(ON)VDD

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Total Gate Charge

Q

g(TOT)VGS

(Gate to Source + Gate to Drain)
Gate to Source Charge Q
Gate to Drain “Miller” Charge Q
Input Capacitance C
Output Capacitance C
Reverse-Transfer Capacitance C
Internal Drain Inductance L

Internal Source Inductance L

Junction to Case R
Junction to Ambient R

r

f

gs
gd

ISS
OSS
RSS

D

S

θJC

θJA

= 0.5 x Rated BV
RL = 7.4Ω for BV
RL =5.8Ω for BV

DSS

DSS

(Figures 17, 18) MOSFET Switching Times are Es­sentially Independent of Operating Temperature

= -10V, ID = -6.5A, VDS = 0.8 x Rated BV

I

= -1.5mA, (Figures 14, 19, 20)

G(REF)

Gate Charge is Essentially Independent of
Operating Temperature

, I

DSS

= -100V

= -80V

≈ -6.5A, R

D

= 9.1Ω,

G

DSS,

-3060ns

- 70 140 ns

- 70 140 ns

- 70 140 ns

-2545nC

-13-nC

-12-nC

VGS = 0V, VDS = -25V, f = 1.0MHz, (Figure 11) - 500 - pF

- 300 - pF

- 100 - pF

Measured From the
Drain Lead, 5mm (0.2in)
From Package to Center
of Die

Measured From The
Source Lead, 5mm
(0.2in) From Header to
Source Bonding Pad

Modified MOSFET Sym­bol Showing the Internal
Devices
Inductances

D

L

D

G

L

S

S

- 5.0 - nH

-15-nH

- - 5.0

o

C/W

Typical Socket Mount - - 175oC/W

4-102

IRFF9130

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current I
Pulse Source to Drain Current

SD

I

SDM

(Note 3)

Source to Drain Diode Voltage (Note 2) V
Reverse Recovery Time t
Reverse Recovered Charge Q

NOTES:

2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD = 25V, starting TJ = 25oC, L = 17.75mH, RG = 25Ω, peak IAS= 6.5A. (Figures 15, 16).

Modified MOSFET
Symbol Showing the In­tegral Reverse

D

- - -6.5 A

- - -26 A

P-N Junction Diode

G

S

TC = 25oC, ISD= 6.5A, VGS = 0V (Figure 13) - - -1.5 V

SD

TJ = 150oC, ISD = 6.5A, dISD/dt = 100A/µs - 300 - ns

rr

TJ = 150oC, ISD = 6.5A, dISD/dt = 100A/µs - 1.8 - µC

RR

Typical Performance Curves Unless Otherwise Specified

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 25 50 75 100 150

TC, CASE TEMPERATURE (oC)

125

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

1

0.5

0.2

0.1

0.1

, NORMALIZED

θJC

Z

THERMAL IMPEDANCE

0.01
10

0.05

0.02

0.01
SINGLE PULSE

-5

-4

10

-3

10

t1, RECTANGULAR PULSE DURATION (s)

-7.0

-5.6

-4.2

-2.8

DRAIN CURRENT (A)

D,

I

-1.4

0

50 75 10025 150

TC,CASE TEMPERATURE (oC)

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

P

DM

t

1

t

2

NOTES:
DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-2

10

-1

10

1/t2

x R

θJC

1

θJC

125

+ T

C

10

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

4-103

IRFF9130

Typical Performance Curves Unless Otherwise Specified (Continued)

2

10

10

1

TC = 25oC

, DRAIN CURRENT (A)

TJ = MAX RATED

D

I

= 5.0oC/W

R

JC

SINGLE PULSE

0.1
110

VDS, DRAIN TO SOURCE VOLTAGE (V)

OPERATION IN THIS REGION
IS LIMITED BY r

DS(ON)

10µs
100µs

1ms

10ms

100ms

DC

100

-20

-16

-12

-8

, DRAIN CURRENT (A)

D

I

-4

0

VGS = -10V

-10 -20 -30 -400 -50
V

DS,

PULSE DURATION = 80µs

DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

-10

-8

-6

-4

, DRAIN CURRENT (A)

D

I

-2

0

VGS = -9V

VGS = -8V

-1 -2 -3 -40-5
V

DS,

VGS = -10V

VGS = -6V

PULSE DURATION = 80µs

VGS = -5V

VGS = -4V

DRAIN TO SOURCE VOLTAGE (V)

VGS = -7V

-20
V

> I

DS

PULSE DURATION = 80µs

-16

-12

-8

-4

, ON-STATE DRAIN CURRENT (A)

D(ON)

I

0

x r

D(ON)

VGS, GATE TO SOURCE VOLTAGE (V)

DS(ON)

TJ = 125oC

TJ = 25oC
TJ = -55oC

MAX

VGS = -9V

VGS = -8V

VGS = -7V

VGS = -6V

VGS = -5V
VGS = -4V

-8-6-4-20 -10

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

1.0

0.8

0.6

0.4

, DRAIN TO SOURCE

ON RESISTANCE

0.2

DS(ON)

r

0

VGS = -10V

-10 -20 -300 -50
ID,DRAIN CURRENT (A)

PULSE DURATION = 2µs

VGS = -20V

-40

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT

2.2
VGS = -10V

ID = -3A

1.8

1.4

1.0

0.6

ON RESISTANCE VOLTAGE

NORMALIZED DRAIN TO SOURCE

0.2

0 40 120 160

TJ, JUNCTION TEMPERATURE (oC)

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

4-104

80-40

IRFF9130

Typical Performance Curves Unless Otherwise Specified (Continued)

1.25
ID = 250µA

1.15

1.05

0.95

BREAKDOWN VOLTAGE

0.85

NORMALIZED DRAIN TO SOURCE

0.75

0 40 120 160

TJ, JUNCTION TEMPERATURE (oC)

80-40

FIGURE 10. NORMALIZED DRAIN TOSOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

5

4

3

TJ = -55oC

TJ = 25oC

TJ = 125oC

1000

800

600

400

C, CAPACITANCE (pF)

200

0

0 -10 -20 -30 -40 -50

V

C

ISS

C

OSS

C

RSS

DRAIN TO SOURCE VOLTAGE (V)

DS,

VGS = 0V, f = 1MHz
C

= CGS + C

C
C

ISS
RSS

OSS

= C

GD

≈ CDS + C

GD

GD

FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

-100

-10
TJ = 150oC

2

, TRANSCONDUCTANCE (S)

1

fs

g

0

PULSE DURATION = 80µs

-4 -8 -12 -160 -20
ID,DRAIN CURRENT (A)

-1

, SOURCE TO DRAIN CURRENT (A)

SD

I

-0.1

-0.4 -0.6 -0.8 -1.0 -1.2 -1.8

TJ = 25oC

-1.4 -1.6

VSD, SOURCE TO DRAIN VOLTAGE (V)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

0

-5

-10

-15

-20

GATE TO SOURCE VOLTAGE (V)

GS,

V

-25

VDS = -80V

VDS = -50V

VDS = -20V

8162432040

Q

TOTAL GATE CHARGE (nC)

g(TOT),

ID = -6.5A

4-105

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

IRFF9130

Test Circuits and Waveforms

V

DS

VARY t

TO OBTAIN

P

REQUIRED PEAK I

0V
V

GS

t

P

AS

L

R

G

-

V

DD

+

DUT

I

AS

0.01Ω

0

V

DD

I

AS

t

P

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

BV

t

AV

DSS

V

DS

t

ON

t

d(ON)

t

R

L

DUT

R

V

GS

G

-

V

DD

+

0

V

DS

V

GS

0

10%

r

10%

90%

50%

PULSE WIDTH

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

-V

DS

D

(ISOLATED
SUPPLY)

DUT

0

V

DS

Q

gs

Q

gd

12V

BATTERY

0.2µF

50kΩ

CURRENT

REGULATOR

0.3µF

t

d(OFF)

V

GS

t

OFF

50%

90%

90%

t

f

10%

Q

g(TOT)

S

CURRENT

I

D

SAMPLING

DUT

+V

DS

V

DD

0

I

G(REF)

G

0

I

G(REF)

IG CURRENT

SAMPLING

RESISTOR RESISTOR

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

4-106

IRFF9130

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