Datasheet IRFF220 Datasheet (Intersil)

IRFF220

Data Sheet March 1999

3.5A, 200V, 0.800 Ohm, N-Channel
Power MOSFET

This N-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.

Formerly developmental type TA9600.

Ordering Information

PART NUMBER PACKAGE BRAND

IRFF220 TO-205AF IRFF220

NOTE: When ordering, include the entire part number.

File Number 1889.3

Features

• 3.5A, 200V

•r

DS(ON)

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

= 0.800Ω

Components to PC Boards”

Symbol

D

Packaging

JEDEC TO-205AF

DRAIN
(CASE)

G

S

SOURCE

GATE

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

IRFF220

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

IRFF220 UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DGR

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P

DS

D

DM

GS

D

200 V
200 V

3.5 A
14 A

±20 V

20 W

Linear Derating Factor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.16 W/oC

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T

AS

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

85 mJ

-55 to 150

300
260

o

C

o

C

o

C

NOTE:

1. TJ= 25oC to 125oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate to Threshold Voltage V

GS(TH)VGS

Zero-Gate Voltage Drain Current I

On-State Drain Current (Note 2) I

D(ON)

Gate to Source Leakage Forward I
Drain to Source On Resistance (Note 2) r

DS(ON)VGS

Forward Transconductance (Note 2) g
Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t

Total Gate Charge

Q

g(TOT)VGS

(Gate to Source + Gate to Drain)
Gate to Source Charge Q
Gate to Drain “Miller” Charge Q
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Internal Drain Inductance L

Internal Source Inductance L

Junction to Case R
Junction to Ambient R

DSSVGS

DSS

GSS

fs

r

f

gs
gd

ISS
OSS
RSS

D

S

θJC

θJA

= 0V, ID = 250µA (Figure 10) 200 - - V

= VDS, ID = 250µA 2.0 - 4.0 V
VDS = Rated BV
VDS= 0.8 x Rated BV
VDS>I

D(ON) xrDS(ON)MAX,VGS

, VGS = 0V - - 25 µA

DSS

DSS,VGS

= 0V, TJ= 125oC - - 250 µA

= 10V (Figure 7) 3.5 - - A

VGS = ±20V - - ±100 nA

= 10V, ID = 2.0A (Figures 8, 9) - 0.5 0.800 Ω
VDS>I

D(ON) xrDS(ON)MAX,ID

VDD= 0.5 x Rated BV

DSS

VGS = 10V, ID≈ 3.5A (Figures 17, 18)
RL = 27.4Ω for V
RL = 20.3Ω for V

DSS
DSS

= 100V,
= 75V,

MOSFET Switching Times are Essentially

= 2.0A (Figure 12) 1.5 2.25 - S

, RG = 9.1Ω,

-2040ns

-3060ns

- 50 100 ns

-3060ns

Independent of Operating Temperature

= 10V, ID= 3.5A, VDS= 0.8 x Rated BV

I

= 1.5mA (Figures 14, 19, 20) Gate Charge

g(REF)

is Essentially Independent of Operating
Temperature

DSS,

-1115nC

- 5.0 - nC

- 6.0 - nC

VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) - 450 - pF

- 150 - pF

-40 - pF

Measured from the
DrainLead,5mm (0.2in)
from Header to Center
of Die

Measured from the
Source Lead, 5mm
(0.2in) from Header and
Source Bonding Pad

Free Air Operation - - 175

Modified MOSFET
Symbol Showing the
Internal Device
Inductances

D

L

D

G

L

S

S

- 5.0 - nH

-15 - nH

- - 6.25

o
o

C/W
C/W

2

IRFF220

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current I
Pulse Source to Drain Current (Note 3) I

SD

SDM

Source to Drain Diode Voltage (Note 2) V
Reverse Recovery Time t
Reverse Recovered Charge Q

NOTES:

2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD = 20V, start TJ = 25oC, L = 12.5mH, RG = 50Ω, peak IAS = 3.5A (Figures 15, 16).

Modified MOSFET
Symbol Showing the

D

Integral Reverse P-N
Junction Rectifier

TJ = 25oC, ISD= 3.5A, VGS = 0V (Figure 13) - - 2.0 V

SD

TJ = 150oC, ISD = 3.5A, dISD/dt = 100A/µs - 350 - ns

rr

TJ = 150oC, ISD = 3.5A, dISD/dt = 100A/µs - 2.3 - µC

RR

G

S

- - 3.5 A

- - 14 A

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 50 100 150

TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

2

1.0

0.5

0.2

0.1

0.1

0.05

NORMALIZED TRANSIENT

THERMAL IMPEDANCE

0.01

0.02

0.01

-5

10

SINGLE PULSE

-4

10

-3

10

t1, SQUARE WAVE PULSE DURATION (s)

Z

θJC,

5

4

3

2

, DRAIN CURRENT (A)

D

I

1

0

50 75 10025 150

TC, CASE TEMPERATURE (oC)

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

P

DM

t

1

t

2

NOTES:
DUTY FACTOR: D = t1/t

TJ = PDM x Z

-2

10

0.1 1 10

θJC

x R

θJC

125

2

+ T

C

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

3

Typical Performance Curves (Continued)

IRFF220

50

10

OPERATION IN THIS

1.0
AREA IS LIMITED

BY r

, DRAIN CURRENT (A)

D

I

0.1

0.05

DS(ON)

TC = 25oC
T

= MAX RATED

J

SINGLE PULSE

110

VDS, DRAIN TO SOURCE VOLTAGE (V)

100

10µs
100µs

1ms

10ms
100ms

DC

1000

10

10V

8

6

4

, DRAIN CURRENT (A)

D

I

2

0

20 40 60 800 100

VDS, DRAIN TO SOURCE VOLTAGE (V)

80µs PULSE TEST

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

5

80µs PULSE TEST

4

3

VGS = 10V

8V

VGS = 6V

VGS = 5V

10

VDS > I
80µs PULSE TEST

8

6

D(ON)

x r

DS(ON)

MAX

VGS = 7V

VGS = 6V

VGS = 5V

VGS = 4V

2

, DRAIN CURRENT (A)

D

I

1

0

246 8010
VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = 4V

4

= 125oC

T

J

TJ = -25oC

2

, ON-STATE DRAIN CURRENT (A)
I

TJ = -55oC

D

0

0246810

VGS, GATE TO SOURCE VOLTAGE (V)

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

1.5

1.0

DRAIN TO SOURCE

0.5

ON RESISTANCE (Ω)

DS(ON),

r

CURRENT PULSE 2µs
TJ = 25oC

5010

ID, DRAIN CURRENT (A)

VGS = 10V

VGS = 20V

15 20

2.2

1.8

1.4

1.0

ON RESISTANCE

0.6

NORMALIZED DRAIN TO SOURCE

0.2

ID = 2A

VGS = 10V

-40 40 80 120

0 160

T

, JUNCTION TEMPERATURE (oC)

J

NOTE: Heating effect of 2µs pulse is minimal.

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT

4

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

Typical Performance Curves (Continued)

IRFF220

1.25
ID = 250µA

1.15

1.05

0.95

BREAKDOWN VOLTAGE

0.85

NORMALIZED DRAIN TO SOURCE

0.75

-40 40 80 120

0 160

TJ, JUNCTION TEMPERATURE (oC)

FIGURE 10. NORMALIZED DRAIN TOSOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

5

80µs PULSE TEST

4

3

2

TJ = -55oC

TJ = 25oC

TJ = 125oC

1000

800

600

400

C, CAPACITANCE (pF)

200

0

C

ISS

C

C

RSS

10 20 30 40 50
V

DS

OSS

, DRAIN TO SOURCE VOLTAGE (V)

VGS = 0V, f = 1MHz

= CGS + C

C
C

C

ISS
RSS

OSS

= C

GD

≈ CDS + C

GD

GS

FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

2

10

10

TJ = 150oC

TJ = 25oC

TJ = 150oC

, TRANSCONDUCTANCE (S)

1

fs

g

0

2468010

ID, DRAIN CURRENT (A)

, SOURCE TO DRAIN CURRENT (A)

SD

I

1

01 34

VSD, SOURCE TO DRAIN VOLTAGE (V)

TJ = 25oC

2

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

20

ID = 3.5A

15

10

5

, GATE TO SOURCE VOLTAGE (V)

GS

V

0

4 8 12 16020

VDS = 40V

= 100V

V

DS

V

= 160V

DS

Q

, TOTAL GATE CHARGE (nC)

g(TOT)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

5

IRFF220

Test Circuits and Waveforms

V

DS

BV

DSS

t

AV

VARY t

TO OBTAIN

P

REQUIRED PEAK I

V

GS

AS

L

R

G

+

V

DD

-

t

P

I

AS

DUT

0V

P

I

AS

0.01Ω

0

t

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

V

DS

V

DD

t

ON

t

d(ON)

t

R

L

+

V

R

G

DD

-

V

DS

0

r

90%

10%

DUT

V

GS

V

GS

10%

0

50%

PULSE WIDTH

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

V

DS

(ISOLATED
SUPPLY)

SAME TYPE
AS DUT

V

DD

Q

g(TOT)

Q

gd

Q

gs

12V

BATTERY

0.2µF

50kΩ

CURRENT

REGULATOR

0.3µF

t

d(OFF)

90%

V

GS

t

OFF

50%

t

f

90%

10%

D

V

DS

S

CURRENT

I

D

SAMPLING

DUT

0

V

DS

I

g(REF)

0

G

I

0

g(REF)

IG CURRENT

SAMPLING

RESISTOR RESISTOR

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORM

6

IRFF220

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