Datasheet IRFF110 Datasheet (Intersil)

IRFF110

Data Sheet March 1999

3.5A, 100V, 0.600 Ohm, N-Channel
Power MOSFET

This N-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.

Formerly developmental type TA17441.

Ordering Information

PART NUMBER PACKAGE BRAND

IRFF110 TO-205AF IRFF110

NOTE: When ordering, use the entire part number.

File Number 1562.3

Features

• 3.5A, 100V

•r

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

= 0.600Ω

DS(ON)

Components to PC Boards”

Symbol

D

Packaging

JEDEC TO-205AF

DRAIN
(CASE)

G

S

SOURCE

GATE

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

IRFF110

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

IRFF110 UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DGR

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

DS

D

DM

GS

D

100 V
100 V

3.5 A
14 A

±20 V

15 W

Linear Derating Factor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.12 W/oC

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ,T

AS

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

19 mJ

-55 to 150

300
260

o

C

o

C

o

C

NOTE:

1. TJ= 25oC to 125oC

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate Threshold Voltage V
Zero Gate Voltage Drain Current I

DSSVGS

GS(TH)VGS

DSS

= 0V, ID = 250µA (Figure 10) 100 - - V
= VDS, ID = 250µA 2.0 - 4.0 V

VDS = Rated BV

, VGS = 0V - - 25 µA

DSS

VDS = 100V, VGS = 0V, TJ = 125oC - - 250 µA

On-State Drain Current (Note 2) I

D(ON)VDS

Gate to Source Leakage Current I
Drain to Source On Resistance (Note 2) r

DS(ON)VGS

Forward Transconductance (Note 2) g
Turn-On Delay Time t

d(ON)VDD

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Total Gate Charge

Q

g(TOT)VGS

(Gate to Source + Gate to Drain)
Gate to Source Charge Q
Gate to Drain “Miller” Charge Q
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Internal Drain Inductance L

Internal Source Inductance L

Thermal Resistance, Junction to Case R
Thermal Resistance, Junction to Ambient R

GSS

fs

r

f

gs
gd

ISS
OSS
RSS

D

S

θJC

θJA

> I

D(ON)

x r

DS(ON)MAX

, VGS = 10V 3.5 - - A

VGS = ±20V - - ±100 nA

= 10V, ID = 1.5A (Figures 8, 9) - 0.5 0.600 Ω

VDS > I

VGS = 10V, RL = 13Ω (Figures 17, 18),
RL = 14Ω for VDS = 50V, RL = 23Ω for VDS = 80V,
MOSFET Switching Times are Essentially
Independent of Operating Temperature

= 10V, ID = 3.5A, VDS = 0.8 x Rated BV

I

G(REF)

Essentially Independent of Operating Temperature

x r

D(ON)

DS(ON)MAX

≅ 0.5 x Rated BV

, ID = 1.5A (Figure 12) 1.0 1.5 - S

, ID≈ 3.5A, RG = 9.1Ω

DSS

=1.5mA(Figures 14,19,20), Gate Chargeis

DSS

-1020ns

-1525ns

-1525ns

-1020ns

,

- 5.0 7.5 nC

- 2.0 - nC

- 3.0 - nC

VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) - 135 - pF

-80-pF

-20-pF

Measured from the Drain
Lead, 5.0mm (0.2in) from
Header to Center of Die

Measured from the Source
Lead, 5.0mm (0.2in) from
Header to Source Bonding
Pad

Modified MOSFET
Symbol Showing the
Internal Device
Inductances

D

L

D

G

L

S

S

- 5.0 - nH

-15-nH

- - 8.33oC/W

Free Air Operation - - 175oC/W

2

IRFF110

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current I
Pulse Source to Drain Current (Note 3) I

Source to Drain Diode Voltage (Note 2) V
Reverse Recovery Time t
Reverse Recovery Charge Q
Forward Turn-On Time t

NOTES:

2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD= 5V, starting TJ= 25oC, L = 2.3mH, RG= 25Ω, peak IAS= 3.5A. See Figures 15, 16.

Modified MOSFET Symbol

SD

Showing the Integral

SM

Reverse P-N Junction

D

- - 3.5 A

- - 14 A

Rectifier

G

S

TJ = 25oC, ISD = 3.5A, VGS = 0V (Figure 13) - - 2.5 V

SD

TJ = 150oC, ISD = 3.5A, dISD/dt = 100A/µs - 200 - ns

rr

TJ = 150oC, ISD = 3.5A, dISD/dt = 100A/µs - 1.0 - µC

RR

Intrinsic Turn-On Time is Negligible. Turn-On

ON

Speed is Substantially Controlled by LS + L

D

--- -

Typical Performance Curves Unless Otherwise Specified

1.2

5

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 50 100 150

TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

2

1

0.5

0.2

0.1

0.1

, NORMALIZED
Z

0.05

θJC

THERMAL IMPEDENCE

0.02

0.01

0.01

-5

10

SINGLE PULSE

-4

10

-3

10

t1, RECTANGULAR PULSE DURATION (s)

4

3

2

, DRAIN CURRENT (A)

D

I

1

0

25 50 75 100

TC, CASE TEMPERATURE (oC)

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

P

DM

DUTY FACTOR: D = t1/t
PEAK TJ = PDM x Z

-2

10

-1

10

θJC

1

2

x R

t
t

1
2

θJC

125

+ T

150

C

10

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

3

IRFF110

Typical Performance Curves Unless Otherwise Specified (Continued)

30.0

10.0

1.0

, DRAIN CURRENT (A)

D

I

0.1

OPERATION IN THIS
AREA LIMITED
BY r

DS(ON)

1 10 100 200

, DRAIN SOURCE VOLTAGE (V)

V

DS

10µs

100µs

1ms

10ms

100ms

DC

8.0

6.4

4.8

3.2

, DRAIN CURRENT (A)

D

I

1.6

0

01020304050

VGS = 10V

VGS = 9V

V

, DRAIN TO SOURCE VOLTAGE (V)

DS

80µs PULSE TEST

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

8.0
80µs PULSE TEST

6.4

4.8

VGS = 10V

VGS = 9V

VGS = 8V
VGS = 7V

8.0
VDS > I

80µs PULSE TEST

6.4

4.8

D(ON)

x r

DS(ON)MAX

125oC

25oC

-55oC

VGS = 8V

VGS = 7V

VGS = 6V

VGS = 5V

VGS = 4V

4.0

VGS = 6V

VGS = 5V

VGS = 4V

3.2

1.6

, ON-STATE DRAIN CURRENT (A)

D(ON)

I

0

02 6

VGS, GATE TO SOURCE VOLTAGE (V)

4 810

3.2

, DRAIN CURRENT (A)

D

I

1.6

0

0

1.0
VDS, DRAIN TO SOURCE VOLTAGE (V)

2.0 3.0 5.0

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

2.0

1.5

1.0

, DRAIN TO SOURCE

ON RESISTANCE (Ω)

0.5

DS(ON)

r

0

2µs PULSE TEST

VGS = 10V

0

VGS = 20V

5

ID, DRAIN CURRENT (A)

10

15 20

2.50

2.00

1.50

1.00

ON RESISTANCE

0.50

NORMALIZED DRAIN TO SOURCE

VGS = 10V
I

= 1.5A

D

0

-40 0 40
T

, JUNCTION TEMPERATURE (oC)

J

80

120

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT

4

FIGURE 9. NORMALIZED DRAIN TOSOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

IRFF110

Typical Performance Curves Unless Otherwise Specified (Continued)

1.25
ID = 250µA

1.15

1.05

0.95

BREAKDOWN VOLTAGE

0.85

NORMALIZED DRAIN TO SOURCE

0.75

-40 0 40
T

, JUNCTION TEMPERATURE (oC)

J

80

120

FIGURE 10. NORMALIZED DRAIN TOSOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

4.0
VDS > I

80µs PULSE TEST

3.2

2.4

1.6

D(ON)

x r

DS(ON)MAX

-55oC

o

25

C

500

400

300

200

C, CAPACITANCE (pF)

100

0

C

C

OSS

C

RSS

10 20
V

, DRAIN TO SOURCE VOLTAGE (V)

DS

ISS

V
C
C
C

30 40 501

= 0V, f = 1MHz

GS

= CGS + C

ISS

= C

RSS

GD

≈ CDS+ C

OSS

GD

GD

FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

10

150oC

1.0

25oC

125oC

0.8

, TRANSCONDUCTANCE (S)

fs

g

0

0 1.6 3.2 4.8 6.4

ID, DRAIN CURRENT (A)

8.0

, SOURCE TO DRAIN CURRENT (A)

SD

I

0.1
0 0.4 0.6 0.80.2

VSD, SOURCE TO DRAIN VOLTAGE (V)

1.0 1.4 1.6 1.81.2 2.0

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

20

ID = 3.5A

15

VDS = 20V

10

, GATE TO SOURCE (V)

5

GS

V

0

02468

, TOTAL GATE CHARGE (nC)

Q

g(TOT)

VDS = 50V

VDS = 80V

10

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

5

IRFF110

Test Circuits and Waveforms

V

DS

t

L

I

AS

VARY t

TO OBTAIN

P

REQUIRED PEAK I

AS

R

G

+

V

DD

-

DUT

V

GS

0V

t

P

I

AS

0

0.01Ω

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

BV

DSS

P

t

AV

V

DS

V

DD

t

ON

t

d(ON)

t

R

L

+

V

R

G

DD

-

V

DS

0

r

90%

10%

DUT

V

GS

V

GS

10%

0

50%

PULSE WIDTH

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

V

DS

(ISOLATED
SUPPLY)

SAME TYPE
AS DUT

V

DD

Q

g(TOT)

Q

gd

Q

gs

12V

BATTERY

0.2µF

50kΩ

CURRENT

REGULATOR

0.3µF

t

d(OFF)

90%

V

GS

t

OFF

50%

t

f

90%

10%

D

V

DS

S

CURRENT

I

D

SAMPLING

DUT

0

V

DS

I

G(REF)

0

G

I

0

G(REF)

IG CURRENT

SAMPLING

RESISTOR RESISTOR

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

6

IRFF110

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