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PD - 91719B
IRFE430
REPETITIVE AVALANCHE AND dv/dt RATED JANTX2N6802U
HEXFETTRANSISTORS
SURFACE MOUNT (LCC-18)
Product Summary
Part Number BVDSS RDS(on) ID
IRFE430 500V 1.50Ω 2.5A
500V, N-CHANNEL
[REF:MIL-PRF-19500/557]
JANTXV2N6802U
The leadless chip carrier (LCC) package represents the
logical next step in the continual evolution of surface
mount technology. Desinged to be a close replacement
for the TO-39 package, the LCC will give designers the
extra flexibility they need to increase circuit board density. International Rectifier has engineered the LCC package to meet the specific needs of the power market by
increasing the size of the bottom source pad, thereby
enhancing the thermal and electrical performance. The
lid of the package is grounded to the source to reduce
RF interference.
Features:
! Surface Mount
! Small Footprint
! Alternative to TO-39 Package
! Hermetically Sealed
! Dynamic dv/dt Rating
! Avalanche Energy Rating
! Simple Drive Requirements
! Light Weight
LCC-18
Absolute Maximum Ratings
Parameter Units
ID @ VGS = 10V, TC = 25°C Continuous Drain Current 2. 5
ID @ VGS = 10V, TC = 100°C Continuous Drain Current 1. 5
I
DM
PD @ TC = 25°C Max. Power Dissipation 25 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt ➂ 6.2
T
J
T
STG
Pulsed Drain Current ➀ 11
Linear Derating Factor 0.20 W/°C
Gate-to-Source Voltage ±20 V
Single Pulse Avalanche Energy ➁ 0.31 mJ
Avalanche Current ➀ -A
Repetitive Avalanche Energy ➀ -mJ
Operating Junction -55 to 150
Storage Temperature Range
Pckg. Mounting Surface Temp. 300 (for 5 S)
Weight 0.42(typical) g
A
V/ns
o
C
For footnotes refer to the last page
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1/17/01
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IRFE430
Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)
Parameter Min Typ Max Units Test Conditions
BV
∆BV
R
V
g
I
I
I
Q
Q
Q
t
t
t
t
L
C
C
C
DSS
GSS
GSS
d(on)
r
d(off)
f
DSS
DSS
DS(on)
GS(th)
fs
g
gs
gd
S + LD
iss
oss
rss
Drain-to-Source Breakdown Voltage 50 0 — — V VGS = 0V, ID = 1.0mA
/∆T
Temperature Coefficient of Breakdown — 0.59 — V/°C Reference to 25°C, ID = 1.0mA
J
Voltage
Static Drain-to-Source On-State — — 1.50 VGS = 10V, I
Resistance — — 1.725 V
Gate Threshold Voltage 2. 0 — 4.0 V VDS = VGS, ID =250µA
Forward Transconductance 2.0 — — S ( ) V
Zero Gate Voltage Drain Current — — 2 5 VDS=400V, VGS=0V
— — 250 VDS =400V
Gate-to-Source Leakage Forward — — 100 VGS =20V
Gate-to-Source Leakage Reverse — — -100 VGS =-20V
Total Gate Charge — — 3 0 VGS =10V, ID= 2.5A
Gate-to-Source Charge — — 4.5 nC VDS =250V
Gate-to-Drain (‘Miller’) Charge — — 28
Turn-On Delay Time — — 30 VDD =250V, ID =2.5A,
Rise Time — — 3 0 R
Turn-Off Delay Time — — 55
Fall Time — — 3 0
Total Inductance — 6.1 —
Input Capacitance — 750 VGS = 0V, VDS =25V
Output Capacitance — 240 — pF f = 1.0MHz
Reverse Transfer Capacitance — 6 7 —
Ω
Ω
µA
VGS = 0V, TJ = 125°C
nA
ns
nH
=1.5A➃
D
=10V, I
GS
> 15V, I
DS
Measured from the center of
drain pad to center of source
pad
=7.5Ω
G
=2.5A ➃
D
=1.5A➃
DS
Source-Drain Diode Ratings and Characteristics
Parameter Min Typ Max Units Test Conditions
I
Continuous Source Current (Body Diode) — — 2.5
S
I
Pulse Source Current (Body Diode) ➀ —— 11
SM
V
Diode Forward Voltage — — 1.4 V Tj = 25°C, IS =2.5A, V
SD
t
Reverse Recovery Time — — 90 0 nS Tj = 25°C, I
rr
Q
Reverse Recovery Charge — — 2.0 µc V
RR
t
Forward Turn-On Time Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by L
on
A
= 0V ➃
=2.5A, di/dt ≤100A/µs
F
DD
GS
≤50V ➃
S
Thermal Resistance
Parameter Min Typ Max Units Test Conditions
R
thJC
R
thJ-PCB
For footnotes refer to the last page
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Junction to Case — — 5 .0
Junction to PC Board — — 19"" Soldered to a copper clad PC board
°C/W
+ LD.
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IRFE430
100
10
1
D
I , Drain-to-Source Current (A)
0.1
0.1 1 10 100
100
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.5V
4.5V
20µs PULSE WIDTH
T = 25 C
J
V , Drain-to-Source Voltage (V)
DS
°
100
10
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
4.5V
1
D
I , Drain-to-Source Current (A)
20µs PULSE WIDTH
0.1
1 10 100
V , Drain-to-Source Voltage (V)
DS
T = 150 C
°
J
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.0
I =
D
2.5A
2.5
10
1
D
I , Drain-to-Source Current (A)
0.1
4.0 5.0 6.0 7.0 8.0
°
T = 150 C
J
°
T = 25 C
J
V = 50V
DS
20µs PULSE WIDTH
V , Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
2.0
1.5
(Normalized)
1.0
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
T , Junction Temperature( C)
J
V =
Fig 4. Normalized On-Resistance
°
GS
10V
Vs. Temperature
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IRFE430
1600
1200
800
C, Capacitance (pF)
400
0
1 10 100
V
=
0V,
GS
C
=
iss gs gd , ds
C
=
rss gd
C
=
oss ds gd
V , Drain-to-Source Voltage (V)
DS
f = 1MHz
C
+ C
C SHORTED
C
C
+ C
C
iss
C
oss
C
rss
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
20
I =
2.5A
D
V = 400V
DS
V = 250V
16
12
8
4
GS
V , Gate-to-Source Voltage (V)
DS
V = 100V
DS
FOR TEST CIRCUIT
0
0 5 10 15 20 25 30
Q , Total Gate Charge (nC)
G
SEE FIGURE
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
13
10
°
T = 150 C
J
1
°
T = 25 C
J
SD
I , Reverse Drain Current (A)
V = 0 V
0.1
0.4 0.6 0.8 1.0
V ,Source-to-Drain Voltage (V)
SD
GS
Fig 7. Typical Source-Drain Diode
100
OPERATION IN THIS AREA LIMITED
10
1
D
I , Drain Current (A)I , Drain Current (A)
°
= 25 C
C
T T= 150 C
Single Pulse
0.1
10 100 1000 10000
°
J
V , Drain-to-Source Voltage (V)
DS
BY R
DS(on)
10us
100us
1ms
10ms
Fig 8. Maximum Safe Operating Area
Forward Voltage
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2.5
2.0
1.5
1.0
D
I , Drain Current (A)
0.5
0.0
25 50 75 100 125 150
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
IRFE430
R
D.U.T.
t
d(off)tf
D
V
DS
V
GS
R
G
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
Fig 10b. Switching Time Waveforms
+
V
DD
-
10
D = 0.50
thJC
Thermal Response (Z )
0.01
0.20
1
0.10
0.05
0.02
0.01
0.1
0.00001 0.0001 0.001 0.01 0.1 1 10
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
t , Rectangular Pulse Duration (sec)
1
J DM thJC C
1 2
P
DM
t
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFE430
A
15V
DRIVER
+
-
R
V
G
10V
20V
DS
L
D.U.T
I
AS
0.01
t
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
0.80
TOP
I
D
1.1A
1.6A
0.60
BOTTOM
0.40
V
DD
0.20
AS
E , Single Pulse Avalanche Energy (mJ)
0.00
25 50 75 100 125 150
Starting T , Junction Temperature ( C)
J
2.5A
°
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
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Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
+
-
I
D
Fig 13b. Gate Charge Test Circuit
V
DS
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IRFE430
Foot Notes:
➀ Repetitive Rating; Pulse width limited by
maximum junction temperature.
➁ V
= 50V, starting TJ = 25°C,
DD
Peak IL = 2.5A,
➃ Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
Case Outline and Dimensions — LCC-18
➂ I
≤ 2.5A, di/dt ≤86A/µs,
SD
V
≤ 500V, TJ ≤ 150°C
DD
Suggested RG =7.5 Ω
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Data and specifications subject to change without notice. 1/01
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