Datasheet IRFE310 Datasheet (IOR)

PD - 91782

IRFE310

REPETITIVE A V ALANCHE AND dv/dt RA TED JANTX2N6786U

HEXFET

®

TRANSISTOR JANTXV2N6786U

[REF:MIL-PRF-19500/556]

N - CHANNEL

400V olt, 3.6

The leadless chip carrier (LCC) package represents
the logical next step in the continual evolution of
surface mount technology. The LCC provides
designers the extra flexibility they need to increase
circuit board density. International Rectifier has
engineered the LCC package to meet the specific
needs of the power market by increasing the size of
the bottom source pad, thereby enhancing the thermal
and electrical performance. The lid of the package
is grounded to the source to reduce RF interference.

HEXFET transistors also feature all of the well-es­tablished advantages of MOSFETs, such as volt­age control, very fast switching, ease of paralleling
and electrical parameter temperature stability . They
are well-suited for applications such as switching
power supplies, motor controls, inverters, choppers,
audio amplifiers and high-energy pulse circuits,
and virtually any application where high reliability

is required.

ΩΩ

Ω, HEXFET

ΩΩ

Product Summary

Part Number BVDSS RDS(on) ID

IRFE310 400V 3.6Ω 1.25A

Features:

n Hermetically Sealed
n Simple Drive Requirements
n Ease of Paralleling
n Small footprint
n Surface Mount
n Lightweight

Absolute Maximum Ratings

Parameter IRFE310, JANTX-, JANTXV-, 2N6786U Units

ID @ VGS = 10V, TC = 25°C Continuous Drain Current 1.25

ID @ VGS = 10V, TC = 100°C Continuous Drain Current 0.80

I

DM

PD @ TC = 25°C Max. Power Dissipation 15 W

V

GS

E

AS

dv/dt Peak Diode Recovery dv/dt  2.8

T

J

T

STG

Pulsed Drain Current  5.5

Linear Derating Factor 0.12 W/°C
Gate-to-Source Voltage ±20 V
Single Pulse Avalanche Energy  34 mJ

Operating Junction -55 to 150
Storage Temperature Range
Surface Temperature
Weight 0.42 (typical) g

300 ( for 5 seconds)

A

V/ns

o

C

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10/9/98

IRFE310, JANTX-, JANTXV-, 2N6786U Devices

Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)

Parameter Min Typ Max Units Test Conditions

BV

DSS

∆BV

R

DS(on)

V

GS(th)

g

fs

I

DSS

I

GSS

I

GSS

Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

L

D

L

S

C

iss

C

oss

C

rss

DSS

Drain-to-Source Breakdown Voltage 400 — — V VGS = 0V, ID = 1.0mA

/∆TJTemperature Coefficient of Breakdown — 0.37 — V/°C Reference to 25°C, ID = 1.0mA

Voltage
Static Drain-to-Source On-State — — 3.6 VGS = 10V, ID = 0.8A
Resistance — — 3.7 VGS = 10V, ID = 1.25A
Gate Threshold Voltage 2.0 — 4.0 V VDS = VGS, ID = 250µA
Forward Transconductance 0.87 — — S ( )VDS > 15V, IDS = 0.8A 
Zero Gate Voltage Drain Current — — 2 5 VDS= 0.8 x Max Rating,VGS=0V

— — 250 VDS = 0.8 x Max Rating

Gate-to-Source Leakage Forward — — 100 VGS = 20V
Gate-to-Source Leakage Reverse — — -100 VGS = -20V

Ω

µA

nA

Total Gate Charge — — 8.4 VGS = 10V, ID = 1.25A
Gate-to-Source Charge — — 1.6 nC VDS = Max Rating x 0.5
Gate-to-Drain (‘Miller’) Charge — — 5.0
Tur n-On Delay Time — — 15 VDD = 15V, ID = 1.25A,
Rise Time — — 20 RG = 7.5Ω
Tur n-Off Delay Time — — 35

ns

Fall Time — — 30
Internal Drain Inductance — 5.0 —

Internal Source Inductance — 15 —

Measured from drain
lead, 6mm (0.25 in)
from package to center

nH

of die.
Measured from source

lead, 6mm (0.25 in)
from package to
source bonding pad.

Input Capacitance — 190 — VGS = 0V, VDS = 25V
Output Capacitance — 65 — p F f = 1.0MHz
Reverse Transfer Capacitance — 24 —

VGS = 0V, TJ = 125°C

Modified MOSFET
bol showing the internal
inductances.



sym-

Source-Drain Diode Ratings and Characteristics

Parameter Min Typ Max Units Test Conditions

I

Continuous Source Current (Body Diode) — — 1.25

S

I

Pulse Source Current (Body Diode)  — — 5.5

SM

V

Diode Forward Voltage — — 1.4 V Tj = 25°C, IS = 1.25A, VGS = 0V 

SD

t

Reverse Recovery Time — — 540 n s Tj = 25°C, IF = 1.25A, di/dt ≤ 100A/µs

rr

Q

Reverse Recovery Charge — — 4.5 µCV

RR

t

Forward Turn-On Time Intr insic turn-on time is negligible. Turn-on speed is substantially controlled by L

on

Modified MOSFET symbol

A

showing the integral reverse
p-n junction rectifier.

DD

≤ 50V 

Thermal Resistance

Parameter Min Typ Max Units Test Conditions

R

thJC

R

thJ-PCB

2 www.irf.com

Junction-to-Case — — 8.3
Junction-to-PC board — — 27 soldered to a copper-clad PC board

°C/W

+ LD.

S

IRFE310, JANTX-, JANTXV-, 2N6786U Devices

10

1

TOP

BOTTOM

VGS
15V
10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

4.5V

0.1

D

I , Drain-to-Source Current (A)

20µs PULSE WIDTH

°

T = 25 C

0.01

0.1 1 10 100

V , Drain-to-Source Voltage (V)

DS

10

J

10

1

TOP

BOTTOM

VGS
15V
10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

4.5V

0.1

D

I , Drain-to-Source Current (A)

20µs PULSE WIDTH

0.01

0.1 1 10 100

V , Drain-to-Source Voltage (V)

DS

T = 150 C

°

J

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

3.0

I =

D

1.2A

2.5

2.0

°

T = 150 C

J

1

°

T = 25 C

D

I , Drain-to-Source Current (A)

0.1

4.0 5.0 6.0 7.0 8.0

J

V = 50V

DS

20µs PULSE WIDTH

V , Gate-to-Source Voltage (V)

GS

Fig 3. Typical Transfer Characteristics

1.5

(Normalized)

1.0

0.5

DS(on)

R , Drain-to-Source On Resistance

0.0

-60 -40 -20 0 20 40 60 80 100 120 140 160

T , Junction Temperature( C)

J

Fig 4. Normalized On-Resistance

V =

GS

°

10V

Vs. Temperature

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IRFE310, JANTX-, JANTXV-, 2N6786U Devices

500

400

300

200

C, Capacitance (pF)

100

0

1 10 100

V

=

0V,

GS

C

=

iss gs gd , ds

C

=

rss gd

C

=

oss ds gd

C

iss

C

oss

C

rss

V , Drain-to-Source Voltage (V)

DS

f = 1MHz

C

+ C
C
C

C SHORTED

+ C

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

10

20

I =

1.25 A

D

V = 320V

DS

V = 200V

DS

V = 80V

15

10

5

GS

V , Gate-to-Source Voltage (V)

DS

FOR TEST CIRCUIT

0

0 2 4 6 8 10 12

Q , Total Gate Charge (nC)

G

SEE FIGURE

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

100

OPERATION IN THIS AREA LIMITED

BY R

DS(on)

13

10

°

T = 150 C

J

1

°

T = 25 C

SD

I , Reverse Drain Current (A)

0.1

0.4 0.6 0.8 1.0 1.2 1.4

V ,Source-to-Drain Voltage (V)

SD

J

V = 0 V

GS

Fig 7. Typical Source-Drain Diode

1

D

I , Drain Current (A)I , Drain Current (A)

0.1

°

= 25 C

C

T T= 150 C
Single Pulse

0.01
10 100 1000

°

J

V , Drain-to-Source Voltage (V)

DS

Fig 8. Maximum Safe Operating Area

10us

100us

1ms

10ms

Forward Voltage

4 www.irf.com

IRFE310, JANTX-, JANTXV-, 2N6786U Devices

1.25

1.00

0.75

0.50

D

I , Drain Current (A)

0.25

0.00
25 50 75 100 125 150

T , Case Temperature ( C)

C

°

Fig 9. Maximum Drain Current Vs.

Case Temperature

10

R

V

DS

V

GS

R

G

D

D.U.T.

10V

Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit

V

DS

90%

10%
V

GS

t

d(on)tr

t

d(off)tf

Fig 10b. Switching Time Waveforms

+

V

DD

-

D = 0.50

thJC

0.20

0.10

1

P

1 2

DM

t

1

t

2

0.05

Thermal Response (Z )

0.02

0.01

0.1

0.00001 0.0001 0.001 0.01 0.1 1

SINGLE PULSE

(THERMAL RESPONSE)

Notes:

1. Duty factor D = t / t

2. Peak T = P x Z + T

t , Rectangular Pulse Duration (sec)

1

J DM thJC C

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRFE310, JANTX-, JANTXV-, 2N6786U Devices

A

15V

DRIVER

+

-

R

G

10V

20V

V

DS

t

L

D.U.T

I

AS

0.01

p

Ω

Fig 12a. Unclamped Inductive Test Circuit

V

(BR)DSS

t

p

75

TOP

60

45

V

DD

30

15

AS

E , Single Pulse Avalanche Energy (mJ)

0

25 50 75 100 125 150

Starting T , Junction Temperature ( C)

J

BOTTOM

I

D

0.56A

0.79A

1.25A

°

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

I

AS

Fig 12b. Unclamped Inductive Waveforms

Q

G

10 V

Q

GS

V

G

Q

GD

Charge

Fig 13a. Basic Gate Charge Waveform

Current Regulator

Same Type as D.U.T.

50KΩ

10V

12V

.2µF

V

GS

.3µF

D.U.T.

3mA

I

G

Current Sampling Resistors

I

+

-

D

Fig 13b. Gate Charge Test Circuit

V

DS

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IRFE310, JANTX-, JANTXV-, 2N6786U Devices

Notes:

 Repetitive Rating; Pulse width limited by

maximum junction temperature.
Refer to current HEXFET reliability report.

 @ V

= 50 V, Starting TJ = 25°C,

DD

EAS = [0.5 * L * (I
Peak IL =1.25A, VGS =10 V, 25 ≤ RG ≤ 200Ω

2

) ]

L

 I

≤ 1.25A, di/dt ≤ 180 A/µs,

SD

VDD ≤ BV

 Pulse width ≤ 300 µs; Duty Cycle ≤ 2%

, TJ ≤ 150°C, Suggested RG = 50Ω

DSS

Case Outline and Dimensions — Leadless Chip Carrier (LCC) Package

IR Case Style Leadless Chip Carrier (LCC)

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http://www.irf.com/ Data and specifications subject to change without notice. 10/98

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