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PD- 91890B
SMPS MOSFET
IRFBC30AS/L
HEXFET® Power MOSFET
Applications
l Switch Mode Power Supply (SMPS)
l Uninterruptable Power Supply
l High speed power switching
Benefits
l Low Gate Charge Qg results in Simple
Drive Requirement
l Improved Gate, Avalanche and dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche Voltage and Current
l Effective Coss specified (See AN 1001)
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 3.6
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 2.3 A
I
DM
PD @TC = 25°C Power Dissipation 74 W
V
GS
dv/dt Peak Diode Recovery dv/dt 7.0 V/ns
T
J
T
STG
Pulsed Drain Current 14
Linear Derating Factor 0.69 W/°C
Gate-to-Source Voltage ± 30 V
Operating Junction and -55 to + 150
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
V
DSS
Rds(on) max I
600V 2.2Ω 3.6A
2
D P a k
TO-262
°C
D
Typical SMPS Topology:
l Single transistor Flyback
Notes through are on page 10
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5/4/00
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IRFBC30AS/L
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
I
DSS
I
GSS
Dynamic @ TJ = 25°C (unless otherwise specified)
g
fs
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff. Effective Output Capacitance ––– 31 ––– VGS = 0V, VDS = 0V to 480V
oss
Avalanche Characteristics
E
AS
I
AR
E
AR
Drain-to-Source Breakdown Voltage 600 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.67 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance ––– ––– 2.2 Ω VGS = 10V, ID = 2.2A
Gate Threshold Voltage 2.0 ––– 4.5 V VDS = VGS, ID = 250µA
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 480V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 30V
Gate-to-Source Reverse Leakage ––– ––– -100
VDS = 600V, VGS = 0V
µA
nA
VGS = -30V
Parameter Min. Typ. Max. Units Conditions
Forward Transconductance 2.1 ––– ––– S VDS = 50V, ID = 2.2A
Total Gate Charge ––– ––– 23 ID = 3.6A
Gate-to-Source Charge ––– ––– 5.4 nC VDS = 480V
Gate-to-Drain ("Miller") Charge ––– ––– 11 VGS = 10V, See Fig. 6 and 13
Turn-On Delay Time ––– 9.8 ––– VDD = 300V
Rise Time ––– 13 ––– ID = 3.6A
Turn-Off Delay Time ––– 19 ––– RG = 12Ω
ns
Fall Time ––– 12 ––– RD = 82Ω,See Fig. 10
Input Capacitance ––– 510 ––– VGS = 0V
Output Capacitance ––– 70 ––– VDS = 25V
Reverse Transfer Capacitance ––– 3.5 ––– pF ƒ = 1.0MHz, See Fig. 5
Output Capacitance ––– 730 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Output Capacitance ––– 19 ––– VGS = 0V, VDS = 480V, ƒ = 1.0MHz
Parameter Typ. Max. Units
Single Pulse Avalanche Energy ––– 290 mJ
Avalanche Current ––– 3.6 A
Repetitive Avalanche Energy ––– 7.4 mJ
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
Junction-to-Case ––– 1.7 °C/W
Junction-to-Ambient ( PCB Mounted, steady-state)* ––– 40
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
3.6
14
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– 1.6 V TJ = 25°C, IS = 3.6A, VGS = 0V
Reverse Recovery Time ––– 400 600 n s TJ = 25°C, IF = 3.6A
Reverse RecoveryCharge ––– 1.1 1.7 µC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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D
S
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IRFBC30AS/L
100
10
1
0.1
D
I , Drain-to-Source Current (A)
0.01
0.1 1 10 100
100
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.5V
20µs PULSE WIDTH
T = 25 C
J
V , Drain-to-Source Voltage (V)
DS
4.5V
°
10
1
D
I , Drain-to-Source Current (A)
0.1
0.1 1 10 100
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.5V
20µs PULSE WIDTH
T = 150 C
V , Drain-to-Source Voltage (V)
DS
J
4.5V
°
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.0
3.6A
I =
D
2.5
10
°
T = 150 C
J
1
°
T = 25 C
0.1
D
I , Drain-to-Source Current (A)
0.01
4.0 5.0 6.0 7.0 8.0 9.0
J
V = 50V
DS
20µs PULSE WIDTH
V , Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
2.0
1.5
(Normalized)
1.0
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
T , Junction Temperature ( C)
J
Fig 4. Normalized On-Resistance
V =
10V
GS
°
Vs. Temperature
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IRFBC30AS/L
10000
1000
100
C, Capacitance(pF)
10
1
1 10 100 1000
V
= 0V, f = 1 MHZ
GS
C
= C
= C
= C
+ Cgd, C
gs
gd
+ C
ds
Ciss
Coss
Crss
gd
iss
C
rss
C
oss
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
SHORTED
ds
20
I =
3.6A
D
V = 480V
DS
16
12
8
4
GS
V , Gate-to-Source Voltage (V)
0
0 4 8 12 16 20 24
Q , Total Gate Charge (nC)
G
V = 300V
DS
V = 120V
DS
FOR TEST CIRCUIT
SEE FIGURE
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
13
10
°
T = 150 C
J
°
T = 25 C
J
1
SD
I , Reverse Drain Current (A)
V = 0 V
0.1
0.4 0.6 0.8 1.0 1.2
V ,Source-to-Drain Voltage (V)
SD
GS
Fig 7. Typical Source-Drain Diode
10
1
D
I , Drain Current (A)I , Drain Current (A)
°
= 25 C
C
T T= 150 C
Single Pulse
0.1
10 100 1000 10000
°
J
V , Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
10us
100us
1ms
10ms
Forward Voltage
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4.0
3.0
2.0
IRFBC30AS/L
R
V
DS
V
GS
R
G
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
D
D.U.T.
+
V
DD
-
D
I , Drain Current (A)
1.0
0.0
25 50 75 100 125 150
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
t
d(off)tf
Case Temperature
Fig 10b. Switching Time Waveforms
10
thJC
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
Thermal Response (Z )
0.01
0.01
0.00001 0.0001 0.001 0.01 0.1 1
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
t , Rectangular Pulse Duration (sec)
1
J DM thJC C
P
DM
t
1 2
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFBC30AS/L
A
15V
DRIVER
+
-
V
R
20V
V
DS
G
t
L
D.U.T
I
AS
0.01
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(B R)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
Q
GD
DD
400
TOP
300
200
100
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150
Starting T , Junction Temperature ( C)
J
BOTTOM
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
740
I
D
1.6A
2.3A
3.6A
°
V
G
Charge
720
700
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
+
V
DS
-
I
D
Fig 13b. Gate Charge Test Circuit
680
, Avalanche Voltage ( V )
660
DSav
V
640
0.0 1.0 2.0 3.0 4.0
I
, Avalanche Current ( A)
AV
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
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IRFBC30AS/L
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
+
-
-
+
R
G
Driver Gate Drive
P.W.
• dv/dt controlled by R
• Driver same type as D.U.T.
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
Period
P.W.
+
-
VGS=10V
V
DD
*
D.U.T. ISDWaveform
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. VDSWaveform
Inductor Curent
* V
= 5V for Logic Level Devices
GS
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
V
DD
I
SD
Fig 14. For N-Channel HEXFETS
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Page 8
IRFBC30AS/L
A
D2Pak Package Outline
10.54 (.415)
1.40 (.055)
MAX.
1.78 (.070)
1.27 (.050)
1.40 (.055)
3X
1.14 (.045)
5.08 (.200)
NOTE S:
1 DIMENSIONS AFTER SO LDER DIP.
2 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
3 CONTROLLING DIMENSION : INCH.
4 HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.
10.29 (.405)
- A 2
1 3
15.49 (.610)
14.73 (.580)
0.93 (.037)
3X
0.69 (.027)
0.25 (.01 0) M B A M
Part Marking Information
D2Pak
4.69 (.185)
4.20 (.165)
5.28 (.208)
4.78 (.188)
0.55 (.022)
0.46 (.018)
- B -
1.32 (.052)
1.22 (.048)
2.79 (.110)
2.29 (.090)
1.39 (.055)
1.14 (.045)
LEAD ASSIGNM E N TS
1 - G ATE
2 - D RA IN
3 - SOURCE
10.16 (.400)
REF.
6.47 (.255)
6.18 (.243)
2.61 (.103)
2.32 (.091)
8.89 (.350)
REF.
MINIMUM RECOMMENDED FOOTPRINT
11.43 (.450)
8.89 (.350)
17.78 (.700)
3.81 (.150)
2.08 (.082)
2X
2.54 (.100)
2X
INTERNATIONAL
RE CTIFIER
LOGO
A S SEMBLY
LO T CO D E
F530S
9246
9 B 1M
PART NUM B ER
DATE CODE
(YYW W)
YY = YEAR
WW = WEEK
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Page 9
Package Outline
TO-262 Outline
IRFBC30AS/L
Part Marking Information
TO-262
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Page 10
IRFBC30AS/L
Tape & Reel Information
D2Pak
TRR
FEED DIRECTION
TRL
FEED DIRECTION
1.85 (.073)
1.65 (.065)
10.90 (.429)
10.70 (.421)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
11.60 (.457)
11.40 (.449)
16.10 (.634)
15.90 (.626)
1.60 (.063)
1.50 (.059)
1.75 (.069)
1.25 (.049)
15.42 (.609)
15.22 (.601)
0.368 (.0145)
0.342 (.0135)
24.30 (.957)
23.90 (.941)
4.72 (.136)
4.52 (.178)
330.00
(14.173)
MAX.
NOTES :
1. COM FORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIM ETER.
Notes:
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Repetitive rating; pulse width limited by
13.50 (.532)
12.80 (.504)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
27.40 (1.079)
23.90 (.941)
4
26.40 (1.03 9)
24.40 (.961 )
3
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
4
max. junction temperature. ( See fig. 11 )
C
eff. is a fixed capacitance that gives the same charging time
Starting T
RG = 25Ω, I
I
SD
= 25°C, L = 46mH
J
AS
≤ 3.6A, di/dt ≤ 170A/µs, V
TJ ≤ 150°C
= 3.6A. (See Figure 12)
≤ V
DD
(BR)DSS
,
oss
as C
oss
while V
is rising from 0 to 80% V
DS
Uses IRFBC30A data and test condi-
tions
DSS
* When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
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8000
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Data and specifications subject to change without notice. 5/00
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