l Switch Mode Power Supply (SMPS)
l Uninterruptible Power Supply
l High Speed Power Switching
l Lead-Free
V
DSS
650V0.93Ω8.5A
R
DS(on)
maxI
Benefits
l Low Gate Charge Qg results in Simple
Drive Requirement
l Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche Voltage and Current
TO-220AB
Absolute Maximum Ratings
ParameterMax.Units
ID @ TC = 25°CContinuous Drain Current, VGS @ 10V8.5
ID @ TC = 100°CContinuous Drain Current, VGS @ 10V5.4A
I
DM
PD @TC = 25°CPower Dissipation167W
V
GS
dv/dtPeak Diode Recovery dv/dt 2.8V/ns
T
J
T
STG
Pulsed Drain Current 21
Linear Derating Factor1.3W/°C
Gate-to-Source Voltage ± 30V
Operating Junction and-55 to + 150
Storage Temperature Range
Soldering Temperature, for 10 seconds300 (1.6mm from case )
Mounting torqe, 6-32 or M3 screw 10 lbf•in (1.1N•m)
°C
D
Typical SMPS Topologies
l Single Transistor Flyback
l Single Transistor Forward
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Page 6
IRFB9N65APbF
V
S
Current Regulator
I
A
A
Document Number: 91104
www.vishay.com
6
15V
DRIVER
+
-
V
R
20V
V
DS
G
t
L
D.U.T
I
AS
Ω
0.01
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
Q
GD
DD
800
TOP
600
400
200
AS
E , Single Pulse Avalanche Energy (mJ)
0
255075100125150
Starting T , Junction Temperature( C)
J
BOTTOM
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
800
I
D
2.3A
3.3A
5.2A
°
G
Charge
Fig 13a. Basic Gate Charge Waveform
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
+
V
D
-
I
D
Fig 13b. Gate Charge Test Circuit
780
760
740
DSav
720
V , Avalanche Voltage (V)
700
0123456
I , Avalanche Current (A)
av
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
Page 7
IRFB9N65APbF
R
V
+
-
Document Number: 91104
www.vishay.com
7
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
• dv/dt controlled by R
• Driver same type as D.U.T.
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
Period
P. W .
+
V
DD
VGS=10V
*
Reverse
Recovery
Current
e-Applied
oltage
D.U.T. ISDWaveform
Body Diode Forward
Current
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
* V
= 5V for Logic Level Devices
GS
di/dt
Diode Recovery
dv/dt
Fig 14. For N-Channel HEXFET® Power MOSFETs
V
DD
I
SD
Page 8
IRFB9N65APbF
K
R
Document Number: 91104
www.vishay.com
8
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
1.40 (.055)
1.15 (.045)
2X
10.29 (.405)
4
1 2 3
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 ( .555)
13.47 ( .530)
3X
2.54 (.100)
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
3.78 (.149)
3.54 (.139)
- A -
6.47 (.255)
6.10 (.240)
1.15 (.045)
MIN
4.06 (.160)
3.55 (.140)
0.93 (.037)
3X
0.69 (.027)
0.36 (.014) M B A M
4.69 (.185)
4.20 (.165)
- B -
1.32 (.052)
1.22 (.048)
2.92 (.115)
2.64 (.104)
3X
LEAD ASSIGNMENTS
LEAD ASSIGNMENTS
HEXFET
1- GATE 2- DRAIN
1- GATE
3- SOURCE
2- DRAIN
3- SOURCE
4- DRAIN
4- DRAIN
0.55 (.022)
0.46 (.018)
TO-220AB Part Marking Information
EXAMPLE:
T H IS IS AN IRF 1010
LOT CODE 1789
ASSE MBLE D ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
Note: "P" in assembly line
position indicates "Lead-Free"
INT ERNAT I ONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
IGBTs, CoPAC
1- GA TE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
PART NUMBE
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. (See fig. 11)
C
eff. is a fixed capacitance that gives the same charging time
Starting T
RG = 25Ω, I
I
SD
= 25°C, L = 24mH
J
AS
≤ 5.2A, di/dt ≤ 90A/µs, V
= 5.2A. (See Figure 12)
≤ V
DD
(BR)DSS
,
oss
as C
oss
while V
is rising from 0 to 80% V
DS
Uses IRFIB5N65A data and test conditions
DSS
TJ ≤ 150°C
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
06/04
Page 9
Legal Disclaimer Notice
Vishay
Notice
The products described herein were acquired by Vishay Intertechnology, Inc., as part of its acquisition of
International Rectifier’s Power Control Systems (PCS) business, which closed in April 2007. Specifications of the
products displayed herein are pending review by Vishay and are subject to the terms and conditions shown below.
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or
anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
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are registered trademarks of International Rectifier Corporation in the U.S. and other countries. All other product
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®
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