Datasheet IRFB9N60A Datasheet (International Rectifier)

PD - 91811

IRFB9N60A

HEXFET® Power MOSFET

l Dynamic dv/dt Rating l Repetitive Avalanche Rated l Fast Switching l Ease of Paraleling l Simple Drive Requirements

G

D

V

= 600V

DSS

R

DS(on)

= 0.75Ω

ID = 9.2A

S

Description

Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low onresistance and cost-effectiveness.

The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry.

TO-220AB

Absolute Maximum Ratings

Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 9.2 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 5.8 A I

DM

PD @TC = 25°C Power Dissipation 170 W

V

GS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt  5.0 V/ns T

J

T

STG

Pulsed Drain Current  37

Linear Derating Factor 1.3 W/°C Gate-to-Source Voltage ± 30 V Single Pulse Avalanche Energy 290 mJ Avalanche Current 9.2 A Repetitive Avalanche Energy 17 m J

Operating Junction and -55 to + 150 Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)

°C

Thermal Resistance

Parameter Typ. Max. Units

R

θJC

R

θCS

R

θJA

Junction-to-Case ––– 0.75 Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W Junction-to-Ambient ––– 62

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10/7/98

IRFB9N60A

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions

V

(BR)DSS

∆V

(BR)DSS

R

DS(on)

V

GS(th)

g

fs

I

DSS

I

GSS

Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

L

D

L

S

C

iss

C

oss

C

rss

C

oss

C

oss

C

eff. Effective Output Capacitance  ––– 96 ––– VGS = 0V, VDS = 0V to 480V

oss

Drain-to-Source Breakdown Voltage 600 ––– ––– V VGS = 0V, ID = 250µA

/∆T

Breakdown Voltage Temp. Coefficient ––– 0.66 ––– V/°C Reference to 25°C, ID = 1mA

J

Static Drain-to-Source On-Resistance ––– ––– 0.75 Ω VGS = 10V, ID = 5.5A  Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA Forward Transconductance 5.5 ––– ––– S VDS = 25V, ID = 5.5A

Drain-to-Source Leakage Current

––– ––– 25

––– ––– 250 VDS = 480V, VGS = 0V, TJ = 150°C Gate-to-Source Forward Leakage ––– ––– 100 VGS = 30V Gate-to-Source Reverse Leakage ––– ––– -100

VDS = 600V, VGS = 0V

µA

nA

VGS = -30V Total Gate Charge ––– – –– 49 ID = 9.2A Gate-to-Source Charge ––– ––– 13 nC VDS = 400V Gate-to-Drain ("Miller") Charge ––– –– – 20 VGS = 10V, See Fig. 6 and 13  Turn-On Delay Time ––– 13 ––– VDD = 300V Rise Time ––– 25 ––– ID = 9.2A Turn-Off Delay Time ––– 30 ––– RG = 9.1Ω

ns

Fall Time ––– 22 ––– RD = 35.5Ω,See Fig. 10 

Internal Drain Inductance

Internal Source Inductance ––– –––

4.5

––– –––

7.5

Between lead,

6mm (0.25in.)

nH

from package

and center of die contact Input Capacitance ––– 1400 ––– VGS = 0V Output Capacitance ––– 180 ––– VDS = 25V Reverse Transfer Capacitance ––– 7.1 –– – pF ƒ = 1.0MHz, See Fig. 5 Output Capacitance ––– 1957 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz Output Capacitance ––– 49 ––– VGS = 0V, VDS = 480V, ƒ = 1.0MHz

D

G

S

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units Conditions

I

S

I

SM

V

SD

t

rr

Q

rr

t

on

Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode) 

––– –––

9.2

37

showing the

A

p-n junction diode.

G

Diode Forward Voltage ––– ––– 1.5 V TJ = 25°C, IS = 9.2A, VGS = 0V  Reverse Recovery Time ––– 530 80 0 n s TJ = 25°C, IF = 9.2A Reverse RecoveryCharge ––– 3.0 4.4 µC di/dt = 100A/µs



Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:

 Repetitive rating; pulse width limited by

 Pulse width ≤ 300µs; duty cycle ≤ 2%.

max. junction temperature. ( See fig. 11 )

 C

eff. is a fixed capacitance that gives the same charging time

 Starting T

RG = 25Ω, I

 I

SD

= 25°C, L = 6.8mH

J

AS

≤ 9.2A, di/dt ≤ 50A/µs, V

= 9.2A. (See Figure 12)

≤ V

DD

(BR)DSS

,

oss

as C

oss

while V

is rising from 0 to 80% V

DS

DSS

TJ ≤ 150°C

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D

S

IRFB9N60A

100

10

1

TOP

BOTTOM

VGS 15V 10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.7V

D

I , Drain-to-Source Current (A)

20µs PULSE WIDTH

°

T = 25 C

0.1

0.1 1 10 100

V , Drain-to-Source Voltage (V)

DS

100

J

100

10

D

I , Drain-to-Source Current (A)

1

VGS

TOP

15V 10V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM

4.7V

20µs PULSE WIDTH T = 150 C

1 10 100

V , Drain-to-Source Voltage (V)

DS

°

J

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

3.0

I =

D

9.2A

2.5

°

T = 150 C

J

10

°

T = 25 C

J

1

D

I , Drain-to-Source Current (A)

V = 50V

DS

0.1

4.0 5.0 6.0 7.0 8.0 9.0 10.0

V , Gate-to-Source Voltage (V)

GS

20µs PULSE WIDTH

Fig 3. Typical Transfer Characteristics

2.0

1.5

(Normalized)

1.0

0.5

DS(on)

R , Drain-to-Source On Resistance

0.0

-60 -40 -20 0 20 40 60 80 100 120 140 160

T , Junction Temperature ( C)

J

Fig 4. Normalized On-Resistance

V =

GS

°

10V

Vs. Temperature

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IRFB9N60A

)

A

2400

2000

1600

1200

800

C, Capacitance (pF)

400

0

1 10 100 1000

V = 0 V , f = 1MHz

GS

C = C + C , C SH O R TED

is s gs gd ds

C = C

rss gd

C = C + C

os s ds gd

C

iss

C

oss

C

rss

V , Dra in -to -S o u rc e V o ltage (V

DS

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

100

20

I =

9.2A

D

400V

V = 480V

DS

16

12

8

4

GS

V , Gate-to-Source Voltage (V)

V = 300V

DS

V = 120V

DS

FOR TEST CIRCUIT

0

0 10 20 30 40 50

Q , Total Gate Charge (nC)

G

SEE FIGURE

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

1000

OPERATION IN THIS AREA LIMITED

BY R

DS(on)

13

100

10

°

T = 150 C

J

1

°

T = 25 C

J

SD

I , Reverse Drain Current (A)

V = 0 V

0.1

0.2 0.5 0.7 1.0 1.2

V ,Source-to-Drain Voltage (V)

SD

GS

Fig 7. Typical Source-Drain Diode

10

D

I , Drain Current (A)I , Drain Current (A)

1

°

= 25 C

C

T T= 150 C Single Pulse

0.1 10 100 1000 10000

°

J

V , Drain-to-Source Voltage (V)

DS

Fig 8. Maximum Safe Operating Area

10us

100us

1ms

10ms

Forward Voltage

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10.0

8.0

6.0

4.0

D

I , Drain Current (A)

2.0

0.0 25 50 75 100 125 150

T , Case Temperature ( C)

C

°

Fig 9. Maximum Drain Current Vs.

Case Temperature

IRFB9N60A

R

D.U.T.

t

d(off)tf

D

V

DS

V

GS

R

G

10V

Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit

V

DS

90%

10% V

GS

t

d(on)tr

Fig 10b. Switching Time Waveforms

+

V

DD

-

1

D = 0.50

thJC

0.20

0.1

0.10 P

1 2

DM

t

1

t

2

0.05

Thermal Response (Z )

0.02

0.01

0.00001 0.0001 0.001 0.01 0.1 1

SINGLE PULSE

(THERMAL RESPONSE)

Notes:

1. Duty factor D = t / t

2. Peak T = P x Z + T

t , Rectangular Pulse Duration (sec)

1

J DM thJC C

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRFB9N60A

A

15V

DRIVER

+

-

R

20V

V

DS

G

t

L

D.U.T

I

AS

Ω

0.01

p

Fig 12a. Unclamped Inductive Test Circuit

V

(BR)DSS

t

p

V

DD

600

TOP

500

400

300

200

100

AS

E , Single Pulse Avalanche Energy (mJ)

0

25 50 75 100 125 150

Starting T , Junction Temperature ( C)

J

BOTTOM

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

I

D

4.1A

5.8A

9.2A

°

I

AS

Fig 12b. Unclamped Inductive Waveforms

Q

G

10 V

Q

GS

V

G

Q

GD

Charge

Fig 13a. Basic Gate Charge Waveform

Current Regulator

Same Type as D.U.T.

50KΩ

12V

.2µF

V

GS

.3µF

D.U.T.

3mA

I

G

Current Sampling Resistors

I

+

V

-

D

Fig 13b. Gate Charge Test Circuit

DS

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IRFB9N60A

Peak Diode Recovery dv/dt Test Circuit

D.U.T

+



Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance Current Transformer

-

+



-



-

+



R

G

Driver Gate Drive

P.W.

• dv/dt controlled by R

• Driver same type as D.U.T.

G

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

Period

D =

P.W.

Period

+

-

VGS=10V

V

DD

*

D.U.T. ISDWaveform

Reverse Recovery Current

Re-Applied Voltage

D.U.T. VDSWaveform

Inductor Curent

* V

= 5V for Logic Level Devices

GS

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

V

DD

I

SD

Fig 14. For N-Channel HEXFETS

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IRFB9N60A

A

Package Outline

TO-220AB Outline

Dimensions are shown in millimeters (inches)

10.54 (.415)

2.87 (.113)

2.62 (.103)

15.24 (.600)

14.84 (.584)

14.09 (.555)

13.47 (.530)

10.29 (.405)

1 2 3

6.47 (.255)

6.10 (.240)

4

1.15 (.045) MIN

4.06 (.160)

3.55 (.140)

3.78 (.149)

3.54 (.139)

- A -

4.69 (.185)

4.20 (.165)

- B -

1.32 (.052)

1.22 (.048)

LEAD ASSIGNMENTS 1 - GA T E 2 - DR A IN 3 - SO U RC E 4 - DR A IN

0.93 (.037)

3X

1.40 (.055)

3X

1.15 (.045)

2.54 (.100)

NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 2 C ON TRO L LIN G DIM E N SION : INC H 4 H E A TSIN K & LE A D ME A S U REME N T S DO N OT INCLUDE BURRS.

2X

0.69 (.027)

0.36 (.0 14 ) M B A M

0.55 (.022)

3X

0.46 (.018)

2.92 (.115)

2.64 (.104)

Part Marking Information

TO-220AB

EXAMPLE : THIS IS AN IRF1010 W IT H A SSEM BLY LOT CO DE 9 B1M

WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331

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http://www.irf.com/ Data and specifications subject to change without notice. 10/98

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INTERN A TION A L RE CTIFIER L OGO

ASSEMBLY LOT COD E

I RF1010

9246

9B 1M

PART NUMB ER

DATE CODE (YYWW) YY = YE AR WW = WEEK

IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111