Datasheet IRFB 7446 Datasheet

Applications

l Brushed Motor drive applications l BLDC Motor drive applications l Battery powered circuits

l Half-bridge and full-bridge topologies l Synchronous rectifier applications l Resonant mode power supplies l OR-ing and redundant power switches l DC/DC and AC/DC converters

l DC/AC Inverters

Benefits

l Improved Gate, Avalanche and Dynamic dV/dt

Ruggedness

l Fully Characterized Capacitance and Avalanche

SOA

l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free

S trongIRFET

IRFB7446PbF

HEXFET® Power MOSFET

V

D

G

S

GDS

Gate Drain Source

DSS

R

typ. 2.6m

DS(on)

max. 3.3m

I

D

(Silicon Limited)

I

D

(Package Limit ed)

D

S

D

G

TO-220AB

IRFB7446PbF

PD - 96435A

40V

Ω

123A

c

120A

Ordering Information

Base part number Package Type

IRFB7446PbF TO-220 Tube 50 IRFB7446PbF

)

8

Ω

m

(

e c n a

t s

6

i s e

R n O e

c

r

4

u o S

o

t

n

i a

2

r D ,

) n o

( S D

0

R

2 4 6 8 10 12 14 16 18 20

V

Gate -to -Source Voltage (V)

GS,

ID = 70A

TJ = 125°C

TJ = 25°C

Fig 1. Typical On-Resistance vs. Gate Voltage

Standard Pack

Complete Part Number

Form Quantity

125

100

) A

( t n e

75

r

r u

C n

i a

r

50

D ,

D

I

25

0

25 50 75 100 125 150 175

TC , Case Temperature (°C)

Fig 2. Maximum Drain Current vs. Case Temperature

www.irf.com 1

09/11/12

IRFB7446PbF

D

DM

GS

J

STG

AS (Thermally limited)

AS

AR

θ

JC

θ

CS

θ

JA

(BR)DSS

Δ

(BR)DSS

J

DS( on)

GS(th)

DSS

GSS

G

GS

D

DS

GS

Absolute Maximum Ratings

Symbol Parameter Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silic on Limited)

@ TC = 100°C Continuous Drain Current, VGS @ 10V (Silic on Limited)

I

@ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited)

I

Pulsed Drain Current

d

PD @TC = 25°C Maximum Power Dissipation W

Linear Derating Factor W/°C

V

T

Gate-to-Source Voltage V

Operating Junction and

Storage Temperature Range

Soldering Temperature, for 10 seconds (1.6mm from c ase)

Mounting torque, 6-32 or M3 screw

Avalanche Characteristics

E

(tested) Single Pulse Avalanche Energy Tested Value

I

E

Single Pulse Avalanche Energy

Avalanche Current

Repetitive Avalanc he Energy

d

d

e

k

See Fig. 14, 15 , 22a, 22b

Thermal Resistance

Symbol Parameter Typ. Max. Units

R

Junction-to-Case

j

––– 1.52

Case-to-Sink, Flat Greased Surface 0.50 –––

Junction-to-Ambient ––– 62

Max.

123

87

120

492

99

0.66

± 20

-55 to + 175

300

10lbf

x

in (1.1Nxm)

111

160

c

°C/W

A

°C

mJ

A

mJ

Static @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units

V

/ΔT

R

V I

I

R

Notes:

 Calculated continuous current based on maximum allowable junction

temperature. Bond wire current limit is 120A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140)

 Repetitive rating; pulse width limited by max. junction temperature.  Limited by T

I

= 70A, VGS =10V.

AS

 I

≤ 70A, di/dt ≤ 1174A/μs, V

SD

Drain-to-Source Breakdown Voltage 40 ––– ––– V Breakdown Voltage Temp. Coefficient ––– 0.033 ––– V/°C

Static Drain-to-Source On-Resistance ––– 2.6 3.3 mΩ

3.9 ––– mΩ

Gate Thres hold Voltage 2.2 3.0 3.9 V Drain-to-Source Leak age Current ––– ––– 1.0

––– ––– 150 Gate-to-Source Forward Leakage ––– ––– 100

Gate-to-Source Reverse Leakage ––– ––– -100 Internal Gate Resistance ––– 1.6 ––– Ω

 C

eff. (TR) is a fixed capacitance that gives the same charging

oss

, starting TJ = 25°C, L = 0.046mH,RG = 50Ω,

Jmax

DD

≤ V

(BR)DSS

, TJ ≤ 175°C.

time as C

 C

oss

C

oss

 R

is measured at TJ approximately 90°C.

θ

 This value determined from sample failure population,

starting TJ = 25°C, L=0.046mH, RG = 50Ω, I

while V

oss

eff. (ER) is a fixed capacitance that gives the same energy as

while V

is rising from 0 to 80% V

DS

 Pulse width ≤ 400μs; duty cycle ≤ 2%.

VGS = 0V, ID = 250μA Referenc e to 25°C, I

VGS = 10V, ID = 70A V

= 6.0V, ID = 35A

VDS = VGS, ID = 100μA V

μA

nA

is rising from 0 to 80% V

DS

= 40V, VGS = 0V

V

= 40V, VGS = 0V, TJ = 125°C = 20V

V

= -20V

DSS

Conditions

= 5mA

g

.

DSS

.

= 70A, VGS =10V.

AS

d

2 www.irf.com

Dynamic @ TJ = 25°C (unless otherwise specified)

g

gs

gd

sync

d(on)

r

d(off)

f

iss

oss

rss

oss

S

SM

(Body Diode)

d

SD

rr

J

rr

RRM

J

D

DS

GS

D

J

p-n junction diode.

showing the

G

DS

GS

Symbol Parameter Min. Typ. Max. Units

gfs Forward Transconductance 269 ––– ––– S

Q Q

t t

C C

eff. (ER) Effective Output Capacitance (Energy Related) ––– 596 –––

eff. (TR) Effective Output Capacitance (Time Related) ––– 688 –––

C

Total Gate Charge ––– 62 93 Gate-to-Source Charge ––– 16 –––

Gate-to-Drain ("Miller") Charge ––– 20 ––– Total Gate Charge Sync. (Qg - Qgd) ––– 42 –––

Turn-On Delay Time ––– 11 ––– Rise Time –––34–––

Turn-Off Delay Time ––– 33 ––– Fall Time ––– 23 –––

Input Capacitance ––– 3183 ––– Output Capacitance ––– 475 –––

Reverse Transfer Capacitance ––– 331 –––

Diode Characteristics

Symbol Parameter Min. Typ. Max. Units

I

V

dv/dt Peak Diode Recovery t

Q

I

Continuous Source Current

(Body Diode) Pulsed Source Current

–––

120

492

c

Diode Forw ard Voltage ––– 0.9 1.3 V

f

––– 7.6 ––– V/ns

Reverse Recovery Time ––– 22 ––– TJ = 25°C VR = 34V,

–––24––– T

Reverse Recovery Charge ––– 15 ––– TJ = 25°C

–––15––– TJ = 125°C

Reverse Recovery Current ––– 1.0 ––– A TJ = 25°C

VDS = 10V, ID = 70A

I

= 70A

=20V

V

nC

= 10V

V I

= 70A, VDS =0V, VGS = 10V

g

VDD = 20V ID = 30A

ns

Ω

= 2.7

R VGS = 10V

g

VGS = 0V V

= 25V

pF

ƒ = 1.0 MHz, See Fig. 5 V

= 0V, VDS = 0V to 32V i, See Fig. 11

= 0V, VDS = 0V to 32V

V

MOSFET symbol

A

integral reverse

= 25°C, IS = 70A, VGS = 0V

T

= 175°C, IS = 70A, VDS = 40V

T

ns

= 125°C IF = 70A

nC

IRFB7446PbF

Conditions

h

Conditions

G

g

di/dt = 100A/μs

g

D

S

www.irf.com 3

IRFB7446PbF

1000

) A

(

100

t n e

r

r u

C e

c

r u o S

o

t

n

i a

r D

,

D

I

0.1

1000

) A

(

100

t n e

r

r u

C e

c

r u o S

o

t

n

i a

r D

,

D

I

100000

) F

10000

p

( e

c n a

t

i c a p a

C

1000

, C

TOP 15V

BOTTOM 4.5V

10

1

4.5V

60μs

≤

PULSE WIDTH

Tj = 25°C

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

Fig 3. Typical Output Characteristics

TJ = 175°C

10

TJ = 25°C

1

V

= 10V

DS

≤60μs PULSE WIDTH

0.1 2 4 6 8 10

VGS, Gate-to-Source Voltage (V)

Fig 5. Typical Transfer Characteristics

V

= 0V, f = 1 MHZ

GS

C

= C

C

iss

rss

oss

= C

+ Cgd, C

gs

gd

+ C

ds

SHORTED

ds

gd

C

iss

C

oss

C

rss

VGS

10V

8.0V

7.0V

6.0V

5.5V

5.0V

1000

VGS

10V

8.0V

7.0V

6.0V

5.5V

5.0V

) A

( t n e

r

r u

C e

c

r u o S

o

t

n

i a

r D

, I

100

D

10

4.5V

60μs

≤

TOP 15V

BOTTOM 4.5V

PULSE WIDTH

Tj = 175°C

1

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

Fig 4. Typical Output Characteristics

2.2

e c n a

t s

i s e

R n O e

)

c

d

r

e

u

z

i

o

l

S

a

m

o

t

r

-

o

n

i

N

(

a

r D

,

) n o

( S D

R

1.8

1.4

1.0

ID = 70A

V

= 10V

GS

0.6

-60 -20 20 60 100 140 180

TJ , Junction Temperature (°C)

Fig 6. Normalized On-Resistance vs. Temperature

14.0

ID= 70A

12.0

) V

( e

g

10.0

a

t

l o V

e

8.0

c

r u o S

-

6.0

o

t

e

t a

4.0

G ,

S G

V

2.0

VDS= 32V

VDS= 20V

100

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

0.0 0 1020304050607080

QG, Total Gate Charge (nC)

Fig 8. Typical Gate Charge vs. Gate-to-Source VoltageFig 7. Typical Capacitance vs. Drain-to-Source Voltage

4 www.irf.com

IRFB7446PbF

1000

) A

( t

100

n e

r

r u

C n

i a

r

10

D e

s

r e v e

R ,

1

D S

I

0.1

0.0 0.5 1.0 1.5 2.0

TJ = 175°C

TJ = 25°C

V

GS

VSD, Source-to-Drain Voltage (V)

Fig 9. Typical Source-Drain Diode

) V

(

50

e g a

t

l o V

n w

o d k a e

r B

e c

r u o S

o

t

n

i a

r D

,

S S D

) R B

(

V

Id = 5.0mA

49

48

47

46

45

44

43

42

41

40

-60 -20 20 60 100 140 180

Forward Voltage

TJ , Temperature ( °C )

Fig 11. Drain-to-Source Breakdown Voltage

)

20.0

Ω

m (

e c n a

t s

i

15.0

s e

R n O e

c

r

10.0

u o S

o

t

n

i a

r

5.0

D ,

) n o

(

S D

0.0

R

10000

) A

(

1000

t n e

r

r u

C

100

e c

r u o S

o

t

10

n

i a

r D ,

1

D

I

= 0V

0.1

0.1 1 10 100

Fig 10. Maximum Safe Operating Area

0.6

0.5

0.4

) J

μ

( y

0.3

g

r e n E

0.2

0.1

0.0 0 5 10 15 20 25 30 35 40 45

Fig 12. Typical C

VGS = 5.5V VGS = 6.0V VGS = 7.0V VGS = 8.0V VGS = 10V

0 100 200 300 400 500

ID, Drain Current (A)

OPERATION IN THIS AREA LIMITED BY RDS(on)

100μsec

1msec

Package Limited

Tc = 25°C Tj = 175°C Single Pulse

VDS, Drain-to-Source Voltage (V)

VDS= 0V to 32V

V

Drain-to-Source Voltage (V)

DS,

DC

10msec

Stored Energy

OSS

Fig 13. Typical On-Resistance vs. Drain Current

www.irf.com 5

IRFB7446PbF

10

W

/ C

°

1

)

C J h

t

Z (

e

0.1

s n o p s e

R l a

0.01

m

r e h T

0.001 1E-006 1E-005 0.0001 0.001 0.01 0.1

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000

100

) A

( t n e

r

r u

C

10

e h c n a

l a v A

1

Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔΤ j = 25°C and

Tstart = 150°C.

0.1

1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

D = 0.50

0.20

0.10

0.05

0.02

0.01

SINGLE PULSE ( THERMAL RESPONSE )

t1 , Rectangular Pulse Duration (sec)

Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Δ Tj = 150°C and

Tstart = 25°C (Single Pulse)

Fig 14. Typical Avalanche Current vs.Pulsewidth

tav (sec)

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

120

TOP Single Pulse BOTTOM 1.0% Duty Cycle

) J

m

( y

g

80

r e n E

e h c n a

l a v A

40

,

R A

E

ID = 70A

0

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T

2. Safe operation in Avalanche is allowed as long asT

. This is validated for every part type.

jmax

is not exceeded.

jmax

3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.

4. P

= Average power dissipation per single avalanche pulse.

D (ave)

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche).

6. I

= Allowable avalanche current.

av

7. ΔT = Allowable rise in junction temperature, not to exceed T

(assumed as

jmax

25°C in Figure 14, 15). t

Average time in avalanche.

av =

D = Duty cycle in avalanche = t Z

(D, tav) = Transient thermal resistance, see Figures 13)

thJC

P

D (ave)

·f

av

= 1/2 ( 1.3·BV·Iav) = DT/ Z

I

2DT/ [1.3·BV·Zth]

av =

E

= P

AS (AR)

D (ave)·tav

thJC

Fig 15. Maximum Avalanche Energy vs. Temperature

6 www.irf.com

IRFB7446PbF

4.5

) V

( e

g

3.5

a

t

l o V

d

l o h s e

2.5

r h

t e

t a

G ,

) h

t

( S G

V

ID = 100μA ID = 250μA ID = 1.0mA

1.5 ID = 1.0A

0.5

-75 -25 25 75 125 175 225

TJ , Temperature ( °C )

Fig 16. Threshold Voltage vs. Temperature

5

IF = 70A

VR = 34V

4

TJ = 25°C

TJ = 125°C

)

3

A

(

M R R

I

2

6

IF = 46A

VR = 34V

5

TJ = 25°C

TJ = 125°C

4

) A

(

3

M R R

I

2

1

0

0 200 400 600 800 1000

diF /dt (A/μs)

Fig. 17 - Typical Recovery Current vs. dif/dt

70

IF = 46A

60

VR = 34V

TJ = 25°C

50

TJ = 125°C

)

40

C n

(

R R

30

Q

1

0

0 200 400 600 800 1000

diF /dt (A/μs)

60

IF = 70A

VR = 34V

50

TJ = 25°C

TJ = 125°C

40

) C

n

(

30

R R

Q

20

10

0

0 200 400 600 800 1000

20

10

0

0 200 400 600 800 1000

diF /dt (A/μs)

Fig. 19 - Typical Stored Charge vs. dif/dtFig. 18 - Typical Recovery Current vs. dif/dt

diF /dt (A/μs)

Fig. 20 - Typical Stored Charge vs. dif/dt

www.irf.com 7

IRFB7446PbF

A

V

DS

90%

10% V

GS

t

d(on)tr

t

d(off)tf





Reverse Recovery Current

Driver Gate Drive

P.W.

D.U.T. ISDWaveform

D.U.T. VDSWaveform

Inductor Current

Inductor Curent

* V

GS

D.U.T

+

-

R

G

+



Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

-

• Low Leakage Inductance Current Transformer

-

• dv/dt controlled by R

• Driver same type as D.U.T.

• I

controlled by Duty Factor "D"

SD

• D.U.T. - Device Under Test



G

+

V

DD

Re-Applied Voltage

+

-

Period

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

= 5V for Logic Level Devices

D =

P. W .

Period

VGS=10V

V

DD

I

SD

*

Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET® Power MOSFETs

V

15V

V

DS

L

DRIVER

t

p

(BR)DSS

R

G

20V

V

GS

Fig 22a. Unclamped Inductive Test Circuit

V

GS

R

G

10V

V

GS

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

D.U.T

I

AS

Ω

0.01

t

p

+

V

DD

-

I

AS

Fig 22b. Unclamped Inductive Waveforms

R

D.U.T.

D

+

V

DD

-

V

DS

Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms

Current Regulator

Same Type as D.U.T.

.2μF

12V

V

GS

50KΩ

3mA

.3μF

D.U.T.

+

V

DS

-

Vds

Vgs(th)

Id

Vgs

I

Current Sampling Resistors

Fig 24a. Gate Charge Test Circuit

8 www.irf.com

I

G

D

Qgs1

Qgs2 Qgd Qgodr

Fig 24b. Gate Charge Waveform

TO-220AB Package Outline

Qualification information

Indust rial

Date

Comment

Dimensions are shown in millimeters (inches)

TO-220AB Part Marking Information

IRFB7446PbF

EXAMPLE: T HIS I S AN IRF1010

Note: "P" in as sembly line position

LOT CODE 1789 ASS EMBLE D ON WW 19, 2000 IN THE ASSEMBLY LINE "C"

i ndi cates " Lead - F ree"

INTERNATIONAL

RECTIFIE R

LOGO

AS S E MB L Y LOT CODE

PART NUMBER

DATE CODE YEAR 0 = 2000 WE EK 19 LINE C

TO-220AB packages are not recommended for Surface Mount Application.

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

†

Yes

††

†††

guidelines)

N/A

(per JE DEC J-S TD-020D

†††

)

Qualification level

RoHS compliant

(per JEDEC JESD47F

TO-220ABMoisture Sensitivity Level

 Qualification standards can be found at International Rectifiers web site: http://www.irf.com/product-info/reliability/

 Higher qualification ratings may be available should the user have such requirements. Please contact your Inte rn ati onal Rectifier sales representative for further information: http:www.irf.com/whoto-call/salesrep/

 Applicable version of JEDEC standard at the time of product release.

Revision History

9/11/2012 Added Package limit on pg1,2 and updated Fig2 , Fig10

www.irf.com 9

Data and specifications subject to change without notice.

IR WORLD HEADQUARTERS: 101N Sepulveda., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information. 09/2012