Datasheet irfb16n60lpbf Datasheet

Page 1
SMPS MOSFET
C
c
s
f
f
Document Number: 91097
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1
IRFB16N60LPbF
PD - 95471
Applications
HEXFET® Power MOSFET
• Zero Voltage Switching SMPS
V
• Telecom and Server Power Supplies
• Uninterruptible Power Supplies
DSSRDS(on)
600V
385m
• Motor Control applications
• Lead-Free
Features and Benefits
• SuperFast body diode eliminates the need for external diodes in ZVS applications.
• Enhanced dv/dt capabilities offer improved ruggedness.
• Higher Gate voltage threshold offers improved noise immunity
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C
I
@ TC = 100°
D
I
DM
P
@TC = 25°C
D
V
GS
dv/dt T
J
T
STG
Continuous Drain Current, V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation 310 W
Linear Derating Factor 2.5 W/°C Gate-to-Source Voltage ±30 V
Peak Diode Recovery dv/dt
Operating Junction and -55 to + 150
Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 screw 1.1(10) N•m (lbf•in)
GS
d
@ 10V
16
10 A
60
10 V/ns
Diode Characteristics
Symbol Parameter Min. Typ. Max. Unit
I
S
I
SM
V
t
rr
Q
I
RRM
t
on
SD
rr
Continuous Source Current ––– ––– 16 MOSFE T symbol
(Body Diode) A showing the Pulsed Source Current ––– ––– 60 integral reverse
(Body Diode)
Diode Forward Voltage ––– ––– 1.5 V
Reverse Recovery Time ––– 130 200 ns
Reverse Recovery Charge ––– 450 670 nC
Reverse Recovery Current ––– 5.8 8.7 A
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
c
––– 240 360
––– 1080 1620
p-n junction diode. T
T
T
T
T
T
typ.
Trr typ.
Ω 130ns 16A
TO-220AB
.
Conditions
G
= 25°C, IS = 16A, VGS = 0V
J
= 25°C, IF = 16A
J
= 125°C, di/dt = 100A/µs
J
= 25°C, IS = 16A, VGS = 0V
J
= 125°C, di/dt = 100A/µs
J
= 25°C
J
I
D
f
f
7/7/04
D
S
Page 2
IRFB16N60LPbF
/
Single Pulse Aval
gy
d
Aval
c
R
gy
c
Document Number: 91097
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2
Static @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units
V
(BR)DSS
∆
V
R
DS(on)
V
GS(th)
I
DSS
I
GSS
R
G
(BR)DSS
Drain-to-Source Breakdown Voltage 600 ––– ––– V
∆
T
Breakdown Voltage Temp. Coefficient ––– 0.39 ––– V/°C
J
Static Drain-to-Source On-Resistance ––– 385 460
Gate Threshold Voltage 3.0 ––– 5.0 V
Drain-to-Source Leakage Current ––– ––– 50 µA
––– ––– 2.0 mA
Gate-to-Source Forward Leakage ––– ––– 100 nA
Gate-to-Source Reverse Leakage ––– ––– -100
Internal Gate Resistance ––– 0.79 –––
VGS = 0V, ID = 250µA
Reference to 25°C, I
V
mΩ
GS
V
DS
V
DS
V
DS
V
GS
V
GS
Ω
f = 1MHz, open drain
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units
gfs Forward Transconductance 8.3 ––– ––– S Q
Q
Q
t
t
t
t
C
C
C
C
C
g
gs
gd
d(on)
r
d(off)
f
iss
oss
rss
oss
oss
eff.
eff. (ER)
Total Gate Charge ––– ––– 100
Gate-to-Source Charge ––– ––– 30 nC
Gate-to-Drain ("Miller") Charge ––– ––– 46
Turn-On Delay Time ––– 20 –––
Rise Time ––– 44 ––– ns
Turn-Off Delay Time ––– 28 –––
Fall Time ––– 5.5 –––
Input Capacitance ––– 2720 –––
Output Capacitance ––– 260 –––
Reverse Transfer Capacitance ––– 20 ––– pF
Effective Output Capacitance ––– 120 –––
Effective Output Capacitance ––– 100 –––
(Energy Related)
VDS = 50V, ID = 9.0A
I
= 16A
D
V
DS
V
GS
VDD = 300V
ID = 16A
R
G
V
GS
VGS = 0V
V
DS
ƒ = 1.0MHz, See Fig. 5
V
GS
Avalanche Characteristics
Symbol
E
AS
I
AR
E
AR
anche Current
epetitive Avalanche Ener
Parameter Typ. Units
anche Ener
––– mJ
––– A
––– mJ
Thermal Resistance
Symbol Parameter Typ. Units
R
JC
θ
R
JA
θ
Junction-to-Case ––– °C/W
Junction-to-Ambient ––– 62
Conditions
= 1mA
D
= 10V, ID = 9.0A
f
= VGS, ID = 250µA
= 600V, VGS = 0V
= 480V, VGS = 0V, TJ = 125°C
= 30V
= -30V
Conditions
= 480V
= 10V, See Fig. 7 & 15
= 1.8Ω
= 10V, See Fig. 11a & 11b
= 25V
= 0V,VDS = 0V to 480V
Max.
310
16
31
Max.
0.4
f
f
g
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See Fig. 11)
 Starting T
I
AS
I
SD
TJ ≤ 150°C.
= 25°C, L = 2.5mH, RG = 25Ω,
J
= 16A, dv/dt = 10V/ns. (See Figure 12a)
≤ 16A, di/dt ≤ 340A/µs, V
DD
≤ V
(BR)DSS
Pulse width ≤ 300µs; duty cycle ≤ 2%.C
eff. is a fixed capacitance that gives the same charging time
oss
as C
while VDS is rising from 0 to 80% V
oss
C
eff.(ER) is a fixed capacitance that stores the same energy
oss
as C
while VDS is rising from 0 to 80% V
,
oss
DSS
DSS
.
.
Page 3
IRFB16N60LPbF
Document Number: 91097
www.vishay.com
3
1000
TOP 15V
100
) A
( t n e
r
10
r u
C e
c
r u o S
­o
t
­n
i a
r D
,
D
I
BOTTOM 5.0V
1
0.1
0.01
VGS
12V 10V
9.0V
8.0V
7.0V
6.0V
5.0V
20µs PULSE WIDTH Tj = 25°C
0.001
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
1000
)
Α
100
(
t n e
r
r u
C
10
e c
r u o S
-
1
o
t
­n
i a
r D
,
0.1
D
I
TJ = 25°C
TJ = 150°C
V
= 50V
DS
20µs PULSE WIDTH
0.01
4 6 8 10 12 14 16
VGS, Gate-to-Source Voltage (V)
100
TOP 15V
) A
( t
10
n e
r
r u
C e
c
r u o S
­o
t
­n
i a
r D
,
D
I
BOTTOM 5.0V
1
0.1
VGS
12V 10V
9.0V
8.0V
7.0V
6.0V
20µs PULSE WIDTH Tj = 150°C
0.01
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.0
e c n a
t s
i s e
R n O e
c
r u o S
­o
t
­n
i a
r D
,
) n o
( S D
R
ID = 15A
V
= 10V
GS
2.5
2.0
) d e z
i
1.5
l a
m
r o
N
(
1.0
0.5
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
5.0V
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
vs. Temperature
Page 4
IRFB16N60LPbF
Document Number: 91097
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4
100000
10000
) F p
( e
1000
c n a
t
i c a p
100
a C
, C
10
1
V
= 0V, f = 1 MHZ
GS
C
= C
iss
gs
C
= C
rss
oss
= C
gd
ds
C
C
C
rss
C
1 10 100 1000
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
12.0 ID= 15A
)
10.0
V
( e
g a
t
l
8.0
o V
e c
r u
6.0
o S
­o
t
­e
t
4.0
a G
,
S G
2.0
V
0.0 0 10203040506070
Q
VDS= 480V
VDS= 300V
VDS= 120V
Total Gate Charge (nC)
G
+ Cgd, C
+ C
gd
iss
oss
SHORTED
ds
25
20
)
15
J µ
( y
g
r e n
10
E
5
0
0 100 200 300 400 500 600 700
V
Drain-to-Source Voltage (V)
DS,
Fig 6. Typ. Output Capacitance
Stored Energy vs. V
100.00
) A
( t n e
r
r u
C n
i a
r D e
s
r e v e
R ,
D S
I
10.00
1.00
0.10
TJ = 150°C
TJ = 25°C
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
VSD, Source-to-Drain Voltage (V)
DS
V
GS
= 0V
Fig 7. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 8. Typical Source-Drain Diode
Forward Voltage
Page 5
IRFB16N60LPbF
Document Number: 91097
www.vishay.com
5
1000
OPERATION IN THIS AREA
) A
( t n e
r
r u
C e
c
r u o S
­o
t
­n
i a
r D ,
I
100
10
1
D
Tc = 25°C Tj = 150°C Single Pulse
LIMITED BY RDS(on)
100µsec
1msec
10msec
0.1
1 10 100 1000 10000
VDS, Drain-to-Source Voltage (V)
Fig 9. Maximum Safe Operating Area
18
16
14
) A
(
12
t n e
r
r
10
u C n
i
8
a
r D
6
,
D
I
4
2
0
25 50 75 100 125 150
TC , Case Temperature (°C)
Fig 10. Maximum Drain Current vs.
Case Temperature
R
V
DS
V
GS
R
G
D
D.U.T.
10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 11a. Switching Time Test Circuit
V
DS
90%
+
V
DD
-
10% V
GS
t
d(on)tr
t
d(off)tf
Fig 11b. Switching Time Waveforms
Page 6
IRFB16N60LPbF
Document Number: 91097
www.vishay.com
6
1
)
C J h
t
Z (
e s n o p s e
R l a
m
r e h T
0.001
0.1
0.01
D = 0.50
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE ( THERMAL RESPONSE )
1E-006 1E-005 0.0001 0.001 0.01 0.1 1
Not es:
1. Duty factor D = t / t
2. Peak T = P x Z + T
J DM thJC C
1 2
P
DM
t
t1 , Rectangular Pulse Duration (sec)
Fig 12. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1
t
2
5.0
) V
(
4.5
e g a
t
l o
4.0
V d
l o h s
3.5
e
r h
t e
t a
3.0
G
) h
t
( S
2.5
G
V
2.0
-75 -50 -25 0 25 50 75 100 125 150 175
ID = 250µA
TJ , Temperature ( °C )
Fig 13. Threshold Voltage vs. Temperature
Page 7
IRFB16N60LPbF
A
Document Number: 91097
www.vishay.com
7
600
) J
m
( y
500
g
r e n E
e
400
h c n a
l a v
300
A e
s
l u P
200
e
l g n
i S
100
,
S A
E
0
25 50 75 100 125 150
TOP 7.2A
BOTTOM16A
Starting TJ , Junction Temperature (°C)
Fig 14a. Maximum Avalanche Energy
vs. Drain Current
15V
V
DS
L
DRIVER
I
D
10A
V
(BR)DSS
t
p
R
G
20V
D.U.T
I
AS
Ω
0.01
t
p
+
V
DD
-
Fig 14b. Unclamped Inductive Test Circuit
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
+
V
DS
-
I
D
Fig 15a. Gate Charge Test Circuit
I
AS
Fig 14c. Unclamped Inductive Waveforms
Q
G
VGS V
Q
GS
V
G
Q
GD
Charge
Fig 15b. Basic Gate Charge Waveform
Page 8
IRFB16N60LPbF
Document Number: 91097
www.vishay.com
8
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance Current Transformer
-
-
• dv/dt controlled by R
• Driver same type as D.U.T.
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
P. W .
Period
+
+
V
DD
-
VGS=10V
*
Reverse Recovery Current
Re-Applied Voltage
D.U.T. ISDWaveform
Body Diode Forward
Current
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
* V
= 5V for Logic Level Devices
GS
di/dt
Diode Recovery
dv/dt
V
DD
I
SD
Fig 16. For N-Channel HEXFET® Power MOSFETs
Page 9
TO-220AB Package Outline
Document Number: 91097
www.vishay.com
9
Dimensions are shown in millimeters (inches)
2.87 (. 113)
2.62 (. 103)
15.24 (.600)
14.84 (.584)
14.09 (. 555)
13.47 (. 530)
10.54 (.415)
10.29 (.405)
1 2 3
4
6.47 (.255)
6.10 (.240)
1.15 (.0 45) MIN
4.06 ( .160)
3.55 ( .140)
3.78 (.1 49)
3.54 (.1 39)
- A -
4.69 (.185)
4.20 (.165)
IRFB16N60LPbF
- B -
1.32 (.052)
1.22 (.048)
LEAD ASSI GNMENTS
LEAD ASSIGNMENTS
HEXFET
1 - GAT E 2 - DRA IN
1- GATE
3 - SOU RCE
2- DRAIN 3- S OURCE
4 - DRA IN
4- DRAIN
IGBTs, C oPACK
1- GATE 2- COLLECTOR 3- EMITTER 4- COLLECTOR
0.93 (. 037)
3X
1.40 (.055)
3X
1.15 (.045)
2.54 (.1 00)
NOTES:
1 DIMENSION ING & TOLER ANC ING PER AN SI Y14 .5M, 198 2. 3 OUTLINE CONFOR MS TO JE DEC OUTL INE TO- 220A B. 2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
2X
0.69 (. 027)
0.36 (.014) M B A M
3X
2.92 (. 115)
2.64 (. 104)
TO-220AB Part Marking Information
EXAMPLE:
TO-220AB package is not recommended for Surface Mount Application.
T HIS IS AN IRF 1010
LOT CODE 1789 ASS EMBL E D ON WW 19, 1997 IN THE ASSEMBLY LINE "C"
Note: "P" in assembly line position indicates "Lead-Free"
INT E RN ATIONAL
RE CT IFIE R
LOGO
AS SE MB LY LOT CODE
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
0.55 (. 022)
0.46 (. 018)
PART NU MBER
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
7/04
Page 10
Legal Disclaimer Notice
Vishay
Notice
The products described herein were acquired by Vishay Intertechnology, Inc., as part of its acquisition of International Rectifier’s Power Control Systems (PCS) business, which closed in April 2007. Specifications of the products displayed herein are pending review by Vishay and are subject to the terms and conditions shown below.
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Vishay for any damages resulting from such improper use or sale.
International Rectifier are registered trademarks of International Rectifier Corporation in the U.S. and other countries. All other product names noted herein may be trademarks of their respective owners.
®
, IR®, the IR logo, HEXFET®, HEXSense®, HEXDIP®, DOL®, INTERO®, and POWIRTRAIN
®
Document Number: 99901 www.vishay.com Revision: 12-Mar-07 1
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