Datasheet irfb13n50apbf Datasheet

Page 1
SMPS MOSFET
Document Number: 91095
www.vishay.com
1
PD - 95122
IRFB13N50APbF
HEXFET® Power MOSFET
Applications
l Switch Mode Power Supply (SMPS) l Uninterruptible Power Supply l High Speed Power Switching l Lead-Free
Benefits
l Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage
and Current
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 14 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 9.1 A I
DM
PD @TC = 25°C Power Dissipation 250 W
V
GS
dv/dt Peak Diode Recovery dv/dt 9.2 V/ns T
J
T
STG
Pulsed Drain Current 56
Linear Derating Factor 2.0 W/°C Gate-to-Source Voltage ± 30 V
Operating Junction and -55 to + 150 Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Mounting torqe, 6-32 or M3 screw 10 lbf•in (1.1N•m)
V
DSS
R
DS(on)
max I
500V 0.450 Ω 14A
TO-220AB
D
°C
Avalanche Characteristics
Symbol Parameter Typ. Max. Units
E
AS
I
AR
E
AR
Single Pulse Avalanche Energy ––– 560 mJ Avalanche Current ––– 14 A Repetitive Avalanche Energy ––– 25 mJ
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θCS
R
θJA
Junction-to-Case ––– 0.50 Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W Junction-to-Ambient ––– 62
3/18/04
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IRFB13N50APbF
Document Number: 91095
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2
Static @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
I
DSS
I
GSS
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
g
fs
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff. Effective Output Capacitance ––– 160 ––– VGS = 0V, VDS = 0V to 400V
oss
Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
i
RRM
t
on
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See Fig. 11)
 Starting T
I
AS
I
SD
TJ ≤ 150°C.
Drain-to-Source Breakdown Voltage 500 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.55 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance ––– ––– 0.450 Ω VGS = 10V, ID = 8.4A Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 400V, VGS = 0V, TJ = 125°C Gate-to-Source Forward Leakage ––– ––– 100 VGS = 30V Gate-to-Source Reverse Leakage ––– ––– -100
VDS = 500V, VGS = 0V
µA
nA
VGS = -30V
Forward Transconductance 8.1 ––– ––– S VDS = 50V, ID = 8.4A Total Gate Charge ––– ––– 81 ID = 14A Gate-to-Source Charge ––– ––– 20 nC VDS = 400V Gate-to-Drain ("Miller") Charge ––– ––– 36 VGS = 10V, See Fig. 6 and 13 Turn-On Delay Time ––– 15 ––– VDD = 250V Rise Time ––– 39 ––– ID = 14A Turn-Off Delay Time ––– 39 ––– RG = 7.5Ω
ns
Fall Time ––– 31 ––– VGS = 10V,See Fig. 10 Input Capacitance ––– 1910 ––– VGS = 0V Output Capacitance ––– 290 ––– VDS = 25V Reverse Transfer Capacitance ––– 11 ––– pF ƒ = 1.0MHz, See Fig. 5 Output Capacitance ––– 2730 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz Output Capacitance ––– 82 ––– VGS = 0V, VDS = 400V, ƒ = 1.0MHz
Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode)
––– –––
––– –––
14
56
showing the
A
p-n junction diode. Diode Forward Voltage ––– ––– 1.5 V TJ = 25°C, IS = 14A, VGS = 0V Reverse Recovery Time ––– 370 550 ns TJ = 125°C, IF = 14A Reverse RecoveryCharge ––– 4.4 6.5 µC di/dt = 100A/µs  Reverse RecoveryCurrent ––– 21 31 A Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
C
eff. is a fixed capacitance that gives the same charging time
= 25°C, L = 5.7mH, RG = 25Ω,
J
= 14A, dv/dt = 7.6V/ns. (See Figure 12a)
≤ 14A, di/dt ≤ 250A/µs, V
DD
≤ V
(BR)DSS
,
oss
as C
oss
while V
is rising from 0 to 80% V
DS
DSS.
D
G
S
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IRFB13N50APbF
Document Number: 91095
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3
100
10
1
0.1
D
I , Drain-to-Source Current (A)
0.01
0.1 1 10 100
100
VGS
TOP
15V 10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.5V
V , Drain-to-Source Voltage (V)
DS
4.5V
20µs PULSE WIDTH
°
T = 2 5 C
J
100
10
TOP
BOTTOM
VGS 15V 10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
4.5V
1
D
I , Drain-to-Source Current (A)
20µs PULSE WIDTH
0.1
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
T = 150 C
°
J
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.0
14A
I =
D
T = 150 C
J
10
°
T = 25 C
1
D
I , Drain-to-Source Current (A)
0.1
J
V = 50V
DS
20µs PUL SE WIDT H
4 6 8 10 12 14 16
V , Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
2.5
°
2.0
1.5
(Normalized)
1.0
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
T , Junction Temperature ( C)
J
V =
GS
°
10V
Fig 4. Normalized On-Resistance
vs. Temperature
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IRFB13N50APbF
Document Number: 91095
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100000
10000
) F p
( e
1000
c n a
t
i c a p a
100
C ,
C
10
1
1 10 100 1000
V
= 0V, f = 1 MHZ
GS
C
= C
iss
gs
C
= C
rss
gd
C
= C
ds
+ C
oss
+ Cgd, C
gd
Ciss
Coss
Crss
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
100
SHORTED
ds
12
D
I =
14A
10
7
5
2
GS
V , Gate-to-Source Voltage (V)
0
0 12 24 36 48 60
Q , Total Gate Charge (nC)
G
V = 400V
DS
V = 250V
DS
V = 100V
DS
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
1000
°
T = 150 C
10
1
SD
I , Reverse Drain Current (A)
0.1
0.2 0.5 0.8 1.1 1.4
J
°
T = 25 C
J
V ,Source-to-Drain Voltage (V)
SD
V = 0 V
GS
Fig 7. Typical Source-Drain Diode
Forward Voltage
) A
( t n e
r r
u C e
c r
u o S
­o
t
­n
i a
r D ,
I
100
D
10
1
Tc = 25°C
OPERATION IN THIS AREA LIMITED BY RDS(on)
100µsec
1msec
10msec Tj = 150°C Single Pulse
0.1 10 100 1000 10000
V
, Drain-toSource Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
Page 5
IRFB13N50APbF
Document Number: 91095
www.vishay.com
5
15
12
9
6
D
I , Drain Current (A)
3
0
25 50 75 100 125 150
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current vs.
Case Temperature
1
R
V
DS
V
GS
R
G
D
D.U.T.
10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
10% V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
+
V
DD
-
D = 0.50
thJC
Thermal Response (Z )
0.001
0.20
0.1
0.10
0.05
0.02
0.01
0.01
0.00001 0.0001 0.001 0.01 0.1 1
SINGLE PULSE
(THERMAL RESPONSE)
t , Rectangular Pulse Duration (sec)
1
P
DM
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
J DM thJC C
t
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFB13N50APbF
A
Document Number: 91095
www.vishay.com
6
1150
TOP
920
690
460
230
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150
Starting Tj, Junction Temperature ( C)
BOTTOM
°
Fig 12a. Maximum Avalanche Energy
vs. Drain Current
I
D
6.3A
8.9A 14A
15V
DRIVER
+
-
V
R
G
20V
V
DS
t
L
D.U.T
I
AS
Ω
0.01
p
Fig 12c. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
DD
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
I
D
Fig 13a. Gate Charge Test Circuit
I
AS
Fig 12d. Unclamped Inductive Waveforms
Q
G
V
GS
+
V
DS
-
Q
GS
V
G
Q
GD
Charge
Fig 13b. Basic Gate Charge Waveform
Page 7
IRFB13N50APbF
Document Number: 91095
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7
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance Current Transformer
-
-
• dv/dt controlled by R
• Driver same type as D.U.T.
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
P. W .
Period
+
+
V
DD
-
VGS=10V
*
Reverse Recovery Current
Re-Applied Voltage
D.U.T. ISDWaveform
Body Diode Forward
Current
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
* V
= 5V for Logic Level Devices
GS
di/dt
Diode Recovery
dv/dt
V
DD
I
SD
Fig 14. For N-Channel HEXFET® Power MOSFETs
Page 8
IRFB13N50APbF
Document Number: 91095
www.vishay.com
8
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
2.87 (. 113)
2.62 (. 103)
15.24 (.600)
14.84 (.584)
14.09 (. 555)
13.47 (. 530)
10.29 (.405)
4
1 2 3
6.47 (.255)
6.10 (.240)
1.15 (.0 45) MIN
4.06 ( .160)
3.55 ( .140)
3.78 (.1 49)
3.54 (.1 39)
- A -
4.69 (.1 85)
4.20 (.1 65)
- B -
1.32 (.052)
1.22 (.048)
HEXFET
1- GATE 2- DRAIN 3- S OURCE 4- DRAIN
LEAD ASSI GNMENTS
LEAD ASSIGNMENTS 1 - GAT E 2 - DRA IN 3 - SOU RCE 4 - DRA IN
IGBTs, C oPACK
1- GATE 2- COLLECTOR 3- EMITTER 4- COLLECTOR
0.93 (. 037)
3X
1.40 (.055)
3X
1.15 (.045)
2.54 (.1 00)
NOTES:
1 DIMENSION ING & TOLER ANC ING PER AN SI Y14.5M, 19 82. 3 OUTL INE CONFO RMS TO JEDE C OUTLINE TO-2 20AB. 2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
2X
0.69 (. 027)
0.36 (.014) M B A M
0.55 (. 022)
3X
0.46 (. 018)
2.92 (. 115)
2.64 (. 104)
TO-220AB Part Marking Information
EXAMPLE:
T HIS IS AN IRF 1010
LOT CODE 1789 ASS EMBL E D ON WW 19, 1997 IN THE ASSEMBLY LINE "C"
Note: "P" in assembly line position indicates "Lead-Free"
This product has been designed and qualified for the Industrial market.
INT E R NATIONAL
RECTIF IER
LOGO
ASSEMBLY LOT CODE
Data and specifications subject to change without notice.
Qualification Standards can be found on IR’s Web site.
PART NU MBER
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
03/04
Page 9
Legal Disclaimer Notice
Vishay
Notice
The products described herein were acquired by Vishay Intertechnology, Inc., as part of its acquisition of International Rectifier’s Power Control Systems (PCS) business, which closed in April 2007. Specifications of the products displayed herein are pending review by Vishay and are subject to the terms and conditions shown below.
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
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®
, IR®, the IR logo, HEXFET®, HEXSense®, HEXDIP®, DOL®, INTERO®, and POWIRTRAIN
®
Document Number: 99901 www.vishay.com Revision: 12-Mar-07 1
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