Datasheet IRF9520NSPBF Specification

Page 1
PD -91522A
IRF9520NS/L
HEXFET® Power MOSFET
l Advanced Process Technology l Surface Mount (IRF9520S) l Low-profile through-hole (IRF9520L) l 175°C Operating Temperature l Fast Switching l P-Channel l Fully Avalanche Rated
G
D
V
DS(on)
= -100V
DSS
= 0.48Ω
ID = -6.8A
S
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.
2
Pak is a surface mount power package capable of
The D accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D
2
Pak is suitable
2
D Pak
TO-262
for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRF9520L) is available for low­profile applications.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ -10V -6.8 ID @ TC = 100°C Continuous Drain Current, VGS @ -10V -4.8 A I
DM
PD @TA = 25°C Power Dissipation 3.8 W PD @TC = 25°C Power Dissipation 48 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt  -5.0 V/ns T
J
T
STG
Pulsed Drain Current  -27
Linear Derating Factor 0.32 W/°C Gate-to-Source Voltage ± 20 V Single Pulse Avalanche Energy 140 mJ Avalanche Current -4.0 A Repetitive Avalanche Energy 4.8 mJ
Operating Junction and -55 to + 175 Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
Junction-to-Case ––– 3.1 Junction-to-Ambient ( PCB Mounted,steady-state)** –– – 40
°C/W
°C
5/13/98
Page 2
IRF9520NS/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
S
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage -100 ––– ––– V VGS = 0V, ID = -250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– -0.10 ––– V/°C Reference to 25°C, ID = -1mA
J
Static Drain-to-Source On-Resistance ––– ––– 0.48 Ω VGS = 10V, ID = -4.0A Gate Threshold Voltage -2.0 ––– -4.0 V VDS = VGS, ID = -250µA Forward Transconductance 1.4 ––– ––– S VDS = -50V, ID = -4.0A
Drain-to-Source Leakage Current
––– ––– -25
––– ––– -250 VDS = -80V, VGS = 0V, TJ = 150°C Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V Gate-to-Source Reverse Leakage ––– ––– -100
VDS = -100V, VGS = 0V
µA
nA
VGS = -20V Total Gate Charge ––– ––– 27 ID = -4.0A Gate-to-Source Charge ––– ––– 5.0 nC VDS = -80V Gate-to-Drain ("Miller") Charge ––– ––– 15 VGS = -10V, See Fig. 6 and 13  Turn-On Delay Time ––– 14 ––– VDD = -50V Rise Time ––– 47 ––– ID = -4.0A Turn-Off Delay Time ––– 28 –– – RG = 22Ω
ns
Fall Time ––– 31 ––– RD = 12Ω, See Fig. 10  Internal Source Inductance
––– –––
7.5
Between lead,
nH
and center of die contact Input Capacitance ––– 350 ––– VGS = 0V Output Capacitance ––– 1 10 ––– pF VDS = -25V Reverse Transfer Capacitance ––– 70 ––– ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting T
RG = 25Ω, I
I
SD
TJ ≤ 175°C
** When mounted on 1" square PCB (FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994.
Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode)
––– –––
––– –––
-6.8
-27
showing the
A
p-n junction diode. Diode Forward Voltage ––– ––– -1.6 V TJ = 25°C, IS = -4.0A, VGS = 0V Reverse Recovery Time ––– 100 150 n s TJ = 25°C, IF = -4.0A Reverse Recovery Charge ___ 420 630 nC di/dt = -100A/µs Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Pulse width ≤ 300µs; duty cycle ≤ 2%
= 25°C, L = 18mH
J
= -4.0A. (See Figure 12)
AS
≤ -4.0A, di/dt ≤ -300A/µs, V
DD
≤ V
(BR)DSS
Uses IRF9520N data and test conditions
,
D
G
S
Page 3
IRF9520NS/L
100
10
1
D
-I , Drain-to-Source Current (A)
0.1
0.1 1 10 100
VGS
TOP
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
BOTTOM
-4.5V
-4.5V
20µs PULSE WIDTH T = 25 C
J
-V , Drain-to-Source Voltage (V)
DS
°
Fig 1. Typical Output Characteristics,
100
100
10
1
D
-I , Drain-to-Source Current (A)
0.1
0.1 1 10 100
VGS
TOP
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
BOTTOM
-4.5V
-4.5V
20µs PULSE WIDTH T = 175 C
J
-V , Drain-to-Source Voltage (V)
DS
°
Fig 2. Typical Output Characteristics,
2.5
I =
D
-6.7A
°
T = 175 C
J
10
T = 25 C
J
1
D
-I , Drain-to-Source Current (A)
V = 10V
DS
0.1 4 5 6 7 8 9 10
-V , Gate-to-Source Voltage (V)
GS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
2.0
°
1.5
1.0
(Normalized)
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature ( C)
J
V =
GS
°
-10V
Fig 4. Normalized On-Resistance
Vs. Temperature
Page 4
IRF9520NS/L
gsg
800
600
400
C, Capacitance (pF)
200
0
1 10 100
V
=
0V,
GS
C
=
iss
C
=
rssgd
C
=
oss dsgd
C
iss
C
oss
C
rss
-V , Drain-to-Source Voltage (V)
DS
f = 1MHz
C
+ C
C SHORTED C C
d , ds
+ C
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
°
T = 175 C
J
10
20
I =
-4.0 A
GS
D
16
12
8
4
V =-80V
DS
V =-50V
DS
V =-20V
DS
-V , Gate-to-Source Voltage (V)
FOR TEST CIRCUIT
0
0 5 10 15 20 25
Q , Total Gate Charge (nC)
G
SEE FIGURE
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
OPERATION IN THIS AREA LIMITED
10
BY R
DS(on)
10us
100us
13
°
T = 25 C
J
1
SD
-I , Reverse Drain Current (A)
V = 0 V
0.1
0.2 0.8 1.4 2.0 2.6
-V ,Source-to-Drain Voltage (V)
SD
GS
Fig 7. Typical Source-Drain Diode
1
D
-I , Drain Current (A)I , Drain Current (A)
°
= 25 C
C
T T= 175 C Single Pulse
0.1 1 10 100 1000
°
J
-V , Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
1ms
10ms
Forward Voltage
Page 5
8.0
6.0
4.0
D
-I , Drain Current (A)
2.0
0.0 25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
IRF9520NS/L
R
D.U.T.
D
t
d(off)tf
-
+
V
DS
V
GS
R
G
-10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
t
d(on)tr
V
GS
10%
90% V
DS
V
DD
Fig 9. Maximum Drain Current Vs.
Fig 10b. Switching Time Waveforms
Case Temperature
10
D = 0.50
thJC
1
0.20
0.10
0.05 P
1 2
DM
t
1
t
2
0.1
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
Thermal Response (Z )
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
0.01
0.00001 0.0001 0.001 0.01 0.1 1
t , Rectangular Pulse Duration (sec)
1
J DM thJC C
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Page 6
IRF9520NS/L
(BR)
L
D.U.T
I
AS
0.01
p
DRIVER
Ω
15V
V
DD
R
-20V
V
DS
G
t
Fig 12a. Unclamped Inductive Test Circuit
I
AS
t
p
V
DSS
400
TOP
I
D
-1.7A
-2.8A
A
300
200
100
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting T , Junction Temperature ( C)
J
BOTTOM
-4.0A
°
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Q
G
-10V
Q
GS
V
G
Q
GD
Charge
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T .
-3mA
I
G
Current Sampling Resistors
I
­V
DS
+
D
Fig 13b. Gate Charge Test CircuitFig 13a. Basic Gate Charge Waveform
Page 7
IRF9520NS/L
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
-
R
G
V
GS
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance Current Transformer
-
-
• dv/dt controlled by R
• ISD controlled by Duty Factor "D"
+
G
• D.U.T. - Device Under Test
P.W.
D =
Period
+
V
DD
-
VGS=10V
[ ] ***
Reverse Recovery Current
Re-Applied Voltage
D.U.T. ISDWaveform
Body Diode Forward
Current
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
*** V
= 5.0V for Logic Level and 3V Drive Devices
GS
Diode Recovery
di/dt
dv/dt
Fig 14. For P-Channel HEXFETS
V
[ ]
DD
I
[ ]
SD
Page 8
IRF9520NS/L
A
D2Pak Package Outline
10.54 (.415)
1.40 (.055) MAX.
1.78 (.070)
1.27 (.050)
1.40 (.055)
3X
1.14 (.045)
5.08 (.200)
NOTE S: 1 DIMENSIONS AFTER SOLDER DIP. 2 DIMENSIONING & TOLERANCING PER ANSI Y14.5M , 1982. 3 CONTROLLING DIMENSION : INCH. 4 HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.
10.29 (.405)
- A ­2
1 3
15.49 (.610)
14.73 (.580)
0.93 (.037)
3X
0.69 (.027)
0.2 5 ( .0 10 ) M B A M
Part Marking Information
D2Pak
4.69 (.185)
4.20 (.165)
5.28 (.208)
4.78 (.188)
0.55 (.022)
0.46 (.018)
- B -
1.32 (.052)
1.22 (.048)
2.79 (.110)
2.29 (.090)
1.39 (.055)
1.14 (.045)
LEAD ASSIGNMENTS 1 - G ATE 2 - D RA IN 3 - S OURCE
10.16 (.400) REF .
6.47 (.255)
6.18 (.243)
2.61 (.103)
2.32 (.091)
8.89 (.350) REF .
MINIMUM RECOMMENDED FOOTPRINT
11.43 (.450)
8.89 (.350)
17.78 (.700)
3.81 (.150)
2.08 (.082) 2X
2.54 (.100) 2X
INTERNATIONAL RE CTIFIE R LO G O
A S SEMBLY LO T CO D E
F530S
9246
9 B 1M
PART NUM B ER
DATE CODE (YYW W) YY = YEAR WW = WEEK
Page 9
Package Outline
TO-262 Outline
IRF9520NS/L
Part Marking Information
TO-262
Page 10
IRF9520NS/L
Tape & Reel Information
D2Pak
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
1.60 (.063)
1.50 (.059)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
1.85 (.073)
1.65 (.065)
TRL
10.90 (.429)
10.70 (.421)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
330.00 (14.173) MAX.
NOTES :
1. COMF O R M S T O EIA-418.
2. CONTR O LLING D IM ENS IO N : MIL LIMET ER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
11.60 (.457)
11.40 (.449)
1.75 (.069)
1.25 (.049)
16.10 (.634)
15.90 (.626)
15.42 (.609)
15.22 (.601)
27.40 (1.079)
23.90 (.941)
4
26.40 (1.039)
24.40 (.961)
3
24.30 (.957)
23.90 (.941)
4.72 (.136)
4.52 (.178)
60.00 (2.362) MIN .
30.40 (1.197) MAX .
4
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
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http://www.irf.com/ Data and specifications subject to change without notice. 5/98
Page 11
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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