Datasheet IRF9242, IRF9241, IRF9240, IRF9243 Datasheet (Intersil)

IRF9240

Data Sheet February 1999

-11A, -200V, 0.500 Ohm, P-Channel Power
MOSFET

This P-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanchemodeofoperation.Allof
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.

Formerly developmental type TA17522.

Ordering Information

PART NUMBER PACKAGE BRAND

IRF9240 TO-204AA IRF9240

NOTE: When ordering, use the entire part number.

File Number

Features

• -11A, -200V

•r

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Related Literature

- TB334, “Guidelines for Soldering Surface Mount

= 0.500Ω

DS(ON)

Components to PC Boards”

Symbol

D

G

2279.2

Packaging

DRAIN
(FLANGE)

JEDEC TO-204AA

GATE (PIN 1)

S

SOURCE (PIN 2)

5-26

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

IRF9240

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

IRF9240 UNITS

Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DGR

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

TC= 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P

DS

D
D

DM

GS

D

-200 V

-200 V

-11

-7

-44 A
±20 V
125 W

A
A

Linear Derating Factor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W/oC

Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ,T

AS

STG

aximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

790 mJ

-55 to 150

300
260

o

C

o

C

o

C

NOTE:

1. TJ = 25oC to TJ = 125oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate Threshold Voltage V
Zero Gate Voltage Drain Current I

On-State Drain Current (Note 2) I

DSSID

GS(TH)VGS

DSS

D(ON)

= -250µA, VGS = 0V, (Figure10) -200 - - V

= VDS, ID = -250µA -2 - -4 V
VDS = Rated BV
VDS = 0.8 x Rated BV
VDS > I

D(ON)

, VGS = 0V - - -25 µA

DSS

, VGS = 0V, TC = 125oC - - -250 µA

DSS

x r

DS(ON)MAX

, VGS = -10V,

-11 - - A

(Figure 7)

Gate to Source Leakage Current I
On Resistance (Note 2) r

DS(ON)ID

Forward Transconductance (Note 2) g
Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t

GSS

VGS = ±20V - - ±100 nA

= -6A, VGS = -10V, (Figures 8, 9) - 0.35 0.500 Ω

VDS > I

fs

VDD = 1.00 x Rated BV
RG = 9.1Ω, VGS= 10V, (Figure 17, 18)

r

RL = 17.5Ω for BV
RL = 9.6Ω for BV
MOSFET Switching Times are Essentially

f

D(ON)

x r

DS(ON)MAX

DSS

DSS

, ID = -6A, (Figure 12) 4 6 - S

DSS

= 150V

= 200V

, ID≈ 11A,

-1822ns

-4568ns

-7590ns

-2944ns

Independent of Operating Temperature

Total Gate Charge
(Gate to Source + Gate to Drain)

Gate to Source Charge Q
Gate to Drain “Miller” Charge Q
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Internal Drain Inductance L

Internal Source Inductance L

Thermal Resistance Junction to Case R
Thermal Resistance Junction to

Q

g(TOT)VGS

gs
gd

ISS
OSS
RSS

D

S

θJC

R

θJA

= -10V, ID = -11A, VDS = 0.8 x Rated BV

DSS,

-7090nC
(Figures 14, 19, 20))
Gate Charge is Essentially Independent of
Operating Temperature

-55-nC

-15-nC
VDS = -25V, VGS = 0V, f = 1MHz, (Figure 11) - 1100 - pF

- 375 - pF

- 150 - pF
Measured Between the

Contact Screw on the
Flange that is Closer to
Source and Gate Pins and
the Center of Die

MeasuredFrom theSource
Lead, 6mm (0.25in) From
the Flange and the Source
Bonding Pad

Modified MOSFET
Symbol Showing the In­ternal Devices
Inductances

D

L

D

G

L

S

S

- 5.0 - nH

- 12.5 - nH

--1oC/W
Typical Socket Mount - - 62.5oC/W

Ambient

5-27

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current I
Pulse Source to Drain Current (Note 3) I

SD

SDM

IRF9240

Modified MOSFET Symbol
Showing the Integral
Reverse P-N Junction
Diode

D

- - -11 A

- - -44 A

G

S

Source to Drain Diode Voltage (Note 2) V
Reverse Recovery Time t
Reverse Recovery Charge Q

TC = 25oC, ISD = -11A, VGS = 0V, (Figure13) - - -1.5 V

SD

TJ = 150oC, ISD = -11A, dISD/dt = 100A/µs - 270 - ns

rr

TJ = 150oC, ISD = -11A, dISD/dt = 100A/µs-2-µC

RR

NOTES:

2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD= 50V, starting TJ= 25oC, L = 9.8mH, RG= 25Ω, peak IAS= 11A (Figures 15, 16).

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0.0
0 25 50 75 100 150

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TA, CASE TEMPERATURE (oC)

TEMPERATURE

Unless Otherwise Specified

125

-15

-10

-5

, DRAIN CURRENT (A)

D

I

0

050

TC, CASE TEMPERATURE (oC)

100

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

150

1

0.5

0.2

0.1

0.1

0.05

0.02

THERMAL IMPEDANCE

0.01
10

-5

0.01

SINGLE PULSE

, NORMALIZED TRANSIENT

θJC

Z

5-28

NOTES:
DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-4

10

-3

10

t1, RECTANGULAR PULSE DURATION (s)

-2

10

-1

10

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

P

DM

t

1

t

2

1/t2

x R

θJC

+ T

C

10

θJC

1

IRF9240

Typical Performance Curves

-100

-10

OPERATION IN THIS

-1

, DRAIN CURRENT (A)

D

I

T

= 25oC

C

= MAX RATED

T

J

SINGLE PULSE

-0.1

AREA IS LIMITED
BY r

DS(ON)

-10-1

VDS, DRAIN TO SOURCE VOLTAGE (V)

Unless Otherwise Specified (Continued)

10µs

100µs
1ms

10ms
100ms

DC

-100

-1000

-50
VGS = -11V

-40

-30

-20

, DRAIN CURRENT (A)

D

I

-10

0 -10 -20 -30 -40

, DRAIN TO SOURCE VOLTAGE (V)

V

DS

VGS = -10V

VGS = -9V

VGS = -8V

VGS = -7V

VGS = -6V

VGS = -5V

80µs PULSE TEST

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

-20

80µs PULSE TEST

-16

-12

-8

, DRAIN CURRENT (A)

D

I

-4

0

0

-2
VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = -10V

VGS = -9V

-4 -6 -10

VGS = -8V
VGS = -7V

VGS = -6V

VGS = -5V

VGS = -4V

-8

100

80µs PULSE TEST
VDS≥ I

-10

-1.0

, ON-STATE DRAIN CURRENT (A)

D(ON)

I

-0.1
0

x r

D(ON)

VGS, GATE TO SOURCE VOLTAGE (V)

DS(ON)MAX

-4 -6 -8 -10-2

VGS = -4V

-50

125oC

25oC

-55oC

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

5µs PULSE TEST

0.8

0.7

0.6

0.5

0.4

0.3

0.2

DRAIN TO SOURCE ON RESISTANCE (Ω)

0

0

VGS= -10V

-15

-30

ID, DRAIN CURRENT (A)

VGS= -20V

-45 -60

NOTE: Heating effect of 5µs pulse is minimal.

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT

5-29

-75

2.5
VGS = -10V, ID = -11A

2.0

1.5

1.0

ON RESISTANCE

0.5

NORMALIZED DRAIN TO SOURCE

0

-40 0 40
T

J

, JUNCTION TEMPERATURE (oC)

80

FIGURE 9. NORMALIZED DRAIN TO SOURCE

ON RESISTANCE vs JUNCTION TEMPERATURE

120

160

IRF9240

Typical Performance Curves

1.15
ID= 250µA

1.10

1.05

1.00

0.95

BREAKDOWN VOLTAGE

0.90

NORMALIZED DRAIN TO SOURCE

0.85

-80 -40 0 40
, JUNCTION TEMPERATURE (oC)

T

J

Unless Otherwise Specified (Continued)

80 120 160

FIGURE 10. NORMALIZED DRAIN TOSOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

10

80µs PULSE TEST

8

6

4

, TRANSCONDUCTANCE (S)

2

fs

g

0

0 -10 -20 -30 -40

TJ = -55oC

TJ = 25oC
TJ = 125oC

I

, DRAIN CURRENT (A)

D

-50

2000

1600

1200

800

C, CAPACITANCE (pF)

400

0

0

10

V

DS

20

, DRAIN TO SOURCE VOLTAGE (V)

VGS= 0V, f = 1MHz
C

= CGS + C

ISS

C

= C

RSS

C

≈ CDS+ C

OSS

C

ISS

C

OSS

C

RSS

30 40

GD

GD

GD

FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

-100

TJ = 150oC

-10

TJ = 25oC

-1.0

, SOURCE TO DRAIN CURRENT (A)

SD

I

-0.1

-0.4

-0.8 -1.4

VSD, SOURCE TO DRAIN VOLTAGE (V)

-1.0 -1.2 -1.6 -1.8-0.6

50

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

0

-5

VDS = -40V

V

= -100V

DS

, GATE TO SOURCE (V)

-10

GS

V

020406080

VDS = -160V

Q

, TOTAL GATE CHARGE (nC)

g(TOT)

ID = -11A
FOR TEST CIRCUIT

SEE FIGURES 19, 20

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

5-30

IRF9240

Test Circuits and Waveforms

V

DS

VARY t

TO OBTAIN

P

REQUIRED PEAK I

0V

V

GS

t

P

AS

L

R

G

-

V

DD

+

DUT

I

AS

0.01Ω

0

V

DD

I

AS

t

P

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

BV

t

AV

DSS

V

DS

t

ON

t

d(ON)

t

R

L

DUT

R

V

GS

G

-

V

DD

+

0

V

DS

V

GS

0

10%

r

10%

90%

50%

PULSE WIDTH

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

-V

DS

D

(ISOLATED
SUPPLY)

DUT

0

V

DS

Q

gs

Q

gd

12V

BATTERY

0.2µF

50kΩ

CURRENT

REGULATOR

0.3µF

t

d(OFF)

V

GS

t

OFF

50%

90%

90%

t

f

10%

Q

g(TOT)

S

CURRENT

I

D

SAMPLING

DUT

+V

DS

V

DD

0

I

G(REF)

G

0

I

G(REF)

IG CURRENT

SAMPLING

RESISTOR RESISTOR

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

5-31

IRF9240

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Intersil semiconductor products are sold by description only.Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly , the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

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