Page 1
PD- 95139
Document Number: 91062
www.vishay.com
1
SMPS MOSFET
IRF830AS/LPbF
HEXFET® Power MOSFET
Applications
l Switch Mode Power Supply (SMPS)
l Uninterruptable Power Supply
l High Speed Power Switching
l Lead-Free
Benefits
l Low Gate Charge Qg Results in Simple
Drive Requirement
l Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche Voltage and Current
l Effective Coss specified (See AN 1001)
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 5.0
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 3.2 A
I
DM
PD @TA = 25°C Power Dissipation 3.1 W
PD @TC = 25°C Power Dissipation 74
V
GS
dv/dt Peak Diode Recovery dv/dt 5.3 V/ns
T
J
T
STG
Pulsed Drain Current 20
Linear Derating Factor 0.59 W/°C
Gate-to-Source Voltage ± 30 V
Operating Junction and -55 to + 150
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
V
DSS
R
DS(on)
max I
500V 1.40Ω 5.0A
D2Pak TO-262
D
°C
Typical SMPS Topologies:
l Two Transistor Forward
l Half Bridge and Full Bridge
Notes through are on page 10
04/21/04
Page 2
IRF830AS/LPbF
Document Number: 91062
www.vishay.com
2
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
I
DSS
I
GSS
Dynamic @ TJ = 25°C (unless otherwise specified)
g
fs
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff. Effective Output Capacitance ––– 39 ––– VGS = 0V, VDS = 0V to 400V
oss
Avalanche Characteristics
E
AS
I
AR
E
AR
Thermal Resistance
R
θJC
R
θJA
Diode Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Drain-to-Source Breakdown Voltage 500 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient
J
––– 0.60 ––– V/°C Reference to 25°C, ID = 1mA
Static Drain-to-Source On-Resistance ––– ––– 1.4 Ω VGS = 10V, ID = 3.0A
Gate Threshold Voltage 2.0 ––– 4.5 V VDS = VGS, ID = 250µA
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 400V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage ––– ––– 100 V
Gate-to-Source Reverse Leakage ––– ––– -100
VDS = 500V, VGS = 0V
µA
= 30V
GS
nA
V
= -30V
GS
Parameter Min. Typ. Max. Units Conditions
Forward Transconductance 2.8 ––– ––– S VDS = 50V, ID = 3.0A
Total Gate Charge ––– ––– 24 ID = 5.0A
Gate-to-Source Charge ––– ––– 6.3 nC VDS = 400V
Gate-to-Drain ("Miller") Charge ––– ––– 11 VGS = 10V, See Fig. 6 and 13
Turn-On Delay Time ––– 10 ––– VDD = 250V
Rise Time ––– 21 ––– ID = 5.0A
Turn-Off Delay Time ––– 21 ––– RG = 14Ω
ns
Fall Time ––– 15 ––– RD = 49Ω,See Fig. 10
Input Capacitance ––– 620 ––– VGS = 0V
Output Capacitance ––– 93 ––– VDS = 25V
Reverse Transfer Capacitance ––– 4.3 ––– pF ƒ = 1.0MHz, See Fig. 5
Output Capacitance ––– 886 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Output Capacitance ––– 27 ––– VGS = 0V, VDS = 400V, ƒ = 1.0MHz
Parameter Typ. Max. Units
Single Pulse Avalanche Energy ––– 230 mJ
Avalanche Current ––– 5.0 A
Repetitive Avalanche Energy ––– 7.4 mJ
Parameter Typ. Max. Units
Junction-to-Case ––– 1.7 °C/W
Junction-to-Ambient ( PCB Mounted, steady-state)* ––– 40
Parameter Min. Typ. Max. Units Conditions
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
Diode Forward Voltage ––– ––– 1.5 V TJ = 25°C, IS = 5.0A, VGS = 0V
Reverse Recovery Time ––– 430 650 ns TJ = 25°C, IF = 5.0A
Reverse RecoveryCharge ––– 2.0 3.0 µC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
5.0
20
showing the
A
p-n junction diode.
D
G
S
Page 3
IRF830AS/LPbF
Document Number: 91062
www.vishay.com
3
100
10
1
0.1
D
I , Drain-to-Source Current (A)
0.01
0.1 1 10 100
100
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.5V
4.5V
20µs PULSE WIDTH
T = 25 C
J
V , Drain-to-Source Voltage (V)
DS
°
100
10
1
D
I , Drain-to-Source Current (A)
0.1
1 10 100
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.5V
4.5V
20µs PULSE WIDTH
T = 150 C
V , Drain-to-Source Voltage (V)
DS
°
J
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
2.5
5.0A
I =
D
10
°
T = 150 C
J
°
T = 25 C
1
D
I , Drain-to-Source Current (A)
0.1
4.0 5.0 6.0 7.0 8.0
V , Gate-to-Source Voltage (V)
GS
J
V = 50V
DS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
2.0
1.5
1.0
(Normalized)
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
T , Junction Temperature ( C)
J
Fig 4. Normalized On-Resistance
Vs. Temperature
V =
10V
GS
°
Page 4
IRF830AS/LPbF
)
,
g
g
g
Document Number: 91062
www.vishay.com
4
10000
1000
100
V = 0V, f = 1M Hz
GS
C = C + C
iss
C = C
C = C + C
s gd ds
d
rs s
oss ds
C S H O RTED
d
C
iss
C
oss
C, Capacitance (pF)
10
C
rss
1
1 10 100 1000
V , Drain-to-Source Voltage (V
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
20
I =
5.0A
D
16
12
8
4
GS
V , Gate-to-Source Voltage (V)
A
0
0 4 8 12 16 20 24
Q , Total Gate Charge (nC)
G
V = 400V
DS
V = 250V
DS
V = 100V
DS
FOR TEST CIRCUIT
SEE FIGURE
13
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10
°
T = 150 C
J
1
°
T = 25 C
J
SD
I , Reverse Drain Current (A)
V = 0 V
0.1
0.2 0.4 0.6 0.8 1.0 1.2
V ,Source-to-Drain Voltage (V)
SD
GS
Fig 7. Typical Source-Drain Diode
Forward Voltage
10us
10
100us
1
D
I , Drain Current (A)I , Drain Current (A)
°
= 25 C
C
T T= 150 C
Single Pulse
0.1
10 100 1000 10000
°
J
V , Drain-to-Source Voltage (V)
DS
1ms
10ms
Fig 8. Maximum Safe Operating Area
Page 5
5.0
Document Number: 91062
www.vishay.com
5
4.0
3.0
2.0
D
I , Drain Current (A)
1.0
0.0
25 50 75 100 125 150
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
IRF830AS/LPbF
R
D.U.T.
t
d(off)tf
D
V
DS
V
GS
R
G
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
Fig 10b. Switching Time Waveforms
+
V
DD
-
10
thJC
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
Thermal Response (Z )
0.01
0.01
0.00001 0.0001 0.001 0.01 0.1 1
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
t , Rectangular Pulse Duration (sec)
1
J DM thJC C
P
DM
t
1 2
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Page 6
IRF830AS/LPbF
A
Document Number: 91062
www.vishay.com
6
15V
DRIVER
+
-
V
R
20V
V
DS
G
t
L
D.U.T
I
AS
0.01
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
Q
GD
DD
500
TOP
400
300
200
100
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150
Starting T , Junction Temperature ( C)
J
BOTTOM
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
790
I
D
2.2A
3.2A
5.0A
°
V
G
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
+
V
DS
-
I
D
Fig 13b. Gate Charge Test Circuit
785
780
775
DSav
V , Avalanche Voltage (V)
770
0.0 1.0 2.0 3.0 4.0 5.0
I , Avalanche Current (A)
av
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
A
Page 7
IRF830AS/LPbF
Document Number: 91062
www.vishay.com
7
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
+
-
-
+
R
G
Driver Gate Drive
P.W.
• dv/dt controlled by R
• Driver same type as D.U.T.
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
P. W .
Period
+
-
VGS=10V
V
DD
*
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. ISDWaveform
Body Diode Forward
Current
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
* V
= 5V for Logic Level Devices
GS
di/dt
Diode Recovery
dv/dt
Fig 14. For N-Channel HEXFET® Power MOSFET
V
DD
I
SD
Page 8
IRF830AS/LPbF
Document Number: 91062
www.vishay.com
8
2
Pak Package Outline
D
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information (Lead-Free)
T HI S IS AN IR F 530 S WIT H
LOT CODE 8024
ASS EMB LE D ON WW 02, 2000
IN THE AS SEMBLY LINE "L"
Note: "P " in as sembly line
pos ition i ndicates "L ead-F ree"
INT ER NAT IONAL
R ECT IFIE R
LOGO
AS S E MB LY
LOT CODE
OR
INT E R NATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
F530S
PART NUMBER
DATE COD E
P = D E SI GNAT E S LE AD- F RE E
PRODUCT (OPTIONAL)
YEAR 0 = 2000
WEEK 02
A = ASSEMBLY SITE CODE
F530S
PART NUMB ER
DAT E CODE
YE AR 0 = 200 0
WEE K 02
LINE L
Page 9
TO-262 Package Outline
Document Number: 91062
www.vishay.com
9
Dimensions are shown in millimeters (inches)
IRF830AS/LPbF
TO-262 Part Marking Information
EXAMPLE:
T H IS IS AN IR L31 03L
LOT CODE 1789
ASS EMB L E D ON WW 19, 1997
IN THE ASSE MBLY LINE "C"
Note: "P " in as s embly line
pos it i on in dicates "L ead-F ree"
OR
INT ER NATION AL
R E CT IFIE R
INT ER NATION AL
R E CT IFIE R
AS S EMB L Y
LOT CODE
LOGO
AS S EMB L Y
LOT CODE
LOGO
PART NU MBER
DATE CODE
YE AR 7 = 1997
WE E K 19
LINE C
PART NU MBER
DATE CODE
P = D ES IGN AT E S LE AD-F RE E
PRODUCT (OPTIONAL)
YE AR 7 = 1997
WE E K 19
A = AS S E MB LY S IT E COD E
Page 10
IRF830AS/LPbF
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Document Number: 91062
www.vishay.com
10
D2Pak Tape & Reel Information
TRR
1.60 (.063
1.50 (.059
4.10 (.161
3.90 (.153
FEED DIRECTION
TRL
FEED DIRECT ION
1.85 (.0 73
1.65 (.0 65
10.90 (.429
10.70 (.421
11.60 (.457
11.40 (.449
16.10 (.634
15.90 (.626
1.60 (.06 3
1.50 (.05 9
1.75 (.069
1.25 (.049
15.42 (.609
15.22 (.601
0.368 (.0145
0.342 (.0135
24.30 (.957
23.90 (.941
4.72 (.1 36
4.52 (.1 78
13.50 (.532
12.80 (.504
330.00
14.173
MAX.
NOTES :
1. COMF OR M S TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIM ENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTIO N @ OUTER EDGE.
27.40
1.079
23.90 (.94 1
4
26.40
1.039
24.40 (.961
3
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
Starting T
RG = 25Ω, I
I
SD
= 25°C, L = 18mH
J
= 5.0A. (See Figure 12)
AS
≤ 5.0A, di/dt ≤ 370A/µs, V
DD
≤ V
(BR)DSS
C
eff. is a fixed capacitance that gives the same charging time
oss
as C
,
Uses IRF830A data and test conditions
oss
while V
is rising from 0 to 80% V
DS
TJ ≤ 150°C
* When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
60.00 (2.362
MIN.
30.40
MAX.
4
1.197
DSS
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
04/04
Page 11
Legal Disclaimer Notice
Vishay
Notice
The products described herein were acquired by Vishay Intertechnology, Inc., as part of its acquisition of
International Rectifier’s Power Control Systems (PCS) business, which closed in April 2007. Specifications of the
products displayed herein are pending review by Vishay and are subject to the terms and conditions shown below.
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or
anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.
International Rectifier
are registered trademarks of International Rectifier Corporation in the U.S. and other countries. All other product
names noted herein may be trademarks of their respective owners.
®
, IR®, the IR logo, HEXFET®, HEXSense®, HEXDIP®, DOL®, INTERO®, and POWIRTRAIN
®
Document Number: 99901 www.vishay.com
Revision: 12-Mar-07 1
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