Datasheet irf830apbf Datasheet

Page 1
TO-220AB
PD- 94820
Document Number: 91061
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1
SMPS MOSFET
IRF830APbF
HEXFET® Power MOSFET
Applications
Switch Mode Power Supply ( SMPS )Uninterruptable Power SupplyHigh speed power switchingLead-Free
Benefits
Low Gate Charge Qg results in Simple
Drive Requirement
Improved Gate, Avalanche and dynamic
dv/dt Ruggedness
Fully Characterized Capacitance and
Avalanche Voltage and Current
Effective Coss specified ( See AN 1001)
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 5.0 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 3.2 A I
DM
PD @TC = 25°C Power Dissipation 74 W
V
GS
dv/dt Peak Diode Recovery dv/dt 5.3 V/ns T
J
T
STG
Pulsed Drain Current 20
Linear Derating Factor 0.59 W/°C Gate-to-Source Voltage ± 30 V
Operating Junction and -55 to + 150 Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Mounting torqe, 6-32 or M3 screw 10 lbf•in (1.1N•m)
V
DSS
Rds(on) max I
500V 1.40Ω 5.0A
SDG
°C
D
Typical SMPS Topologies:
Two transistor ForwardHalf Bridge and Full Bridge
Notes through are on page 8
11/5/03
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IRF830APbF
Document Number: 91061
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2
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
I
DSS
I
GSS
Dynamic @ TJ = 25°C (unless otherwise specified)
g
fs
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff. Effective Output Capacitance ––– 39 ––– VGS = 0V, VDS = 0V to 400V
oss
Avalanche Characteristics
E
AS
I
AR
E
AR
Thermal Resistance
R
θJC
R
θCS
R
θJA
Diode Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Drain-to-Source Breakdown Voltage 500 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient
J
––– 0.60 ––– V/°C Reference to 25°C, ID = 1mA Static Drain-to-Source On-Resistance ––– ––– 1.4 Ω VGS = 10V, ID = 3.0A Gate Threshold Voltage 2.0 ––– 4.5 V VDS = VGS, ID = 250µA
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 400V, VGS = 0V, TJ = 125°C Gate-to-Source Forward Leakage ––– ––– 100 VGS = 30V Gate-to-Source Reverse Leakage ––– ––– -100
VDS = 500V, VGS = 0V
µA
nA
VGS = -30V
Parameter Min. Typ. Max. Units Conditions Forward Transconductance 2.8 ––– ––– S VDS = 50V, ID = 3.0A Total Gate Charge ––– ––– 24 ID = 5.0A Gate-to-Source Charge ––– ––– 6.3 nC VDS = 400V Gate-to-Drain ("Miller") Charge ––– ––– 11 VGS = 10V, See Fig. 6 and 13 Turn-On Delay Time ––– 10 ––– VDD = 250V Rise Time ––– 21 ––– ID = 5.0A Turn-Off Delay Time ––– 21 ––– RG = 14Ω
ns
Fall Time ––– 15 ––– RD = 49Ω,See Fig. 10 Input Capacitance ––– 620 ––– VGS = 0V Output Capacitance ––– 93 ––– VDS = 25V Reverse Transfer Capacitance ––– 4.3 ––– pF ƒ = 1.0MHz, See Fig. 5 Output Capacitance ––– 886 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz Output Capacitance ––– 27 ––– VGS = 0V, VDS = 400V, ƒ = 1.0MHz
Parameter Typ. Max. Units
Single Pulse Avalanche Energy ––– 230 mJ Avalanche Current ––– 5.0 A Repetitive Avalanche Energy ––– 7.4 mJ
Parameter Typ. Max. Units
Junction-to-Case ––– 1.7 Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W Junction-to-Ambient ––– 62
Parameter Min. Typ. Max. Units Conditions Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode)
––– –––
––– –––
Diode Forward Voltage ––– ––– 1.5 V TJ = 25°C, IS = 5.0A, VGS = 0V Reverse Recovery Time ––– 430 650 ns TJ = 25°C, IF = 5.0A Reverse RecoveryCharge ––– 1.62 2.4 µC di/dt = 100A/µs  Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
5.0
20
showing the
A
p-n junction diode.
D
G
S
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IRF830APbF
Document Number: 91061
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3
100
10
1
0.1
D
I , Drain-to-Source Current (A)
0.01
0.1 1 10 100
100
VGS
TOP
15V 10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.5V
4.5V
20µs PULSE WIDTH T = 25 C
J
V , Drain-to-Source Voltage (V)
DS
°
100
10
1
D
I , Drain-to-Source Current (A)
0.1 1 10 100
VGS
TOP
15V 10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.5V
4.5V
20µs PULSE WIDTH T = 150 C
J
V , Drain-to-Source Voltage (V)
DS
°
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
2.5
I =
D
5.0A
10
T = 150 C
1
D
I , Drain-to-Source Current (A)
0.1
4.0 5.0 6.0 7.0 8.0
°
J
°
T = 25 C
J
V = 50V
DS
20µs PULSE WIDTH
V , Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
2.0
1.5
1.0
(Normalized)
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
T , Junction Temperature( C)
J
Fig 4. Normalized On-Resistance
Vs. Temperature
V =
GS
°
10V
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IRF830APbF
A
Document Number: 91061
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4
10000
1000
100
V = 0V, f = 1MHz
GS
C = C + C , C SHORTED
iss gs gd ds
C = C
rss gd
C = C + C
oss ds gd
C
iss
C
oss
C, Capacitance (pF)
10
C
rss
1
1 10 100 1000
V , Drain-to-Source Voltage (V)
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
20
I =
5.0A
V , Gate-to-Source Voltage (V)
GS
D
16
12
8
4
V = 400V
DS
V = 250V
DS
V = 100V
DS
FOR TEST CIRCUIT
0
0 4 8 12 16 20 24
Q , Total Gate Charge (nC)
G
SEE FIGURE
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
13
10
°
T = 150 C
J
1
°
T = 25 C
J
SD
I , Reverse Drain Current (A)
V = 0 V
0.1
0.2 0.4 0.6 0.8 1.0 1.2
V ,Source-to-Drain Voltage (V)
SD
GS
Fig 7. Typical Source-Drain Diode
Forward Voltage
10us
10
100us
1
D
I , Drain Current (A)I , Drain Current (A)
°
= 25 C
C
T T= 150 C Single Pulse
0.1 10 100 1000 10000
°
J
V , Drain-to-Source Voltage (V)
DS
1ms
10ms
Fig 8. Maximum Safe Operating Area
Page 5
0
t
5.0
Document Number: 91061
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5
4.0
3.0
2.0
D
I , Drain Current (A)
1.0
0.0 25 50 75 100 125 150
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
IRF830APbF
R
D.U.T.
t
d(off)tf
D
V
DS
V
GS
R
G
10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
10% V
GS
t
d(on)tr
Fig 10b. Switching Time Waveforms
+
V
DD
-
10
thJC
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
Thermal Response (Z )
0.01
0.01
0.00001 0.0001 0.001 0.
SINGLE PULSE
(THERMAL RESPONSE)
t , Rectangular Pulse Dura
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Page 6
IRF830APbF
A
A
Document Number: 91061
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6
15V
DRIVER
+
-
V
R
20V
V
DS
G
t
L
D.U.T
I
AS
Ω
0.01
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
Q
GD
DD
500
TOP
400
300
200
100
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150
Starting T , Junction Temperature( C)
J
BOTTOM
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
790
I
D
2.2A
3.2A
5.0A
°
V
G
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T.
3mA
I
I
G
Current Sampling Resistors
+
V
DS
-
D
Fig 13b. Gate Charge Test Circuit
785
780
775
DSav
V , Avalanche Voltage (V)
770
0.0 1.0 2.0 3.0 4.0 5.0
I , Avalanche Current (A)
av
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
Page 7
IRF830APbF
Document Number: 91061
www.vishay.com
7
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance Current Transformer
-
-
• dv/dt controlled by R
G
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
P. W .
Period
+
+
V
DD
-
VGS=10V
*
Reverse Recovery Current
Re-Applied Voltage
D.U.T. ISDWaveform
Body Diode Forward
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
* V
= 5V for Logic Level Devices
GS
Fig 14. For N-Channel HEXFETS
Current
di/dt
Diode Recovery
dv/dt
V
DD
I
SD
Page 8
IRF830APbF
K
R
R
Document Number: 91061
www.vishay.com
8
TO-220AB Package Outline
10.54 (.415)
1.40 (.055)
1.15 (.045)
2X
10.29 (.405)
4
1 2 3
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (.555)
13.47 (.530)
3X
2.54 (.100)
NOTES:
1 DIMEN SIONING & TOLE RANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONF ORMS TO JE DEC OUTLINE TO -220AB. 2 CON TROLLING DIMEN SION : INCH 4 HEATSINK & LEAD MEASUR EMENTS DO NOT INCLUDE BURRS.
3.78 (.149)
3.54 (.139)
- A -
6.47 (.255)
6.10 (.240)
1.15 (.045) MIN
4.06 (.160)
3.55 (.140)
0.93 (.037)
3X
0.69 (.027)
0.36 (.014) M B A M
TO-220AB Part Marking Information
EXAMPLE:
THIS IS A N IRF1010
LOT CODE 1789 ASSEMBLED O N WW 19, 1997 IN THE ASSEM BLY LINE "C"
Note: "P" in assembly line position indicates "Lead-Free"
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting T
RG = 25Ω, I
I
SD
TJ ≤ 150°C
= 25°C, L = 18mH
J
= 5.0A. (See Figure 12)
AS
≤ 5.0A, di/dt ≤ 370A/µs, V
DD
≤ V
(BR)DSS
,
INTER NATIO NAL
RECTIFIER
ASSEMBLY LOT CO DE
4.69 (.185)
4.20 (.165)
LOGO
- B -
1.32 (.052)
1.22 (.048)
2.92 (.115)
2.64 (.104)
3X
LEAD ASSIGNMENTS
LEAD ASSIGNMENTS
HEXFET
1 - GATE 2 - DRAIN
1- GATE
3 - SOURCE
2- DRAIN 3- SOURCE
4 - DRAIN
4- DRAIN
0.55 (.022)
0.46 (.018)
PART NUMBER
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
IGBTs, CoPAC
1- GATE 2- COLLECTO 3- EMITTER 4- COLLECTO
Pulse width ≤ 300µs; duty cycle ≤ 2%.
C
eff. is a fixed capacitance that gives the same charging time
oss
as C
oss
while V
is rising from 0 to 80% V
DS
DSS
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
11/03
Page 9
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Vishay
Notice
The products described herein were acquired by Vishay Intertechnology, Inc., as part of its acquisition of International Rectifier’s Power Control Systems (PCS) business, which closed in April 2007. Specifications of the products displayed herein are pending review by Vishay and are subject to the terms and conditions shown below.
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
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®
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Document Number: 99901 www.vishay.com Revision: 12-Mar-07 1
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