Page 1
PD - 94497
SMPS MOSFET
Applications
High frequency DC-DC converters
UPS and Motor Control
Benefits
Low Gate-to-Drain Charge to Reduce
Switching Losses
Fully Characterized Capacitance Including
Effective C
App. Note AN1001)
Fully Characterized Avalanche Voltage
and Current
Typical R
Absolute Maximum Ratings
ID @ TC = 25°C
I
@ TC = 100°C
D
I
DM
@TC = 25°C
P
D
V
GS
dv/dt Peak Diode Recovery dv/dt
T
J
T
STG
to Simplify Design, (See
OSS
= 12mΩ
DS(on)
Parameter Units
Continuous Drain Current, V
Continuous Drain Current, V
Pulsed Drain Current
Power Dissipation W
Linear Derating Factor W/°C
Gate-to-Source Voltage V
Operating Junction and
Storage Temperature Range °C
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw N•m (lbf•in)
@ 10V
GS
@ 10V
GS
IRF8010
HEXFET® Power MOSFET
V
DSS
100V 15mΩ 80A
300 (1.6mm from case )
R
DS(on)
Max.
80
57
320
260
1.8
± 20
16
-55 to + 175
1.1(10)
max I
TO-220AB
D
A
V/ns
Thermal Resistance
Parameter Typ. Max. Units
R
θ JC
R
θ CS
R
θ JA
Notes through are on page 8
Junct ion-to-Case ––– 0.57
Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
Junct ion-to-Ambient ––– 62
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Page 2
IRF8010
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
V
(BR)DSS
∆
V
(BR)DSS
R
DS(on)
V
GS(th)
I
DSS
I
GSS
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs Forward Transconductance 82 ––– ––– V
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
C
oss
eff.
C
oss
Avalanche Characteristics
E
AS
I
AR
E
AR
Drain-to-Source Breakdown Voltage 100 ––– ––– V
∆
T
Breakdown Voltage Temp. Coefficient ––– 0.11 ––– V/°C
J
Static Drain-to-Source On-Resistance ––– 12 15
Gate Threshold Voltage 2.0 ––– 4.0 V
Drain-to-Source Leakage Current ––– ––– 20 µA
––– ––– 250
Gate-to-Source Forward Leakage ––– ––– 200 nA
Gate-to-Source Reverse Leakage ––– ––– -200
Parameter Min. Typ. Max. Units
Total Gate Charge ––– 81 120
Gate-to-Source Charge ––– 22 ––– nC
Gate-to-Drain ("Miller") Charge ––– 26 –––
Turn-On Delay Time ––– 15 –––
Rise Time ––– 130 –––
Turn-Off Delay Time ––– 61 ––– ns
Fall Time ––– 120 –––
Input Capacitance ––– 3830 –––
Output Capacitance ––– 480 –––
Reverse Transfer Capacitance ––– 59 ––– pF
Output Capacitance ––– 3830 –––
Output Capacitance ––– 280 –––
Effective Output Capacitance ––– 530 –––
Parameter Units
Single Pulse Avalanche Ener
Avalanche Current
Repetitive Avalanche Energy
Typ.
–––
–––
–––
VGS = 0V, ID = 250µA
Reference to 25°C, I
mΩ
V
= 10V, ID = 45A
GS
= VGS, ID = 250µA
V
DS
= 100V, VGS = 0V
V
DS
V
= 100V, VGS = 0V, TJ = 125°C
DS
V
= 20V
GS
V
= -20V
GS
VDS = 25V, ID = 45A
I
= 80A
D
V
= 80V
DS
= 10V
V
GS
V
= 50V
DD
= 80A
I
D
R
= 39
G
= 10V
V
GS
V
= 0V
GS
= 25V
V
DS
ƒ = 1.0MHz
= 0V, VDS = 1.0V, ƒ = 1.0MHz
V
GS
V
= 0V, VDS = 80V, ƒ = 1.0MHz
GS
= 0V, VDS = 0V to 80V
V
GS
Conditions
Conditions
Ω
Max.
310
45
26
= 1mA
D
mJ
A
mJ
Diode Characteristics
I
I
V
t
Q
t
S
SM
rr
on
SD
rr
Parameter Min. Typ. Max. Units
Continuous Source Current ––– ––– 80
(Body Diode) A
Pulsed Source Current ––– ––– 320
(Body Diode)
Diode Forward Voltage ––– ––– 1.3 V
Reverse Recovery Time ––– 99 150 ns
Reverse RecoveryCharge ––– 460 700 nC
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
MOSFET symbol
showing the
integral reverse
p-n junction diode.
T
= 25°C, IS = 80A, VGS = 0V
J
T
= 150°C, IF = 80A, VDD = 50V
J
di/dt = 100A/µs
Conditions
D
G
S
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Page 3
IRF8010
10000
)
A
1000
(
t
n
e
r
r
u
C
e
c
r
u
o
S
o
t
n
i
a
r
D
,
D
I
100
10
1
TOP 15V
BOTTOM 4.0V
VGS
12V
10V
6.0V
5.5V
5.0V
4.5V
4.0V
20µs PULSE WIDTH
0.1
0.1 1 10 100
Tj = 25°C
VDS, Drain-to-Source Voltage (V)
1000
V
DS
TJ = 175°C
= 50V
)
Α
(
t
n
e
r
100
r
u
C
e
c
r
u
o
S
o
t
-
10
n
i
a
r
D
,
D
I
TJ = 25°C
20µs PULSE WIDTH
1
2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0
VGS, Gate-to-Source Voltage (V)
1000
TOP 15V
)
A
(
t
n
e
r
100
r
u
C
e
c
r
u
o
S
o
t
n
i
a
r
D
,
D
I
BOTTOM 4.0V
10
VGS
12V
10V
6.0V
5.5V
5.0V
4.5V
4.0V
20µs PULSE WIDTH
Tj = 175°C
1
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.5
3.0
2.5
2.0
1.5
(Normalized)
1.0
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
80A
I =
D
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temper ature ( C)
J
V =
GS
°
10V
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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Page 4
IRF8010
100000
10000
)
F
p
(
e
c
n
a
t
1000
i
c
a
p
a
C
,
C
100
10
1 10 100
V
= 0V, f = 1 MHZ
GS
C
= C
iss
rss
oss
= C
= C
gs
gd
ds
C
C
+ Cgd, C
+ C
gd
ds
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
SHORTED
C
iss
C
oss
C
rss
12
ID= 80A
)
V
10
(
e
g
a
t
l
8
o
V
e
c
r
u
6
o
S
o
t
e
4
t
a
G
,
S
2
G
V
VDS= 80V
VDS= 50V
VDS= 20V
0
0 2 04 06 08 01 0 0
Q
Total Gate Charge (nC)
G
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
10000
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100µsec
1msec
10msec
VDS, Drain-to-Source Voltage (V)
100
°
T = 175 C
J
10
°
T = 25 C
1
SD
I , Reverse Drain Current (A)
0.1
0.0 0.5 1.0 1.5 2.0
V ,Source- to-Drain Voltag e (V)
SD
J
V = 0 V
Fig 7. Typical Source-Drain Diode
)
A
1000
(
t
n
e
r
r
u
C
100
e
c
r
u
o
S
-
10
o
t
n
i
a
r
D
,
1
Tc = 25°C
D
I
Tj = 175°C
GS
Single Pulse
0.1
1 10 100 1000
Fig 8. Maximum Safe Operating Area
Forward Voltage
4 www.irf.com
Page 5
IRF8010
R
D.U.T.
D
V
DD
80
LIMITED BY PACKAGE
60
R
V
DS
V
GS
G
10V
40
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
D
I , Drain Current (A)
20
Fig 10a. Switching Time Test Circuit
V
DS
90%
0
25 50 75 100 125 150 175
T , Case Temperatur e ( C)
C
Fig 9. Maximum Drain Current Vs.
°
10%
V
GS
t
d(on)tr
t
d(off)tf
Case Temperature
Fig 10b. Switching Time Waveforms
10
thJC
1
D = 0.50
P
1 2
DM
t
1
t
2
0.20
0.1
0.10
Thermal Response (Z )
0.05
0.02
0.01
0.01
0.00001 0.0001 0.001 0.01 0.1 1
SINGLE PULSE
(THERMAL RESPONSE)
t , Rectangular Pulse Duration (sec)
1
Not es:
1. Duty factor D = t / t
2. Peak T = P x Z + T
J DM thJC C
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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Page 6
IRF8010
15V
DRIVER
+
-
V
R
G
20V
V
DS
t
L
D.U.T
I
AS
0.01
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
DD
600
TOP
500
400
300
200
100
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting Tj, Junction Temperature ( C)
BOTTOM
°
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
D
18A
32A
45A
Current Regulator
Same Type as D.U.T.
Q
G
10 V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
12V
V
GS
Fig 13b. Gate Charge Test Circuit
50KΩ
.2µF
.3µF
3mA
Current Sampling Resistors
+
V
D.U.T.
I
G
DS
-
I
D
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Page 7
Peak Diode Recovery dv/dt Test Circuit
IRF8010
D.U.T
+
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
• dv/dt controlled by R
• Driver same type as D.U.T.
G
• I SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
Period
P. W .
+
V
DD
VGS=10V
*
D.U.T. ISDWaveform
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. VDSWaveform
Inductor Curent
* V
= 5V for Logic Level Devices
GS
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
V
DD
I
SD
Fig 14. For N-Channel HEXFET® Power MOSFETs
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Page 8
IRF8010
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
2.87 (.113 )
2.62 (.103 )
15.24 (.60 0)
14.84 (.58 4)
14.09 (.55 5)
13.47 (.53 0)
10.29 (.405)
1 2 3
6.47 (.255 )
6.10 (.240 )
4
1.15 (.04 5)
MIN
4.06 (.160 )
3.55 (.140 )
3.78 (.149 )
3.54 (.139 )
- A -
4.69 (.185 )
4.20 (.165 )
- B -
1.32 (.052 )
1.22 (.048 )
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
0.93 (.03 7)
3X
1.40 (.055)
3X
1.15 (.045)
2.54 (.100)
NOTES:
1 DIMENSIONING & TOLERANCING PER ANS I Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB .
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
2X
0.69 (.02 7)
0.36 (.014) M B A M
TO-220AB Part Marking Information
EXAMPLE : THIS IS AN IRF1010
W ITH ASSEMBLY
LOT CODE 9B1M
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting T
I
AS
I
SD
= 25°C, L = 0.31mH, RG = 25Ω,
J
= 45A.
≤ 45A, di/dt ≤ 110A/µs, V
DD
≤ V
(BR)DSS
,
TJ ≤ 175°C.
TO-220 package is not recommended for Surface Mount Application.
This product has been designed and qualified for the Industrial market.
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
Pulse width ≤ 300µs; duty cycle ≤ 2%.
C
eff. is a fixed capacitance that gives the same charging time
oss
as C
oss
while V
is rising from 0 to 80% V
DS
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
Data and specifications subject to change without notice.
Qualification Standards can be found on IR’s Web site.
IRF1010
9246
9B 1M
0.55 (.022)
3X
0.46 (.018)
2.92 ( .115)
2.64 ( .104)
PART NUMBER
DATE CODE
(YYW W)
YY = YEAR
WW = WEEK
DSS
.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.08/02
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