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SMPS MOSFET
A
PD- 93898A
IRF7451
HEXFET® Power MOSFET
Applications
l High frequency DC-DC converters
V
DSS
R
DS(on)
150V 0.09
max I
ΩΩ
Ω 3.6A
ΩΩ
Benefits
l Low Gate to Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective C
to Simplify Design, (See
OSS
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
S
S
S
1
2
3
4
Top View
A
8
D
7
D
6
D
5
DG
SO-8
Absolute Maximum Ratings
Parameter Max. Units
ID @ TA = 25°C Continuous Drain Current, VGS @ 10V 3.6
ID @ TA = 70°C Continuous Drain Current, VGS @ 10V 2.9 A
I
DM
PD @TA = 25°C Power Dissipation 2.5 W
V
GS
dv/dt Peak Diode Recovery dv/dt 7.9 V/ns
T
J
T
STG
Pulsed Drain Current 29
Linear Derating Factor 0.02 W/°C
Gate-to-Source Voltage ± 30 V
Operating Junction and -55 to + 150
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
°C
D
Thermal Resistance
Symbol Parameter Typ. Max. Units
R
θJL
R
θJA
Junction-to-Drain Lead ––– 20
Junction-to-Ambient ––– 50 °C/W
Notes through are on page 8
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IRF7451
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
I
DSS
I
GSS
Dynamic @ TJ = 25°C (unless otherwise specified)
g
fs
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff. Effective Output Capacitance ––– 180 ––– VGS = 0V, VDS = 0V to 120V
oss
Drain-to-Source Breakdown Voltage 150 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.19 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance ––– ––– 0.09 Ω VGS = 10V, ID = 2.2A
Gate Threshold Voltage 3.0 – –– 5.5 V VDS = VGS, ID = 250µA
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 120V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 30V
Gate-to-Source Reverse Leakage ––– ––– -100
VDS = 150V, VGS = 0V
µA
nA
VGS = -30V
Parameter Min. Typ. Max. Units Conditions
Forward Transconductance 3.5 ––– ––– S VDS = 25V, ID = 2.2A
Total Gate Charge ––– 28 41 ID = 2.2A
Gate-to-Source Charge ––– 6.8 10 nC VDS = 120V
Gate-to-Drain ("Miller") Charge ––– 13 20 VGS = 10V
Turn-On Delay Time ––– 10 ––– VDD = 75V
Rise Time ––– 4.2 ––– ID = 2.2A
Turn-Off Delay Time ––– 17 ––– RG = 6.5Ω
ns
Fall Time ––– 15 ––– VGS = 10V
Input Capacitance ––– 990 ––– VGS = 0V
Output Capacitance ––– 220 ––– VDS = 25V
Reverse Transfer Capacitance ––– 42 ––– pF ƒ = 1.0MHz
Output Capacitance ––– 1260 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Output Capacitance ––– 100 ––– VGS = 0V, VDS = 120V, ƒ = 1.0MHz
Avalanche Characteristics
Parameter Typ. Max. Units
E
AS
I
AR
Single Pulse Avalanche Energy ––– 210 mJ
Avalanche Current ––– 3.6 A
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
2.3
29
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 2.2A, VGS = 0V
Reverse Recovery Time ––– 76 110 ns TJ = 25°C, IF = 2.2A
Reverse RecoveryCharge ––– 270 400 nC di/dt = 100A/µs
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D
S
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IRF7451
100
10
1
0.1
, Drain-to-Source Current (A)
D
0.01
I
5.0V
20µs PULSE WIDTH
Tj = 25°C
0.001
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
100
VGS
TOP 15.0V
12.0V
10.0V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
100
10
1
, Drain-to-Source Current (A)
D
I
5.0V
20µs PULSE WIDTH
Tj = 150°C
0.1
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
2.5
3.6A
I =
D
VGS
TOP 15.0V
12.0V
10.0V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
°
10
1
0.1
D
I , Drain-to-Source Current (A)
0.01
T = 150 C
J
°
T = 25 C
J
V = 25V
DS
20µs PULSE WIDTH
4.0 5.0 6.0 7.0 8.0
V , Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
2.0
1.5
1.0
(Normalized)
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
T , Junction Temperature ( C)
J
Fig 4. Normalized On-Resistance
V =
GS
°
10V
Vs. Temperature
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IRF7451
100000
10000
1000
C, Capacitance(pF)
100
V
= 0V, f = 1 MHZ
GS
C
= C
iss
rss
oss
gs
= C
= C
C
C
gd
ds
Ciss
Coss
Crss
10
1 10 100 1000
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
+ Cgd, C
+ C
gd
SHORTED
ds
16
I =
2.2A
D
12
8
4
GS
V , Gate-to-Source Voltage (V)
0
0 10 20 30 40
Q , Total Gate Charge (nC)
G
V = 120V
DS
V = 75V
DS
V = 30V
DS
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10us
10
°
T = 150 C
J
T = 25 C
1
SD
I , Reverse Drain Current (A)
0.1
0.2 0.4 0.6 0.8 1.0
V ,Source-to-Drain Voltage (V)
SD
J
V = 0 V
GS
Fig 7. Typical Source-Drain Diode
°
10
1
D
I , Drain Current (A)I , Drain Current (A)
°
= 25 C
C
T T= 150 C
Single Pulse
0.1
1 10 100 1000
°
J
V , Drain-to-Source Voltage (V)
DS
100us
1ms
10ms
Fig 8. Maximum Safe Operating Area
Forward Voltage
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IRF7451
4.0
3.0
2.0
D
I , Drain Current (A)
1.0
0.0
25 50 75 100 125 150
TA , Ambient Temperature (°C)
Fig 9. Maximum Drain Current Vs.
Ambient Temperature
100
R
V
DS
V
GS
R
G
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
D
D.U.T.
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
+
V
DD
-
D = 0.50
thJC
Thermal Response(Z )
0.20
10
0.10
0.05
P
0.02
1
0.01
SINGLE PULSE
(THERMAL RESPONSE)
0.1
0.0001 0.001 0.01 0.1 1 10 100 1000
t , Rectangular Pulse Duration (sec)
1
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
J DM thJC C
DM
t
1 2
1
t
2
Fig 10. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRF7451
(BR)
A
0.085
)
Ω
0.083
0.080
0.078
0.075
, Drain-to-Source On Resistance (
0.073
DS ( on )
R
0.070
0246810121416
VGS = 10V
ID , Drain Current ( A )
0.120
)
0.105
ID = 2.2A
0.090
0.075
, Drain-to -Source On Resistance (Ω
DS(on)
R
0.060
6.0 7.0 8.0 9.0 10.0 11.0 12.0 13.0 14.0 15.0
V
Gate -to -Source Voltage (V)
GS,
Fig 12. On-Resistance Vs. Drain Current
Current Regulator
Same Type as D.U.T.
.2µF
12V
V
GS
50KΩ
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
V
GS
+
V
DS
-
I
D
V
G
QGSQ
Q
G
GD
Charge
Fig 13a&b. Basic Gate Charge Test Circuit
Fig 13. On-Resistance Vs. Gate Voltage
500
400
300
TOP
BOTTOM
I
1.6A
2.9A
3.6A
D
and Waveform
200
15V
V
t
p
I
AS
DSS
V
R
G
20V
L
DS
D.U.T
I
AS
Ω
0.01
t
p
Fig 14a&b. Unclamped Inductive Test circuit
and Waveforms
DRIVER
+
V
-
100
AS
E , Single Pulse Avalanche Energy (mJ)
DD
0
25 50 75 100 125 150
Starting T , Junction Temperature ( C)
J
Fig 14c. Maximum Avalanche Energy
Vs. Drain Current
°
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SO-8 Package Details
D
5
- B -
8 7 6 5
5
E
- A 1 2 3 4
e
6X
- C -
0.25 (.0 1 0 ) M C A S B S
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M-1982.
2. C O NT R O L L ING D IM E NSIO N : INC H .
3. DIMENSIONS ARE SHOWN IN MILLIMETERS (INCHES).
4. O U T LIN E CO N FORMS T O J E D E C O U T LIN E M S- 0 1 2 A A.
5
DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS
M O L D PROTR U S IONS N O T T O E X C EED 0 .2 5 (.0 0 6 ).
DIM E N SIONS IS T H E L ENGT H OF L E AD FOR SO L D ERIN G TO A S UB S T R A TE ..
6
B 8X
e1
A1
H
0 .2 5 (.0 1 0 ) M A M
A
0.10 (.004)
θ
θ
L
8X
K x 45°
6
C
8X
IRF7451
IN CHES MILL IMET ERS
DIM
M IN M AX MIN MA X
A .0 532 .0 688 1 .35 1 .7 5
A1 .0 040 .0 098 0 .10 0 .2 5
B .0 14 .0 18 0 .36 0 .4 6
C .0 07 5 .0 0 9 8 0 .1 9 0 .2 5
D .1 89 .196 4 .8 0 4 .9 8
E .1 50 .1 57 3 .81 3 .9 9
e .0 5 0 BA SIC 1 .2 7 B AS IC
e1 .0 2 5 BA SIC 0 .6 35 B AS IC
H .2 28 4 .2 4 4 0 5 .80 6 .2 0
K .0 11 .0 19 0 .28 0 .4 8
L 0 .1 6 .0 50 0 .41 1 .27
θ
0 ° 8 ° 0 ° 8°
RECOMMENDED FOOTPRINT
0.72 (.028 )
8X
6.46 ( .255 )
1.27 ( .050 )
3X
1.78 (.070 )
8X
SO-8 Part Marking
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IRF7451
(
SO-8 Tape and Reel
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
NOTES:
1. CONTROLLING DIMENSION : MILLIM ETER.
2. ALL DIMENSIONS ARE SHOW N IN MILLIMETERS
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE C ON F O RM S TO EIA-481 & EIA-541.
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting T
RG = 25Ω, I
I
SD
TJ ≤ 150°C
= 25°C, L = 33mH,
J
= 3.6A.
AS
≤ 2.2A, di/dt ≤ 180A/µs, V
DD
≤ V
(BR)DSS
FEED DIRECTION
INCHES).
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
Pulse width ≤ 400µs; duty cycle ≤ 2%.
C
eff. is a fixed capacitance that gives the same charging time
oss
as C
oss
while V
is rising from 0 to 80% V
DS
When mounted on 1 inch square copper board.
,
DSS
.
Data and specifications subject to change without notice.
This product has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.01/01
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