Datasheet irf7404 Datasheet

Page 1
PD - 9.1246C
IRF7404
HEXFET® Power MOSFET
l Generation V Technology l Ultra Low On-Resistance l P-Channel Mosfet l Surface Mount l Available in Tape & Reel l Dynamic dv/dt Rating l Fast Switching
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications.
The SO-8 has been modified through a customized leadframe for enhanced thermal characteristics and multiple-die capability making it ideal in a variety of power applications. With these improvements, multiple devices can be used in an application with dramatically reduced board space. The package is designed for vapor phase, infra red, or wave soldering techniques. Power dissipation of greater than 0.8W is possible in a typical PCB mount application.
S
S
S
1
2
3
4
Top View
A
8
D
7
D
6
D
5
DG
R
DS(on)
V
DSS
= -20V
= 0.040Ω
SO-8
Absolute Maximum Ratings
Parameter Max. Units
ID @ TA = 25°C 10 Sec. Pulsed Drain Current, VGS @ -4.5V -7.7 ID @ TA = 25°C Continuous Drain Current, VGS @ -4.5V -6.7 ID @ TA = 70°C Continuous Drain Current, VGS @ -4.5V -5.4 I
DM
PD @TA = 25°C Power Dissipation 2.5 W
V
GS
dv/dt Peak Diode Recovery dv/dt -5.0 V/ns T
J, TSTG
Pulsed Drain Current -27
Linear Derating Factor 0.02 W/°C Gate-to-Source Voltage ± 12 V
Junction and Storage Temperature Range -55 to + 150 °C
A
Thermal Resistance Ratings
Parameter Typ. Max. Units
R
θJA
Maximum Junction-to-Ambient ––– 50
°C/W
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IRF7404
Electrical Characteristics @ T
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(ON)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage -20 ––– ––– V VGS = 0V, ID = -250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– -0.012 ––– V/°C Reference to 25°C, ID = -1mA
J
Static Drain-to-Source On-Resistance Gate Threshold Voltage -0.70 –– – ––– V VDS = VGS, ID = -250µA
Forward Transconductance 6.8 ––– ––– S VDS = -15V, ID = -3.2A Drain-to-Source Leakage Current Gate-to-Source Forward Leakage ––– ––– -100 VGS = -12V
Gate-to-Source Reverse Leakage ––– ––– 1 00 VGS = 12V Total Gate Charge ––– ––– 50 ID = -3.2A Gate-to-Source Charge ––– ––– 5.5 nC VDS = -16V Gate-to-Drain ("Miller") Charge ––– ––– 21 VGS = -4.5V, See Fig. 6 and 12 Turn-On Delay Time ––– 14 ––– VDD = -10V Rise Time ––– 32 ––– ID = -3.2A Turn-Off Delay Time ––– 1 00 ––– RG = 6.0Ω Fall Time ––– 65 ––– RD = 3.1Ω, See Fig. 10
Internal Drain Inductance ––– 2.5 –––
Internal Source Inductance ––– 4.0 –––
Input Capacitance ––– 1500 ––– VGS = 0V Output Capacitance ––– 730 – –– pF VDS = -15V Reverse Transfer Capacitance ––– 340 – –– ƒ = 1.0MHz, See Fig. 5
= 25°C (unless otherwise specified)
J
––– ––– 0.040 VGS = -4.5V, ID = -3.2A ––– ––– 0.060 VGS = -2.7V, ID = -2.7A
––– ––– -1.0 VDS = -16V, VGS = 0V ––– ––– -25 VDS = -16V, VGS = 0V, TJ = 125°C
Ω
µA
nA
ns
Between lead tip
nH
and center of die contact
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol (Body Diode) showing the Pulsed Source Current integral reverse (Body Diode) p-n junction diode.
––– ––– -3.1
––– ––– -27
A
G
Diode Forward Voltage ––– ––– -1.0 V TJ = 25°C, IS = -2.0A, VGS = 0V Reverse Recovery Time ––– 69 100 ns TJ = 25°C, IF = -3.2A Reverse RecoveryCharge – –– 71 110 µC di/dt = 100A/µs Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
I
≤ -3.2A, di/dt ≤ -65A/µs, V
SD
DD
≤ V
(BR)DSS
,
Surface mounted on FR-4 board, t ≤ 10sec.
TJ ≤ 150°C
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D
S
Page 3
IRF7404
A
A
A
A
1000
VGS TO P - 7. 5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
100
BOTTOM - 1.5V
10
1
D
-I , Dra in-to-So urc e Cu rren t (A )
-1.5V
20µs PULSE WIDTH T = 25 °C
0.1
0.01 0.1 1 10 100
-V , Drain-to-S o urc e V oltage (V )
DS
J
Fig 1. Typical Output Characteristics
100
1000
VGS TOP - 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
100
BOTTOM - 1. 5V
10
-1.5V
1
D
-I , Drain -to-S ourc e C urren t (A )
20µs PULSE WIDTH T = 150°C
0.1
0.01 0.1 1 10 100
-V , Drain-to-Source Voltage (V)
DS
J
Fig 2. Typical Output Characteristics
2.0
I = -5 .3A
D
T = 25°C
J
1.5
1.0
10
T = 150°C
J
(Norm alized)
0.5
D
-I , D ra in-to-S ou rce C u rren t (A )
1
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
-V , Gate-to-Source Voltage (V)
GS
V = - 1 5 V
DS
20µs PUL SE W IDTH
Fig 3. Typical Transfer Characteristics
DS(on)
R , Dr ain -to -S o u rc e O n R e s is tan c e
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
T , J unc tion T emp eratur e (°C )
J
Fig 4. Normalized On-Resistance
V = -4.5 V
GS
Vs. Temperature
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IRF7404
A
)
A
)
3000
2000
1000
C, Capacitance (pF)
0
1 10 100
V = 0V, f = 1M Hz
GS
C = C + C , C S H O RT E D
is s gs g d ds
C = C
rss gd
C = C + C
oss ds gd
C
iss
C
oss
C
rss
-V , Dra in- to -S o u rc e Volt age (V
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
10
I = -3 .2A
D
V = -1 6V
DS
8
6
4
2
GS
-V , G a te- to-So urc e V o ltag e (V )
FOR TEST CIRCUIT
0
0 102030405060
Q , T o ta l Ga te Cha rge (nC
G
SEE FIGURE 12
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
T = 150°C
10
1
SD
-I , Rev ers e D ra in C urre nt (A )
0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
-V , Sou rc e -to-D r a in Volt ag e (V)
SD
Fig 7. Typical Source-Drain Diode
J
T = 2 5°C
J
1ms
10ms
V = 0V
GS
10
D
-I , Drain Current (A)I , Drain Current (A)
°
= 25 C
A
T T= 150 C Single Pulse
1
0.1 1 10 100
°
J
-V , Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
Forward Voltage
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IRF7404
A
8.0
6.0
4.0
D
-I , Drain Current (A)
2.0
0.0 25 50 75 100 125 150
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Ambient Temperature
100
R
D.U.T.
D
-
V
+
V
DS
V
GS
R
G
-4.5V
Pulse Width ≤ 1µs Du ty F a cto r
≤
0.1%
Fig 10a. Switching Time Test Circuit
V
DS
90%
10% V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
DD
D = 0.50
thJA
0.20
10
0.10
0.05
P
1 2
DM
t
1
t
2
0.02
1
0.01
Thermal Response (Z )
0.1
0.0001 0.001 0.01 0.1 1 10 100
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
t , Rectangular Pulse Duration (sec)
1
J DM thJA A
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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IRF7404
-4.5 V
Q
GS
V
G
Current Regulator
Same Type as D.U.T.
50KΩ
Q
G
Q
GD
12V
.2µF
V
GS
-3mA
.3µF
D.U.T .
­V
DS
+
Charge
Fig 12a. Basic Gate Charge Waveform
I
G
Current Sampling Resistors
I
D
Fig 12b. Gate Charge Test Circuit
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IRF7404
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
+
-
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance Current Transformer
-
**
• dv/dt controlled by R
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VGS*
R
G
* Reverse Polarity for P-Channel
** Use P-Channel Driver for P-Channel Measurements
Driver Gate Drive
P.W.
Period
-
D =
G
P.W.
Period
+
VGS=10V
[ ] ***
+
*
V
DD
-
D.U.T. ISDWaveform
Reverse Recovery Current
Re-Applied Voltage
D.U.T. VDSWaveform
Inductor Curent
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
V
DD
[ ]
I
SD
[ ]
*** V
= 5.0V for Logic Level and 3V Drive Devices
GS
Fig 13. For P-Channel HEXFETS
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IRF7404
Package Outline
SO-8 Outline
Dimensions are shown in millimeters (inches)
D
5
- B -
8 7 6 5
5
E
- A ­1 2 3 4
e
6X
- C -
0.25 (.010) M C A S B S
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M-1982.
2. CONTROLLING DIMENSION : INCH.
3. DIMENSIONS ARE SHOWN IN MILLIMETERS (INCHES).
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA. DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS
5 MOLD PROTRUSIONS NOT TO EXCEED 0.25 (.006). DIMENSIONS IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE..
6
B 8X
e1
A1
H
0.25 (.010) M A M
A
0.10 (.004)
INCHES MILLIMETERS
DIM
MIN MAX MIN MAX A .0532 .0688 1.35 1.75 A1 .0040 .0098 0.10 0.25 B .014 .018 0.36 0.46 C .0075 .0098 0.19 0.25 D .189 .196 4.80 4.98 E .150 .157 3.81 3.99
K x 45°
θ
6
L 8X
C 8X
e .050 BASIC 1.27 BASIC e1 .025 BASIC 0.635 BASIC H .2284 .2440 5.80 6.20 K .011 .019 0.28 0.48 L 0.16 .050 0.41 1.27
0° 8° 0° 8°
θ
RECOMMENDED FOOTPRINT
0.72 (.028 ) 8X
6.46 ( .255 )
1.27 ( .050 ) 3X
1.78 (.070) 8X
Part Marking Information
SO-8
E XA MPL E : T H IS IS A N IRF7 1 0 1
DATE CODE (YW W ) Y = LAST DIGIT OF THE YEAR
312
INTERNATION AL
F7101
R E C T IFIE R LO G O
TOP
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
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IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936
http://www.irf.com/ Data and specifications subject to change without notice. 3/99
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WW = WEEK
XXXX
WAF E R
PART NUMBER
LOT CODE (LAST 4 DIG ITS)
BOTTO M
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
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