Datasheet irf737lc Datasheet

PD - 9.1314

PRELIMINARY

IRF737LC

HEXFET® Power MOSFET

Reduced Gate Drive Requirement
Enhanced 30V VGS Rating
Reduced C

ISS

, C

OSS

, C

RSS

Extremely High Frequency Operation
Repetitive Avalanche Rated

Description

This new series of Low Charge HEXFETs achieve
significantly lower gate charge over conventional MOSFETs.
Utilizing the new LCDMOS technology, the device
improvements are achieved without added product cost,
allowing for reduced gate drive requirements and total
system savings. In addition, reduced switching losses and
improved efficiency are achievable in a variety of high
frequency applications. Frequencies of a few MHz at high
current are possible using the new Low Charge MOSFETs.

These device improvements combined with the proven
ruggedness and reliability that are characteristics of
HEXFETs offer the designer a new standard in power
transistors for switching applications.

Absolute Maximum Ratings

Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 6.1
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 3.9 A
I

DM

PD @TC = 25°C Power Dissipation 74 W

V

GS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt 3.4 V/ns
T

J

T

STG

Pulsed Drain Current  24

Linear Derating Factor 0.59 W/°C
Gate-to-Source Voltage ±30 V
Single Pulse Avalanche Energy 120 mJ
Avalanche Current 6.1 A
Repetitive Avalanche Energy 7.4 mJ

Operating Junction and -55 to + 150
Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case)
Mounting torque, 6-32 or M3 screw. 10 lbf•in (1.1N•m)

V

DSS

R

DS(on)

ID = 6.1A

= 300V

= 0.75Ω

Thermal Resistance

R

θJC

R

θCS

R

θJA

Junction-to-Case –––– –––– 1.7
Case-to-Sink, Flat, Greased Surface –––– 0.50 –––– °C/W
Junction-to-Ambient –––– –––– 62

Parameter Min. Typ. Max. Units

IRF737LC

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions

V

(BR)DSS

∆V

(BR)DSS

R

DS(on)

V

GS(th)

g

fs

I

DSS

I

GSS

Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

L

D

L

S

C

iss

C

oss

C

rss

Drain-to-Source Breakdown Voltage 300 ––– ––– V VGS = 0V, ID = 250µA

/∆T

Breakdown Voltage Temp. Coefficient ––– 0.391 ––– V/°C Reference to 25°C, ID = 1mA

J

Static Drain-to-Source On-Resistance ––– ––– 0.75 Ω VGS = 10V, ID = 3.7A
Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
Forward Transconductance 2.7 ––– ––– S VDS = 50V, ID = 3.7A

Drain-to-Source Leakage Current

––– ––– 25 VDS = 300V, VGS = 0V

––– ––– 250 VDS = 240V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V

µA

nA

Total Gate Charge ––– ––– 17 ID = 6.1A
Gate-to-Source Charge ––– ––– 4.8 nC VDS = 240V
Gate-to-Drain ("Miller") Charge ––– ––– 7.6 VGS = 10V, See Fig. 6 and 13
Turn-On Delay Time ––– 6.6 ––– VDD = 150V
Rise Time ––– 21 ––– ID = 6.1A
Turn-Off Delay Time ––– 13 ––– RG = 12Ω

ns
Fall Time ––– 12 ––– RD = 24Ω, See Fig. 10
Internal Drain Inductance

Internal Source Inductance ––– –––

–––

–––

4.5

7.5

–––

–––

Between lead,
6mm (0.25in.)

nH

from package

and center of die contact
Input Capacitance ––– 430 ––– VGS = 0V
Output Capacitance ––– 120 ––– pF VDS = 25V
Reverse Transfer Capacitance ––– 9.2 ––– ƒ = 1.0MHz, See Fig. 5

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units Conditions

I

S

I

SM

V

SD

t

rr

Q

rr

Notes:

Repetitive rating; pulse width limited by

max. junction temperature. ( See fig. 11 )

DD

RG = 25Ω, I

Continuous Source Current MOSFET symbol
(Body Diode) showing the
Pulsed Source Current integral reverse
(Body Diode) p-n junction diode.

––– ––– 6.1

––– ––– 24

Diode Forward Voltage ––– ––– 1.6 V TJ = 25°C, IS = 6.1A, VGS = 0V
Reverse Recovery Time ––– 320 490 ns TJ = 25°C, IF = 6.1A
Reverse RecoveryCharge ––– 1.5 2.2 µC di/dt = 100A/µs

I

≤ 6.1A, di/dt ≤ 270A/µs, V

SD

TJ ≤ 150°C

= 25V, starting TJ = 25°C, L = 5.7mH

= 6.1A. (See Figure 12)

AS

Pulse width ≤ 300µs; duty cycle ≤ 2%. V

A

DD

≤ V

(BR)DSS

,

IRF737LC

A

A

A

A

100

VGS
TOP 15V
10V

8.0V

7.0V

6.0V

5.5V

5.0V

10

BOTTOM 4.5V

1

4.5V

0.1

D

I , Drain-to-Source Current (A)

20µs PULSE WIDTH
T = 25°C

0.01

0.1 1 10 100

V , Drain-to-Source Voltage (V)

DS

C

Fig 1. Typical Output Characteristics,

TJ = 25oC

100

100

VGS
TOP 15V
10V

8.0V

7.0V

6.0V

5.5V

5.0V

10

BOTTOM 4.5V

1

0.1

D

I , Drain-to-Source Current (A)

4.5V

20µs PULSE WIDTH
T = 150°C

0.01

0.1 1 10 100

V , Drain-to-Source Voltage (V)

DS

C

Fig 2. Typical Output Characteristics,

TJ = 150oC

3.0

I = 6.1A

D

10

T = 150°C

J

1

0.1

D

I , Drain-to-Source Current (A)

0.01
4 5 6 7 8 9 10

T = 25°C

J

V = 50V

DS

20µs PULSE WIDTH

V , Gate-to-Sourc e Voltage (V)

GS

Fig 3. Typical Transfer Characteristics

2.5

2.0

1.5

(Normalized)

1.0

0.5

DS(on)

R , Drain-to-Source On Resistance

0.0

-60 -40 -20 0 20 40 60 80 100 120 140 160

T , Junction Temperature (°C)

J

Fig 4. Normalized On-Resistance

Vs. Temperature

V = 10V

GS

IRF737LC

A

A

A

A

800

700

600

500

400

300

V = 0V, f = 1MHz

GS

C = C + C , C SHORTED

iss gs gd ds

C = C

rss gd

C = C + C

oss ds gd

C

iss

C

oss

C, Capacitance (pF)

200

100

0

1 10 100

V , Drain-to-Source Voltage (V)

DS

C

rss

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

100

20

I = 6.1A

D

16

12

8

4

GS

V , Gate-to-Source Voltage (V)

V = 240V

DS

V = 150V

DS

V = 60V

DS

FOR TEST CIRCUIT

0

0 4 8 12 16

Q , Total Gate Charge (nC)

G

SEE FIGURE 13

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

100

OPERATION IN THIS AREA LIMITED
BY R

DS(on)

10

T = 150°C

J

T = 25°C

J

1

SD

I , Reverse Drain Current (A)

0.1

0.2 0.4 0.6 0.8 1.0 1.2 1.4

V , Source-to-Drain Voltage (V)

SD

V = 0V

Fig 7. Typical Source-Drain Diode

Forward Voltage

GS

10

1

D

I , Drain Current (A)

T = 25°C

C

T = 150°C

J

Single Pulse

0.1
1 10 100 1000

V , Drain-to-Source Voltage (V)

DS

Fig 8. Maximum Safe Operating Area

10µs

100µs

1ms

10ms

7.0

A

6.0

5.0

4.0

V

DS

V

GS

R

G

10V

Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

IRF737LC

R

D

D.U.T.

V

DD

3.0

2.0

D

I , Drain Current (Amps)

1.0

0.0
25 50 75 100 125 150

T , Case Temperature (°C)

C

Fig 9. Maximum Drain Current Vs.

Fig 10a. Switching Time Test Circuit

Fig 10b. Switching Time Waveforms

Case Temperature

10

thJC

1

D = 0.50

0.20

0.10

0.1

Thermal Response (Z )

0.01

0.05

0.02

0.01
SINGLE PULSE
(THERMAL RESPONSE)

0.00001 0.0001 0.001 0.01 0.1 1

t , Rectangular Pulse Duration (sec)

1

Notes:

1. D uty facto r D = t / t

2. P ea k T = P x Z + T

DM

J

1 2

thJC

P

D M

t

1

t

C

2

A

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

IRF737LC

A

10 V

Fig 12a. Unclamped Inductive Test Circuit

Fig 12b. Unclamped Inductive Waveforms

240

200

160

120

80

40

AS

V = 50V

E , Single Pulse Avalanche Energy (mJ)

DD

0

25 50 75 100 125 150

Starting T , Junction Temperature (°C)

J

I
TOP 2.7A

3.9A
BOTTOM 6.1A

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

D

10 V

Fig 13a. Basic Gate Charge Waveform

Fig 13b. Gate Charge Test Circuit

IRF737LC

Peak Diode Recovery dv/dt Test Circuit

D.U.T

R

G

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance
Current Transformer

• dv/dt controlled by R

• Driver same type as D.U.T.

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

G

V

DD

*

* V

= 5V for Logic Level Devices

GS

Fig 14. For N-Channel HEXFETS

IRF737LC

A

Package Outline

TO-220AB Outline

Dimensions are shown in millimeters (inches)

10.54 (.415)

2.87 (.113)

2.62 (.103)

15.24 (.600)

14.84 (.584)

14.09 (.555)

13.47 (.530)

1.40 (.055)

3X

1.15 (.045)

2.54 (.100)

NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220-AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.

2X

10.29 (.405)

1 2 3

Part Marking Information

TO-220AB

EXAMPLE : THIS IS AN IRF1010
WITH AS SEMBLY
LOT CODE 9B1 M

3.78 (.149)

3.54 (.139)

6.47 (.255)

6.10 (.240)

4

1.15 (.045)
MIN

4.06 (.160)

3.55 (.140)

0.93 (.037)

3X

0.69 (.027)

0.36 (.014) M B A M

ASSEMBLY
LOT CODE

- A -

INTERNATIONAL
RECTIFIER
LOGO

4.69 (.185)

4.20 (.165)

IRF1010

9246

9B 1M

- B -

1.32 (.052)

1.22 (.048)

2.92 (.115)

2.64 (.104)

3X

LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN

0.55 (.022)

0.46 (.018)

PART NUMBER

DATE CODE
(YYWW)
YY = YEAR
WW = WEEK

WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: [phone]

EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: [phone]

IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 3L1, Tel: [phone]

IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: [phone]

IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: [phone]

IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo 171 Tel: [phone]

IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: [phone]

Data and specifications subject to change without notice. 8/95