Datasheet IRF710 Datasheet (Intersil)

Page 1
IRF710
Data Sheet June 1999
2.0A, 400V, 3.600 Ohm, N-Channel Power MOSFET
This N-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy inthe breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. They can be operated directly from integrated circuits.
Formerly developmental type TA17444.
Ordering Information
PART NUMBER PACKAGE BRAND
IRF710 TO-220AB IRF710
NOTE: When ordering, include the entire part number.
File Number
Features
• 2.0A, 400V
•r
DS(ON)
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
= 3.600Ω
Components to PC Boards”
Symbol
D
G
2310.3
Packaging
DRAIN
(FLANGE)
JEDEC TO-220AB
TOP VIEW
SOURCE
S
DRAIN
GATE
4-220
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999
Page 2
IRF710
Absolute Maximum Ratings T
= 25oC, Unless Otherwise Specified
C
IRF710 UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P
DS
D D
DM
GS
D
400 V 400 V
2A
1.2 A 5A
±20 V
36 W
Linear Derating Factor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.29 W/oC
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T
AS
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
120 mJ
-55 to 150
300 260
o
C
o
C
o
C
NOTE:
1. TJ = 25oC to 125oC.
Electrical Specifications T
= 25oC, Unless Otherwise Specified
C
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV Gate to Threshold Voltage V
GS(TH)VGS
Zero-Gate Voltage Drain Current I
On-State Drain Current (Note 2) I
D(ON)
Gate to Source Leakage Forward I Drain to Source On Resistance (Note 2) r
DS(ON)VGS
Forward Transconductance (Note 2) g Turn-On Delay Time t
D(ON)
Rise Time t Turn-Off Delay Time t
D(OFF)
Fall Time t Total Gate Charge
Q
g(TOT)VGS
(Gate to Source + Gate to Drain) Gate to Source Charge Q Gate to Drain “Miller” Charge Q Input Capacitance C Output Capacitance C Reverse-Transfer Capacitance C Internal Drain Inductance L
Internal Source Inductance L
Thermal Resistance Junction to Case R Thermal Resistance Junction to Ambient R
DSSVGS
DSS
GSS
fs
r
f
gs gd
ISS OSS RSS
D
S
θJC
θJA
= 0V, ID = -250µA (Figure 10) 400 - - V
= VDS, ID = 250µA 2.0 - 4.0 V VDS = Rated BV VDS = 0.8 x Rated BV VDS> I
D(ON) xrDS(ON)MAX,VGS
, VGS = 0V - - 250 µA
DSS
, VGS = 0V, TJ = 125oC - - 1000 µA
DSS
= 10V 2.0 - - A
VGS = ±20V - - ±500 nA
= 10V, ID = 1.1A (Figures 8, 9) - 3.3 3.6 Ω VDS≥ 10V,ID = 1.2A (Figure 12) 1.0 1.5 - S VDD= 50V, ID≈ 5.6A, RG = 24Ω, RL = 8.9Ω,
VGS = 10V MOSFET Switching Times are Essentially Independent of Operating Temperature
- 8.0 12 ns
-1015ns
-2132ns
-1117ns
= 10V, ID = 2.0A, VDS = 0.8 x Rated BV I
= 1.5mA (Figure 14)
g(REF)
DSS
Gate charge is Essentially Independent of Operating Temperature
- 7.0 12 nC
- 1.2 - nC
- 4.0 - nC
VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) - 135 - pF
-35-pF
- 8.0 - pF
Measured From the Contact Screw on Tab to Center of Die
MeasuredFrom the Drain Lead, 6mm (0.25in) From Package to Center of Die
Measured From the Source Lead, 6mm (0.25in) From Header to Source Bonding Pad
Modified MOSFET Symbol Showing the Internal Device’s Inductances
D
L
D
G
L
S
S
- 3.5 - nH
- 4.5 - nH
- 7.5 - nH
- - 3.5oC/W
Free Air Operation - - 62.5oC/W
4-221
Page 3
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current I Pulse Source to Drain Current
(Note 3)
SD
I
SDM
IRF710
Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode
D
- - 2.0 A
- - 5.0 A
G
S
Source to Drain Diode Voltage (Note 2) V Reverse Recovery Time t Reverse Recovered Charge Q
TJ = 25oC, ISD= 2.0A, VGS = 0V (Figure 13) - - 1.6 V
SD
TJ = 25oC, ISD = 2.0A, dISD/dt = 100A/µs 110 - 520 ns
rr
TJ = 25oC, ISD = 2.0A, dISD/dt = 100A/µs 0.40 - 1.4 µC
RR
NOTES:
2. Pulse Test: Pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 53µH, RG = 25Ω, peak IAS = 2A.
Typical Performance Curves
1.2
1.0
0.8
0.6
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
0 50 100 150
TC, CASE TEMPERATURE (oC)
Unless Otherwise Specified
2.0
1.6
1.2
0.8
DRAIN CURRENT (A)
D,
I
0.4
0
50 75 10025 150
TC, CASE TEMPERATURE (oC)
125
FIGURE 1. NORMALIZED POWERDISSIPATION vs CASE
TEMPERATURE
10
0.5
1
0.2
0.1
0.05
0.02
, THERMAL IMPEDANCE
0.1
0.01
θJC
Z
-2
10
-5
10
SINGLE PULSE
-4
10
-3
10
t
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
4-222
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
-2
10
, RECTANGULAR PULSE DURATION (s)
1
P
DM
t
1
t
t
2
θJC
2
2
+ T
C
NOTES: DUTY FACTOR: D = t1/t PEAK TJ= PDMx Z
0.1 1 10
Page 4
IRF710
Typical Performance Curves
2
10
OPERATION IN THIS REGION IS LIMITED BY r
DS(ON)
10
1
, DRAIN CURRENT (A)
0.1
D
I
T
= 25oC
C
TJ = MAX RATED SINGLE PULSE
-2
10
110
VDS, DRAIN TO SOURCE VOLTAGE (V)
Unless Otherwise Specified (Continued)
3.0
2.4
10µs
100µs
1ms
10ms
DC
2
10
3
10
1.8
1.2
, DRAIN CURRENT (A)
D
I
0.6
10V
6.0V
0
40 80 120 1600
V
DRAIN TO SOURCE VOLTAGE (V)
DS,
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
5.5V
VGS = 5.0V
4.5V
4.0V
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS
3.0
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
2.4
1.8
1.2
, DRAIN CURRENT (A)
D
I
0.6
0
36912015 V
DS,
10V
6.0V
5.5V
VGS = 5.0V
4.5V
4.0V
DRAIN TO SOURCE VOLTAGE (V)
10
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
≥ 50V
DS
1
0.1
, DRAIN TO SOURCE CURRENT (A)
-2
DS(ON)
10
I
0 246810
TJ = 150oC
VSD, GATE TO SOURCE VOLTAGE (V)
TJ = 25oC
200
FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS
30
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
24
18
12
, DRAIN TO SOURCE
ON RESISTANCE (Ω)
DS(ON)
6
r
0
05
12
ID,DRAIN CURRENT (A)
3
VGS = 10V
VGS = 20V
4
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
3.0
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX I
= 2.0A, VGS = 10V
D
2.4
1.8
1.2
0.6
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE VOLTAGE
DS(ON),
0
R
-40 60 16012080400-60 -20
20
T
, JUNCTION TEMPERATURE (oC)
J
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
4-223
100
140
Page 5
IRF710
Typical Performance Curves
1.25 ID = 250µA
1.15
1.05
0.95
BREAKDOWN VOLTAGE
0.85
NORMALIZED DRAIN TO SOURCE
0.75
-40 60 16012080400-60 -20
20
, JUNCTION TEMPERATURE (oC)
T
J
Unless Otherwise Specified (Continued)
100
140
FIGURE 10. NORMALIZED DRAIN TOSOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
2.0
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
1.6
1.2
0.8
, TRANSCONDUCTANCE (S)
0.4
fs
g
0
0.4 0.8 1.2 1.60 2.0 ID,DRAIN CURRENT (A)
TJ = 25oC
TJ = 150oC
500
VGS = 0V, f = 1MHz
= CGS + C
C C
400
C
300
200
C, CAPACITANCE (pF)
100
0
12
ISS RSS
OSS
= C
≈ C
GD
GD
+ C
DS
GS
C
ISS
C
OSS
C
RSS
525
V
DRAIN TO SOURCE VOLTAGE (V)
DS,
10
10
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
10
PULSE DURATION = 80µs
5
DUTY CYCLE = 0.5% MAX
2 1
5
TJ = 150oC
2
0.1 5
, SOURCE TO DRAIN CURRENT (A)
2
SD
I
-2
10
0 0.4 0.8 1.2 2.0
VSD, SOURCE TO DRAIN VOLTAGE (V)
TJ = 25oC
1.6
2
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20
ID = 2.0A
16
VDS = 80V
12
8
4
GATE TO SOURCE VOLTAGE (V)
GS,
V
0
VDS = 200V
VDS = 320V
36912015
Qg,GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
4-224
Page 6
IRF710
Test Circuits and Waveforms
V
DS
BV
DSS
L
VARY t
TO OBTAIN
P
REQUIRED PEAK I
V
GS
AS
R
G
+
V
DD
-
DUT
0V
P
I
AS
0
t
0.01Ω
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
t
P
I
AS
t
AV
V
DS
V
DD
t
ON
t
d(ON)
t
R
L
+
V
R
G
DD
-
V
DS
0
r
90%
10%
DUT
V
GS
V
GS
10%
0
50%
PULSE WIDTH
FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
V
DS
D
S
CURRENT
I
D
SAMPLING
(ISOLATED SUPPLY)
SAME TYPE AS DUT
DUT
V
DS
V
DD
Q
g(TOT)
Q
gd
Q
gs
V
DS
0
I
G(REF)
0
12V
BATTERY
0
0.2µF
50kΩ
I
G(REF)
CURRENT
REGULATOR
0.3µF
G
IG CURRENT
SAMPLING
RESISTOR RESISTOR
t
d(OFF)
90%
V
GS
t
OFF
50%
t
f
90%
10%
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
4-225
Page 7
IRF710
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4-226
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