l Application Specific MOSFETs
l Integrates Monolithic Trench Schottky Diode
l Ideal for CPU Core DC-DC Converters
l Low Conduction Losses
l Low Reverse Recovery Losses
l Low Switching Losses
l Low Reverse Recovery Charge and Low Vf
l Low Profile (<0.7 mm)
l Dual Sided Cooling Compatible
l Compatible with existing Surface Mount Techniques
V
20V
DSS
R
DS(on)
2.5mΩ@V
1.8mΩ@V
MT
max
= 4.5V
GS
= 10V
GS
DirectFET ISOMETRIC
Qg(typ.)
47nC
Applicable DirectFET Package/Layout Pad (see p.8,9 for details)
SQSXSTMQMX
MT
Description
The IRF6691 combines IRs industry leading DirectFET package technology with the latest monolithic die technology,
which integrates MOSFET plus free-wheeling Schottky diode. The DirectFET package is compatible with existing layout
geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering
techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET
package allows dual sided cooling to maximize thermal transfer in power systems, IMPROVING previous best thermal
resistance by 80%.
The IRF6691 is characterized with reduced on resistance (R
voltage (VSD) to reduce conduction, reverse recovery and deadtime losses. These reduced total losses along with high
Cdv/dt immunity make this product ideal for high efficiency DC-DC converters that power the latest generation of processors operating at higher frequencies. The IRF6691 has been optimized for parameters that are critical for synchronous
MOSFET sockets operating in 12 volt buss converters.
), reverse recovery charge (Qrr) and source to drain
DS(on)
Absolute Maximum Ratings
V
DS
V
GS
I
@ TC = 25°C
D
@ TA = 25°C
I
D
@ TA = 70°C
I
D
I
DM
PD @TA = 25°C
PD @TA = 70°C
@TC = 25°C
P
D
T
J
T
STG
ParameterUnits
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, V
Continuous Drain Current, V
Continuous Drain Current, V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Power Dissipation
Linear Derating Factor
Operating Junction and
Storage Temperature Range
cgg
@ 10V
GS
@ 10V
GS
@ 10V
GS
Max.
20
±12
180
32
26
260
2.8
1.8
89
0.022
-40 to + 150
V
A
W
W/°C
°C
Thermal Resistance
ParameterTyp.Max.Units
R
JA
θ
R
JA
θ
R
JA
θ
R
JC
θ
R
J-PCB
θ
Notes through are on page 10
Junct ion-to-Ambient
Junct ion-to-Ambient
Junct ion-to-Ambient
Junct ion-to-Case
Junct ion-to-PCB Mounted
fjgjhj
ij
–––45
12.5–––
20–––°C/W
–––1.4
1.0–––
www.irf.com1
4/28/04
Page 2
IRF6691
gy
Static @ TJ = 25°C (unless otherwise specified)
ParameterMin. Typ. Max. Units
BV
∆ΒV
R
DS(on)
V
GS(th)
∆V
I
DSS
I
GSS
DSS
DSS
GS(th)
/∆T
Drain-to-Source Breakdown Voltage
/∆T
Breakdown Voltage Temp. Coefficient
J
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Gate Threshold Voltage Coeff icient
J
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
gfsForward Transconductance
Q
Q
Q
R
t
t
t
t
C
C
C
g
sw
oss
G
d(on)
r
d(off)
f
iss
oss
rss
Q
gs1
Q
gs2
Q
gd
Q
godr
Total Gate Charge
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge Overdrive
Switch Charge (Q
gs2
+ Qgd)
Output Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Avalanche Characteristics
ParameterUnits
E
AS
I
AR
Single Pulse Avalanche Ener
Avalanche Current
c
d
20––––––V
–––12–––mV/°C
–––1.82.5
–––1.21.8
1.6–––2.5V
–––-4.1––– mV/°C
––––––1.4mA
––––––500µA
––––––5mA
––––––100nA
––––––-100
110––––––S
–––4771
–––14–––
–––4.4–––nC
–––15–––
–––14–––See Fig. 17
–––19–––
–––30–––nC
–––0.601.5Ω
–––23–––
–––95–––ns
–––25–––
–––10–––
–––6580–––
–––2070–––pF
–––840–––
Typ.
–––
–––
Conditions
VGS = 0V, ID = 1.0mA
Reference to 25°C, I
Ω
m
V
= 4.5V, ID = 12A
GS
VGS = 10V, ID = 15A
V
= VGS, ID = 250µA
DS
I
= 10mA, reference to 25°C
D
VDS = 20V, VGS = 0V
V
= 16V, VGS = 0V
DS
= 16V, VGS = 0V, TJ = 125°C
V
DS
= 12V
V
GS
V
= -12V
GS
V
= 10V, ID = 26A
DS
VDS = 10V
= 4.5V
V
GS
I
= 17A
D
= 10V, VGS = 0V
V
DS
V
= 16V, VGS = 4.5V
DD
I
= 26A
D
Clamped Inductive Load
= 0V
V
GS
= 10V
V
DS
ƒ = 1.0MHz
Max.
230
26
= 10mA
D
e
e
e
mJ
A
Diode Characteristics
ParameterMin. Typ. Max. Units
I
S
Continuous Source Current ––––––32
(Body Diode)A
I
SM
V
SD
t
rr
Q
rr
Pulsed Source Current––––––260
(Body Diode)
c
Diode Forward Voltage––––––0.65V
Reverse Recovery Time–––3248ns
Reverse Recovery Charge–––2639nC
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 25A, VGS = 0V
= 25°C, IF = 25A
T
J
di/dt = 100A/µs
Conditions
G
e
2www.irf.com
D
S
e
Page 3
IRF6691
1000
)
A
(
100
t
n
e
r
r
u
C
e
c
r
10
u
o
S
o
t
n
i
a
r
1
D
,
D
I
0.1
2.7V
60µs PULSE WIDTH
≤
Tj = 25°C
0.1110100
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
TOP 10V
BOTTOM 2.7V
VGS
7.0V
4.5V
4.0V
3.5V
3.2V
2.9V
1000
TOP 10V
)
A
(
t
n
e
r
100
r
u
C
e
c
r
u
o
S
o
t
-
10
n
i
a
r
D
,
D
I
2.7V
≤
BOTTOM 2.7V
60µs PULSE WIDTH
Tj = 150°C
1
0.1110100
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output Characteristics
VGS
7.0V
4.5V
4.0V
3.5V
3.2V
2.9V
1000
)
Α
(
t
100
n
e
r
r
u
C
e
c
r
10
u
o
S
o
t
n
i
a
r
1
D
,
D
I
TJ = 150°C
TJ = 25°C
V
= 10V
DS
≤
60µs PULSE WIDTH
0.1
12345
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
1.5
e
c
n
a
t
s
i
s
e
R
n
O
e
c
r
u
o
S
o
t
n
i
a
r
D
,
)
n
o
(
S
D
R
ID = 32A
V
= 10V
GS
)
d
e
z
i
l
1.0
a
m
r
o
N
(
0.5
-60 -40 -20 0 20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
vs. Temperature
www.irf.com3
Page 4
IRF6691
100000
)
F
10000
p
(
e
c
n
a
t
i
c
a
p
a
C
,
1000
C
100
V
= 0V, f = 1 MHZ
GS
C
= C
= C
= C
+ Cgd, C
gs
gd
+ C
ds
ds
gd
iss
C
rss
C
oss
C
iss
C
oss
C
rss
110100
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
SHORTED
6.0
ID= 17A
)
5.0
V
(
e
g
a
t
l
4.0
o
V
e
c
r
u
3.0
o
S
o
t
e
t
2.0
a
G
,
S
G
1.0
V
0.0
0 102030405060
Q
VDS= 16V
VDS= 10V
Total Gate Charge (nC)
G
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
1000
)
A
(
t
n
e
r
r
100
u
C
n
i
a
r
D
e
s
r
e
v
10
e
R
,
D
S
I
1
0.00.20.40.60.81.01.2
TJ = 150°C
TJ = 25°C
VSD, Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
V
GS
= 0V
1000
OPERATION IN THIS AREA
)
A
(
t
n
e
r
r
100
u
C
e
c
r
u
o
S
o
t
n
10
i
a
r
D
,
TA = 25°C
D
I
Tj = 150°C
Single Pulse
1
0110100
LIMITED BY RDS(on)
VDS, Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
100µsec
1msec
10msec
Forward Voltage
4www.irf.com
Page 5
IRF6691
τ
200
175
150
)
A
(
t
125
n
e
r
r
u
C
100
n
i
a
r
75
D
,
D
I
50
25
0
255075100125150
TC , Case Temperature (°C)
Fig 9. Maximum Drain Current vs.
Case Temperature
2.5
)
V
(
e
g
a
t
l
o
2.0
V
d
l
o
h
s
e
r
h
t
e
t
a
1.5
G
)
h
t
(
S
G
V
1.0
-75 -50 -250255075 100 125 150
ID = 250µA
TJ , Temperature ( °C )
Fig 10. Threshold Voltage vs. Temperature
100
D = 0.50
)
A
J
h
t
Z
(
e
s
n
o
p
s
e
R
l
a
m
r
e
h
T
10
1
0.1
0.01
0.001
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE
( THERMAL RESPONSE )
τ
J
τ
J
τ
1
τ
1
Ci= τi/Ri
R
R
R
R
1
2
R
1
τ
2
τ
3
R
R
2
3
τ
3
τ
2
3
Ri (°C/W) τi (sec)
4
R
4
0.678 0.000860
τ
C
τ
17.30 0.577560
4
τ
4
17.57 8.940000
9.470 106.0000
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
0.0001
1E-0061E-0050.00010.0010.010.1110100
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
www.irf.com5
Page 6
IRF6691
A
)
10
Ω
m
(
9
e
c
n
8
a
t
s
i
s
7
e
R
n
6
O
e
c
r
5
u
o
S
-
4
o
t
n
3
i
a
r
D
2
,
)
n
o
1
(
S
D
0
R
2345678910
V
GS,
ID = 32A
TJ = 125°C
TJ = 25°C
Gate -to -Source Voltage (V)
1000
)
J
m
(
y
g
r
800
e
n
E
e
h
c
600
n
a
l
a
v
A
e
s
400
l
u
P
e
l
g
n
i
200
S
,
S
A
E
0
255075100125150
TOP 12A
BOTTOM26A
Starting TJ , Junction Temperature (°C)
I
D
15A
Fig 12. On-Resistance vs. Gate Voltage
15V
DRIVER
+
V
DD
-
R
V
20V
V
DS
G
GS
L
D.U.T
I
AS
Ω
0.01
t
p
Fig 13a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
Fig 13c. Maximum Avalanche Energy
vs. Drain Current
L
V
DS
V
GS
Pulse Width < 1µs
Duty Factor < 0.1%
D
D.U.T
Fig 14a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
+
-
V
DD
I
AS
Fig 13b. Unclamped Inductive Waveforms
t
t
d(on)
r
Fig 14b. Switching Time Waveforms
t
d(off)
t
f
6www.irf.com
Page 7
IRF6691
Reverse
Recovery
Current
Driver Gate Drive
D.U.T. ISDWaveform
D.U.T. VDSWaveform
Inductor Curent
* V
GS
D.U.T
+
-
R
G
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
-
• Low Leakage Inductance
Current Transformer
-
• dv/dt controlled by R
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
G
+
V
DD
Re-Applied
Voltage
+
-
Period
P.W.
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
= 5V for Logic Level Devices
D =
P. W .
Period
VGS=10V
V
DD
I
SD
*
Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel
Please see DirectFET application note AN-1035 for all details regarding the assembly of
DirectFET. This includes all recommendations for stencil and substrate designs.