Datasheet IRF6643TRPBF Datasheet (IRF)

www.irf.com 1

11/28/06

DirectFET Power MOSFET 

PD - 97112A

Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)

Fig 1. Typical On-Resistance vs. Gate Voltage

Typical values (unless otherwise specified)



Click on this section to link to the appropriate technical paper.

 Click on this section to link to the DirectFET Website.  Surface mounted on 1 in. square Cu board, steady state.

 T

C

measured with thermocouple mounted to top (Drain) of part.

 Repetitive rating; pulse width limited by max. junction temperature.  Starting T

J

= 25°C, L = 0.43mH, RG = 25Ω, I

AS

= 7.6A.

Notes:

Fig 2. Typical Total Gate Charge vs. Gate-to-Source Voltage

IRF6643TRPbF

l RoHS Compliant  l Lead-Free (Qualified up to 260°C Reflow) l Application Specific MOSFETs l Ideal for High Performance Isolated Converter

Primary Switch Socket

l Optimized for Synchronous Rectification l Low Conduction Losses l High Cdv/dt Immunity l Dual Sided Cooling Compatible  l Compatible with existing Surface Mount Techniques 

0 10203040

Q

G

Total Gate Charge (nC)

0

2

4

6

8

10

12

V

G

S

,

G

a

t

e

-

t

o

-

S

o

u

r

c

e

V

o

l

t

a

g

e

(

V

)

VDS= 120V

VDS= 75V

VDS= 30V

ID= 7.6A

4 6 8 10 12 14 16

VGS, Gate-to-Source Voltage (V)

20

30

40

50

60

70

T

y

p

i

c

a

l

R

D

S

(

o

n

)

(

m

Ω

)

TJ = 25°C

TJ = 125°C

ID = 7.6A

SH SJ SP MZ MN

Description

The IRF6643PbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance in a package that has the footprint of an Micro8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.

The IRF6643PbF is optimized for primary side sockets in forward and push-pull isolated DC-DC topologies, for 48V and 36V-60V input voltage range systems. The reduced total losses in the device coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for system reliability improvements, and makes this device ideal for high performance isolated DCDC converters.

DirectFET ISOMETRIC

MZ

V

DSS

V

GS

R

DS(on)

150V max ±20V max

29mΩ@ 10V

Q

g tot

Q

gd

V

gs(th)

39nC 11nC 4.0V

Absolute Maximum Ratings

Parameter Units

V

DS

Drain-to-Source Voltage V

V

GS

Gate-to-Source Voltage

I

D

@ TA = 25°C

Continuous Drain Current, V

GS

@ 10V

e

ID @ TA = 70°C

Continuous Drain Current, V

GS

@ 10V

e

A

I

D

@ TC = 25°C

Continuous Drain Current, V

GS

@ 10V

f

I

DM

Pulsed Drain Current

g

E

AS

Single Pulse Avalanche Energy

h

mJ

I

AR

Avalanche Current

g

A

50

Max.

5.0

35

76

±20

150

6.2

7.6

IRF6643TRPbF

2 www.irf.com

S

D

G

Notes:

 Repetitive rating; pulse width limited by max. junction temperature.  Pulse width ≤ 400µs; duty cycle ≤ 2%.

Electrical Characteristic @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units

BV

DSS

Drain-to-Source Breakdown Voltage 150 ––– ––– V

∆ΒV

DSS

/∆T

J

Breakdown Voltage Temp. Coefficient ––– 0.18 ––– V/°C

R

DS(on)

Static Drain-to-Source On-Resistance ––– 29 34.5

mΩ

V

GS(th)

Gate Threshold Voltage 3.0 4.0 4.9 V

∆V

GS(th)

/∆T

J

Gate Threshold Voltage Coefficient ––– -11 ––– mV/°C

I

DSS

Drain-to-Source Leakage Current ––– ––– 20 µA

––– ––– 250

I

GSS

Gate-to-Source Forward Leakage ––– ––– 100 nA

Gate-to-Source Reverse Leakage ––– ––– -100

gfs Forward Transconductance 16 ––– ––– S

Q

g

Total Gate Charge ––– 39 55

Q

gs1

Pre-Vth Gate-to-Source Charge ––– 9.6 –––

Q

gs2

Post-Vth Gate-to-Source Charge ––– 2.2 ––– nC

Q

gd

Gate-to-Drain Charge ––– 11 17

Q

godr

Gate Charge Overdrive ––– 16 ––– See Fig. 15

Q

sw

Switch Charge (Q

gs2

+ Qgd)

––– 13 –––

Q

oss

Output Charge ––– 14 ––– nC

R

G

Gate Resistance

–––

0.8 –––

Ω

t

d(on)

Turn-On Delay Time ––– 9.2 –––

t

r

Rise Time ––– 5.0 –––

t

d(off)

Turn-Off Delay Time ––– 13 ––– ns

t

f

Fall Time ––– 4.4 –––

C

iss

Input Capacitance ––– 2340 –––

C

oss

Output Capacitance ––– 300 ––– pF

C

rss

Reverse Transfer Capacitance ––– 61 –––

C

oss

Output Capacitance ––– 1950 –––

C

oss

Output Capacitance ––– 140 –––

Diode Characteristics

Parameter Min. Typ. Max. Units

I

S

Continuous Source Current ––– ––– 58

(Body Diode) TJ= 25°C

A

I

SM

Pulsed Source Current ––– ––– 76

(Body Diode)g

V

SD

Diode Forward Voltage ––– ––– 1.3 V

t

rr

Reverse Recovery Time ––– 67 100 ns

Q

rr

Reverse Recovery Charge ––– 190 280 nC

MOSFET symbol

Clamped Inductive Load

V

DS

= 25V

Conditions

VGS = 0V, VDS = 80V, f=1.0MHz

V

GS

= 0V, VDS = 1.0V, f=1.0MHz

VDS = 16V, VGS = 0V

V

DD

= 75V, VGS = 10Vi

V

GS

= 0V

ƒ = 1.0MHz

ID = 7.6A

V

DS

= VGS, ID = 150µA

V

DS

= 150V, VGS = 0V

Conditions

VGS = 0V, ID = 250µA

Reference to 25°C, I

D

= 1mA

V

GS

= 10V, ID = 7.6A i

T

J

= 25°C, IF = 7.6A, VDD = 50V

di/dt = 100A/µs c

T

J

= 25°C, IS = 7.6A, VGS = 0V i

showing the

integral reverse

p-n junction diode.

I

D

= 7.6A

V

DS

= 120V, VGS = 0V, TJ = 125°C

V

GS

= 20V

V

GS

= -20V

V

GS

= 10V

V

DS

= 10V, ID = 7.6A

V

DS

= 75V

IRF6643TRPbF

www.irf.com 3

Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 

 Surface mounted on 1 in. square Cu board, steady state.  T

C

measured with thermocouple incontact with top (Drain) of part.

 Used double sided cooling, mounting pad with large heatsink.

Notes:

 Mounted on minimum footprint full size board with metalized

back and with small clip heatsink.

 R

θ

is measured at T

J

of approximately 90°C.

 Surface mounted on 1 in. square Cu board (still air).

 Mounted on minimum footprint full size board with metalized back and with small clip heatsink. (still air)

1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10 100

t1 , Rectangular Pulse Duration (sec)

0.01

0.1

1

10

100

T

h

e

r

m

a

l

R

e

s

p

o

n

s

e

(

Z

t

h

J

A

)

0.20

0.10

D = 0.50

0.02

0.01

0.05

SINGLE PULSE ( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = Pdm x Zthja + Ta

τ

J

τ

J

τ

1

τ

1

τ

2

τ

2

τ

3

τ

3

R

1

R

1

R

2

R

2

R

3

R

3

Ci= τi/Ri

τ

C

τ

4

τ

4

R

4

R

4

Ri (°C/W) τi (sec)

0.6784 0.00086

17.299 0.57756

17.566 8.94

9.4701 106

A

Absolute Maximum Ratings

Parameter Units

PD @TA = 25°C

Power Dissipation

e

W

P

D

@TA = 70°C

Power Dissipation

e

PD @TC = 25°C

Power Dissipation

f

T

P

Peak Soldering Temperature °C

T

J

Operating Junction and

T

STG

Storage Temperature Range

Thermal Resistance

Parameter Typ. Max. Units

R

θJA

Junction-to-Ambient

el

––– 45

R

θJA

Junction-to-Ambient

jl

12.5 –––

R

θJA

Junction-to-Ambient

kl

20 ––– °C/W

R

θJC

Junction-to-Case

fl

––– 1.4

R

θJ-PCB

Junction-to-PCB Mounted 1.0 –––

2.8

1.8

270

-40 to + 150

Max.

89

IRF6643TRPbF

4 www.irf.com

Fig 5. Typical Output Characteristics

Fig 4. Typical Output Characteristics

Fig 6. Typical Transfer Characteristics

Fig 7. Normalized On-Resistance vs. Temperature

Fig 8. Typical Capacitance vs.Drain-to-Source Voltage

Fig 9. Typical On-Resistance vs. Drain Current

-60 -40 -20 0 20 40 60 80 100 120 140 160

TJ , Junction Temperature (°C)

0.5

1.0

1.5

2.0

2.5

T

y

p

i

c

a

l

R

D

S

(

o

n

)

(

N

o

r

m

a

l

i

z

e

d

)

ID = 7.6A

V

GS

= 10V

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

1

10

100

I

D

,

D

r

a

i

n

-

t

o

-

S

o

u

r

c

e

C

u

r

e

n

t

(

A

)

≤60µs PULSE WIDTH

Tj = 25°C

7.0V

VGS

TOP 15V

10V

8.0V

BOTTOM 7.0V

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

1

10

100

I

D

,

D

r

a

i

n

-

t

o

-

S

o

u

r

c

e

C

u

r

e

n

t

(

A

)

≤60µs PULSE WIDTH

Tj = 150°C

7.0V

VGS

TOP 15V

10V

8.0V

BOTTOM 7.0V

4.0 5.0 6.0 7.0 8.0

VGS, Gate-to-Source Voltage (V)

0.1

1

10

100

I

D

,

D

r

a

i

n

-

t

o

-

S

o

u

r

c

e

C

u

r

e

n

t

(

Α

)

TJ = 150°C

TJ = 25°C

TJ = -40°C

V

DS

= 10V

≤

60µs PULSE WIDTH

1 10 100

VDS, Drain-to-Source Voltage (V)

10

100

1000

10000

100000

C

,

C

a

p

a

c

i

t

a

n

c

e

(

p

F

)

V

GS

= 0V, f = 1 MHZ

C

iss

= C

gs

+ Cgd, C

ds

SHORTED

C

rss

= C

gd

C

oss

= C

ds

+ C

gd

C

oss

C

rss

C

iss

0 10 20 30 40 50

ID, Drain Current (A)

25

30

35

40

45

T

y

p

i

c

a

l

R

D

S

(

o

n

)

(

m

Ω

)

TJ= 25°C

VGS = 7.0V

V

GS

= 8.0V

V

GS

= 10V

V

GS

= 15V

IRF6643TRPbF

www.irf.com 5

Fig 13. Typical Threshold Voltage vs.

Junction Temperature

Fig 12. Maximum Drain Current vs. Ambient Temperature

Fig 10. Typical Source-Drain Diode Forward Voltage

Fig11. Maximum Safe Operating Area

Fig 14. Maximum Avalanche Energy vs. Drain Current

25 50 75 100 125 150

TJ , Ambient Temperature (°C)

0.0

1.0

2.0

3.0

4.0

5.0

6.0

7.0

I

D

,

D

r

a

i

n

C

u

r

e

n

t

(

A

)

-75 -50 -25 0 25 50 75 100 125 150

TJ , Temperature ( °C )

2.0

2.5

3.0

3.5

4.0

4.5

5.0

V

G

S

(

t

h

)

G

a

t

e

t

h

r

e

s

h

o

l

d

V

o

l

t

a

g

e

(

V

)

ID = 250µA

ID = 150µA

25 50 75 100 125 150

Starting TJ, Junction Temperature (°C)

0

40

80

120

160

200

E

A

S

,

S

i

n

g

l

e

P

u

l

s

e

A

v

a

l

a

n

c

h

e

E

n

e

r

g

y

(

m

J

)

I

D

TOP

1.5A

3.0A

BOTTOM

15A

0.0 0.4 0.8 1.2 1.6 2.0

VSD, Source-to-Drain Voltage (V)

0.1

1

10

100

I

SD

, Reverse Drain Current (A)

V

GS

= 0V

TJ = 150°C

TJ = 25°C

TJ = -40°C

0.1 1.0 10.0 100.0 1000.0

V

DS

, Drain-toSource Voltage (V)

0.1

1

10

100

1000

I

D

,

D

r

a

i

n

-

t

o

-

S

o

u

r

c

e

C

u

r

e

n

t

(

A

)

TA = 25°C

Tj = 150°C Single Pulse

1msec

10msec

OPERATION IN THIS AREA LIMITED BY RDS(on)

100µsec

IRF6643TRPbF

6 www.irf.com

Fig 15a. Gate Charge Test Circuit

Fig 15b. Gate Charge Waveform

Fig 16b. Unclamped Inductive Waveforms

t

p

V

(BR)DSS

I

AS

Fig 16a. Unclamped Inductive Test Circuit

Fig 17a. Switching Time Test Circuit

R

G

I

AS

0.01

Ω

t

p

D.U.T

L

V

DS

+

-

V

DD

DRIVER

A

15V

20V

V

GS

V

GS

V

DD

V

DS

L

D

D.U.T

+

-

Second Pulse Width < 1µs

Duty Factor < 0.1%

Vds

Vgs

Id

Vgs(th)

Qgs1

Qgs2QgdQgodr

1K

VCC

DUT

0

L

20K

Fig 17b. Switching Time Waveforms

V

DS

V

GS

90%

10%

t

d(off)

t

d(on)

t

f

t

r

IRF6643TRPbF

www.irf.com 7

Fig 18. Diode Reverse Recovery Test Circuit for HEXFET® Power MOSFETs

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance Current Transformer

P.W.

Period

di/dt

Diode Recovery

dv/dt

Ripple ≤ 5%

Body Diode Forward Drop

Re-Applied Voltage

Reverse Recovery Current

Body Diode Forward

Current

VGS=10V

V

DD

I

SD

Driver Gate Drive

D.U.T. ISDWaveform

D.U.T. VDSWaveform

Inductor Curent

D =

P. W .

Period

*** V

GS

= 5V for Logic Level Devices

***

+

-

+

-







R

G

V

DD

• dv/dt controlled by R

G

• Driver same type as D.U.T.

• I

SD

controlled by Duty Factor "D"

• D.U.T. - Device Under Test

D.U.T



**

*

* Use P-Channel Driver for P-Channel Measurements ** Reverse Polarity for P-Channel

DirectFET Substrate and PCB Layout, MZ Outline (Medium Size Can, Z-Designation).

Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.

This includes all recommendations for stencil and substrate designs.

IRF6643TRPbF

8 www.irf.com

DirectFET Part Marking

IMPERIAL

MAX

0.246

0.189

0.152

0.014

0.027

0.037

0.025

0.011

0.044

0.100

0.0235

0.0008

0.003

MIN

6.25

4.80

3.85

0.35

0.68

0.93

0.63

0.28

1.13

2.53

0.616

0.020

0.08

MAX

6.35

5.05

3.95

0.45

0.72

0.97

0.67

0.32

1.26

2.66

0.676

0.080

0.17

CODE A B C D E F G H J K L M R P

DIMENSIONS

METRIC

MAX

0.250

0.201

0.156

0.018

0.028

0.038

0.026

0.013

0.050

0.105

0.0274

0.0031

0.007

DirectFET Outline Dimension, MZ Outline (Medium Size Can, Z-Designation).

Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.

This includes all recommendations for stencil and substrate designs.

IRF6643TRPbF

www.irf.com 9

Data and specifications subject to change without notice.

This product has been designed and qualified for the Consumer market.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information.11/06

DirectFET Tape & Reel Dimension (Showing component orientation).

MIN

7.90

3.90

11.90

5.45

5.10

6.50

1.50

NOTE: CONTROLLING DIMENSIONS IN MM

CODE A B C D E F G H

MAX

8.10

4.10

12.30

5.55

5.30

6.70 N.C

1.60

MIN

0.311

0.154

0.469

0.215

0.201

0.256

0.059

MAX

0.319

0.161

0.484

0.219

0.209

0.264 N.C

0.063

DIMENSIONS

METRIC

IMPERIAL

LOADED TAPE FEED DIRECTION

REEL DIMENSIONS

NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. (ordered as IRF6643TRPBF). For 1000 parts on 7" reel, order IRF6643TR1PBF

STANDARD OPTION (QTY 4800)

MIN

330.0

20.2

12.8

1.5

100.0 N.C

12.4

11.9

CODE A B C D E F G H

MAX N.C N.C

13.2 N.C N.C

18.4

14.4

15.4

MIN

12.992

0.795

0.504

0.059

3.937 N.C

0.488

0.469

MAX N.C N.C

0.520 N.C N.C

0.724

0.567

0.606

METRIC

IMPERIAL

TR1 OPTION (QTY 1000)

IMPERIAL

MIN

6.9

0.75

0.53

0.059

2.31

N.C

0.47

MAX N.C N.C

12.8 N.C N.C

13.50

12.01

MIN

177.77

19.06

13.5

1.5

58.72 N.C

11.9

METRIC

MAX N.C N.C

0.50 N.C N.C

0.53 N.C N.C