Datasheet irf6609 Datasheet

Pulsed Drain C

c

P

g

P

g

J

fj

J

gj

J

hj

J

ij

PD - 95822

IRF6609

HEXFET® Power MOSFET

l Low Conduction Losses l Low Switching Losses l Ideal Synchronous Rectifier MOSFET l Low Profile (<0.7 mm) l Dual Sided Cooling Compatible l Compatible with existing Surface Mount

V

20V

DSS

R

DS(on)

max

2.0mΩ@VGS = 10V

2.6mΩ@VGS = 4.5V

Qg

46nC

Techniques

MT

Applicable DirectFET Outline and Substrate Outline (see p.8,9 for details)

SQ SX ST MQ MX MT

DirectFET ISOMETRIC

Description

The IRF6609 combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance in a package that has the footprint of an SO-8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, IMPROVING previous best thermal resistance by 80%.

The IRF6609 balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors operating at higher frequencies. The IRF6609 has been optimized for parameters that are critical in synchronous buck operating from 12 volt buss converters including Rds(on), gate charge and Cdv/dt-induced turn on immunity. The IRF6609 offers particularly low Rds(on) and high Cdv/dt immunity for synchronous FET applications.

Absolute Maximum Ratings

V

DS

V

GS

I

@ TC = 25°C

D

I

@ TA = 25°C

D

I

@ TA = 70°C

D

I

DM

PD @TA = 25°C PD @TA = 70°C P

@TC = 25°C

D

T

J

T

STG

Parameter Units

Drain-to-Source Voltage V Gate-to-Source Voltage Continuous Drain Current, V Continuous Drain Current, V Continuous Drain Current, V

urrent ower Dissipation ower Dissipation

Power Dissipation Linear Derating Factor W/°C

Operating Junction and °C Storage Temperature Range

@ 10V

GS

@ 10V

GS

@ 10V

GS

Max.

20

±20

150

31 25

250

2.8

1.8 89

0.022

-40 to + 150

A

W

Thermal Resistance

R

θJA

R

θJA

R

θJA

R

θJC

R

θJ-PCB

unction-to-Ambient unction-to-Ambient unction-to-Ambient unction-to-Case

Junction-to-PCB Mounted 1.0 –––

Notes  through  are on page 10

Parameter Typ. Max. Units

––– 45

12.5 ––– 20 ––– °C/W

––– 1.4

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2/13/04

IRF6609

/

Static @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units

BV

DSS

∆ΒV

DSS

R

DS(on)

V

GS(th)

∆V

GS(th)

I

DSS

I

GSS

gfs Forward Transconductance 91 ––– ––– S Q

g

Q

gs1

Q

gs2

Q

gd

Q

godr

Q

sw

Q

oss

t

d(on)

t

r

t

d(off)

t

f

C

iss

C

oss

C

rss

Drain-to-Source Breakdown Voltage 20 ––– ––– V

∆T

Breakdown Voltage Temp. Coefficient ––– 15 ––– mV/°C

J

Static Drain-to-Source On-Resistance ––– 1.6 2.0

––– 2.0 2.6

Gate Threshold Voltage 1.55 ––– 2.45 V

∆T

Gate Threshold Voltage Coeffici ent ––– -6.1 ––– mV/°C

J

Drain-to-Source Leakage Current ––– ––– 1.0 µA

––– ––– 150 Gate-to-Source Forward Leakage ––– ––– 100 nA Gate-to-Source Reverse Leakage ––– ––– -100

Total Gate Charge ––– 46 69 Pre-Vth Gate-to-Source Charge ––– 15 ––– Post-Vth Gate-to-Sourc e Charge ––– 4.7 ––– nC Gate-to-Drain Charge ––– 15 ––– Gate Charge Overdrive ––– 11 ––– See Fig. 17 Switch Charge (Q

gs2

+ Qgd)

––– 20 ––– Output Charge ––– 26 ––– nC Turn-On Delay Time ––– 24 ––– Rise Time ––– 95 ––– Turn-Off Delay Time ––– 26 ––– ns Fall Time ––– 9.8 ––– Input Capacitance ––– 6290 ––– Output Capacitance ––– 1850 ––– pF Reverse Transfer Capacitance ––– 860 –––

VGS = 0V, ID = 250µA Reference to 25°C, I

mΩ

= 10V, ID = 31A

V

GS

VGS = 4.5V, ID = 25A VDS = VGS, ID = 250µA

= 16V, VGS = 0V

V

DS

= 16V, VGS = 0V, TJ = 150°C

V

DS

V

= 20V

GS

= -20V

V

GS

V

= 10V, ID = 25A

DS

VDS = 10V

= 4.5V

V

GS

I

= 17A

D

= 10V, VGS = 0V

V

DS

= 16V, VGS = 4.5V

V

DD

I

= 25A

D

Clamped Inductive Load

V

= 0V

GS

= 10V

V

DS

ƒ = 1.0MHz

Conditions

= 1mA

D

e

e

Avalanche Characteristics

E

AS

I

AR

Single Pulse Avalanche Energy Avalanche Current

c

d

Parameter Units

Typ.

––– –––

Max.

230

25

mJ

A

Diode Characteristics

Parameter Min. Typ. Max. Units

I

S

I

SM

V

SD

t

rr

Q

rr

Continuous Source Current ––– ––– 31 (Body Diode) A

Pulsed Source Current ––– ––– 250 (Body Diode)

c

Diode Forward Voltage ––– 0.80 1.2 V Reverse Recovery Time ––– 32 48 ns Reverse Recovery Charge ––– 26 39 nC

MOSFET symbol showing the

integral reverse p-n junction diode.

TJ = 25°C, IS = 25A, VGS = 0V

= 25°C, IF = 25A

T

J

di/dt = 100A/µs

Conditions

D

G

S

e

2 www.irf.com

IRF6609

1000

) A

(

t

100

n

e

r

u C e

c

r

10

u

o S

-

o

t

-

n

i

a

r

1

D

,

D

I

2.7V

≤

TOP 10V

BOTTOM 2.7V

60µs PULSE WIDTH

Tj = 25°C

0.1

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

1000.0

)

Α

(

t

100.0

n

e

r

u C e

c

r

u

o S

-

o

t

-

n

i

a

r D

,

D

I

TJ = 150°C

10.0

TJ = 25°C

1.0

V

= 10V

DS

≤

0.1

2.0 3.0 4.0 5.0

60µs PULSE WIDTH

VGS, Gate-to-Source Voltage (V)

VGS

7.0V

4.5V

4.0V

3.5V

3.2V

2.9V

) A

(

t

n

e

r

u C e

c

r

u

o S

-

o

t

-

n

i

a

r D

, I

D

1000

100

TOP 10V

BOTTOM 2.7V

10

2.7V

≤

60µs PULSE WIDTH

VGS

7.0V

4.5V

4.0V

3.5V

3.2V

2.9V

Tj = 150°C

1

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

1.5

e

c

n

a

t

s

i

s

e R n O

)

e

d

c

e

r

z

u

i

l

o

a

S

-

m

r

o

t

o

-

n

N

i

(

a

r D

,

)

n

o

( S D

R

ID = 31A V

= 10V

GS

1.0

0.5

-60 -40 -20 0 20 40 60 80 100 120 140 160

TJ , Junction Temperature (°C)

Fig 3. Typical Transfer Characteristics

Fig 4. Normalized On-Resistance

vs. Temperature

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IRF6609

100000

) F

10000

p

( e

c

n

a

t

i

c

a

p

a C

1000

, C

100

1 10 100

V

= 0V, f = 1 MHZ

GS

C

= C

gs gd ds

Ciss

Coss

Crss

+ Cgd, C

+ C

iss

C

rss

C

oss

VDS, Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance vs.

Drain-to-Source Voltage

1000.0

) A

(

t

100.0

n

e

r

u C n

i

a

r

10.0

D e

s

r

e

v

e R

,

1.0

D S

I

0.1

TJ = 150°C

TJ = 25°C

0.0 0.4 0.8 1.2 1.6 2.0 VSD, Source-to-Drain Voltage (V)

12

SHORTED

ds

gd

) V

( e

g

a

t

l

o V

e

c

r

u

o S

-

o

t

-

e

t

a G

, V

ID= 17A

10

8

6

4

S G

2

0

0 20 40 60 80 100 120

Q

VDS= 20V VDS= 10V

Total Gate Charge (nC)

G

Fig 6. Typical Gate Charge vs.

Gate-to-Source Voltage

V

GS

= 0V

1000

) A

(

t

100

n

e

r

u C e

c

r

u

10

o S

-

o

t

-

n

i

a

r D

1

,

D

I

Tc = 25°C Tj = 150°C Single Pulse

0.1 0 1 10 100

V

OPERATION IN T HIS AREA LIMITED BY RDS(on)

, Drain-toSource Voltage (V)

DS

100µsec

1msec

10msec

Fig 7. Typical Source-Drain Diode

Fig 8. Maximum Safe Operating Area

Forward Voltage

4 www.irf.com

IRF6609

τ

150

120

) A

(

t

n

e

90

r

u C n

i

a

r

60

D

,

D

I

30

0

25 50 75 100 125 150

TJ , Junction Temperature (°C)

Fig 9. Maximum Drain Current vs.

Case Temperature

100

2.5

) V

( e

g

a

t

l

o

2.0

V d

l

o

h

s

e

r

h

t e

t

a

1.5

G

)

h

t

( S G

V

1.0

-75 -50 -25 0 25 50 75 100 125 150

ID = 250µA

TJ , Temperature ( °C )

Fig 10. Threshold Voltage vs. Temperature

D = 0.50

)

A

J

h

t

Z (

e

s

n

o

p

s

e R

l

a m

r

e

h T

10

1

0.1

0.01

0.001

0.20

0.10

0.05

0.02

0.01

SINGLE PULSE ( THERMAL RESPONSE )

τ

J

τ

J

τ

1

τ

1

Ci= τi/Ri

R

1

2

R

1

τ

2

τ

3

R

2

3

τ

3

τ

2

3

Ri (°C/W) τi (sec)

4

R

4

0.6784 0.00086

τ

C

τ

17.299 0.57756

4

τ

4

17.566 8.94

9.4701 106

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthja + Tc

0.0001 1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10 100

t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient

www.irf.com 5

IRF6609

A

)

Ω

10

m

( e

c

n

a

t

8

s

i

s

e R n

6

O e

c

r

u

o S

4

o

t

-

n

i

a

r D

2

,

)

n

o

(

S

0

D

R

2.0 4.0 6.0 8.0 10.0

VGS, Gate-to-Source Voltage (V)

ID = 31A

TJ = 125°C

TJ = 25°C

1000

)

J m

( y

g

800

r

e

n E

e

h

c

600

n

a

l

a

v A

e

400

s

l

u P

e

l

g

n

i

200

S

, S A

E

0

25 50 75 100 125 150

Starting TJ, Junction Temperature (°C)

I

TOP

11A

14A

BOTTOM

25A

D

Fig 12. On-Resistance Vs. Gate Voltage

15V

DRIVER

+

-

V

DD

R

V

20V

V

DS

G

GS

L

D.U.T

I

AS

0.01

t

p

Ω

Fig 13a. Unclamped Inductive Test Circuit

V

(BR)DSS

t

p

I

AS

Fig 13b. Unclamped Inductive Waveforms

Fig 13c. Maximum Avalanche Energy

Vs. Drain Current

L

V

DS

V

GS

Pulse Width < 1µs

Duty Factor < 0.1%

D

D.U.T

Fig 14a. Switching Time Test Circuit

V

DS

90%

10%

V

GS

t

d(on)

t

r

t

d(off)

t

f

Fig 14b. Switching Time Waveforms

+

-

V

DD

6 www.irf.com

IRF6609





Reverse Recovery Current

Driver Gate Drive

P.W.

D.U.T. ISDWaveform

D.U.T. VDSWaveform

Inductor Curent

* V

GS

D.U.T

+

-

R

G

+



Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

-

• Low Leakage Inductance Current Transformer



-

• dv/dt controlled by R

• Driver same type as D.U.T.

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

G

+

V

DD

Re-Applied Voltage

+

-

Period

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

= 5V for Logic Level Devices

D =

P.W.

Period

VGS=10V

V

DD

I

SD

*

Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET® Power MOSFETs

Current Regulator

Same Type as D.U.T.

Vds

Vgs

50KΩ

12V

.2µF

.3µF

D.U.T.

+

V

DS

-

Vgs(th)

V

GS

3mA

I

G

Current Sampling Resistors

Fig 16. Gate Charge Test Circuit

I

D

Qgs1

Qgs2 Qgd Qgodr

Fig 17. Gate Charge Waveform

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Id

IRF6609

DirectFET Outline Dimension, MT Outline (Medium Size Can, T-Designation).

Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.

8 www.irf.com

IRF6609

DirectFET Substrate and PCB Layout, MT Outline (Medium Size Can, T-Designation).

Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.

1- Drain 2- Drain 3- Source 4- Source 5- Gate 6- Drain

6

3

1

5

7

4

2

7- Drain

DirectFET Tape & Reel Dimension (Showing component orientation).

NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. (ordered as IRF6618). For 1000 parts on 7" reel, order IRF6618TR1

STANDARD OPTION (QTY 4800)

METRIC

CODE

MIN

A

330.0

B

20.2

C

12.8

D

1.5

E

100.0

F

N.C

G

12.4

H

11.9

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MAX N.C N.C

13.2 N.C N.C

18.4

14.4

15.4

REEL DIMENSIONS

IMPERIAL

MIN

MAX

12.992

N.C

0.795

N.C

0.504

0.520

0.059

N.C

3.937

N.C

0.724

0.488

0.567

0.469

0.606

TR1 OPTION (QTY 1000)

METRIC IMPERIAL

MIN

MAX

177.77

N.C

19.06

N.C

13.5

12.8

1.5

N.C

58.72

N.C

13.50

11.9

12.01

11.9

12.01

MIN

6.9

0.75

0.53

0.059

2.31 N.C

0.47

MAX N.C N.C

0.50 N.C N.C

0.53 N.C N.C

IRF6609

DirectFET Part Marking

Notes:

 Repetitive rating; pulse width limited by

max. junction temperature.

 Starting T

RG = 25Ω, I

= 25°C, L = 0.75mH,

J

= 25A.

AS

 Pulse width ≤ 400µs; duty cycle ≤ 2%.  Surface mounted on 1 in. square Cu board.

 Used double sided cooling , mounting pad.  Mounted on minimum footprint full size board with metalized

back and with small clip heatsink.

 T

measured with thermal couple mounted to top (Drain) of

C

part.

 R

is measured at T

θ

of approximately 90°C.

J

Data and specifications subject to change without notice.

This product has been designed and qualified for the Consumer market.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information.1/04

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