Page 1
IRF640
IRF640FP
N - CHANNEL 200V - 0.150Ω - 18A TO-220/TO-220FP
MESH OVERLAY MOSFET
TYPE V
IRF640
IRF640FP
■ TYPICALR
■ EXTREMELY HIGH dV/dt CAPABILITY
■ VERYLOW INTRINSIC CAPACITANCES
■ GATECHARGE MINIMIZED
DS(on)
DSS
200 V
200 V
= 0.150
DESCRIPTION
This power MOSFET is designed using he
company’sconsolidatedstrip layout-based MESH
OVERLAYprocess. This technology matches
and improves the performances compared with
standardpartsfrom varioussources.
APPLICATIONS
■ HIGHCURRENT SWITCHING
■ UNINTERRUPTIBLE POWER SUPPLY (UPS)
■ DC/DC COVERTERSFOR TELECOM,
INDUSTRIAL,AND LIGHTING EQUIPMENT.
R
DS(on)
<0.18Ω
<0.18
Ω
Ω
I
D
18 A
18 A
3
2
1
TO-220 TO-220FP
INTERNAL SCHEMATIC DIAGRAM
3
2
1
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
IRF 640 IRF640F P
V
V
V
I
DM
P
dv/ dt(
V
T
(•) Pulse width limited by safe operating area (1)ISD≤ 18A, di/dt ≤ 300A/µs,VDD≤ V
First Digit of the DatecodeBeing Z or K IdentifiesSiliconCharacterized in this Datasheet
(**)Limited only by Maximum TemperatureAllowed
October 1999
Drain-source Voltage (VGS=0) 200 V
DS
Dra in- gate Voltag e (RGS=20kΩ)
DGR
Gate -source Voltage ± 20 V
GS
Dra in Current (c ontinuous) at Tc=25oC 18 18(**) A
I
D
Dra in Current (c ontinuous) at Tc=100oC 11 11(**) A
I
D
200 V
(•) Dra in Curren t (pu ls ed) 72 72 A
Tot al Dissipation at Tc=25oC 125 40 W
tot
Derating Factor 1.0 0.32 W/
) P eak Diode Rec ov e ry v oltage slope 5 5 V/ns
1
Insulation Withstand Voltage (DC) 2000 V
ISO
St orage Tem pe r ature -65 to 1 50
stg
Max. O p er a ti ng Junct ion T e m pe rat ure 150
T
j
(BR)DSS
,Tj≤T
JMAX
o
C
o
C
o
C
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Page 2
IRF640/FP
THERMAL DATA
TO-220 TO-220FP
R
thj-case
R
thj-amb
R
thc-sink
T
AVALANCHE CHARACTERISTICS
Symbol Para meter Max Val ue Uni t
I
AR
E
Ther mal Resist ance Junction- c as e Max 1.0 3.12
Ther mal Resist ance Junction- am b ien t Max
Thermal Resistance Case-sink Typ
Maximum Le ad T emperat u r e F o r Soldering Purpose
l
Avalanche Cu r rent, Repetitive or No t -Repetit iv e
(pulse width limite d by T
Single Pu lse Avalanche Energy
AS
(starting T
=25oC, ID=IAR,VDD=50V)
j
max)
j
62.5
0.5
300
18 A
280 mJ
o
C/W
o
C/W
o
C/W
o
C
ELECTRICAL CHARACTERISTICS
=25oC unless otherwisespecified)
(T
case
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-sourc e
=250µAVGS=0
I
D
200 V
Break d own Vo lt age
I
I
DSS
GSS
Zero Gate Voltage
Drain Curr ent (V
GS
Gat e- b ody Leaka ge
Current (V
DS
=0)
=0)
V
=MaxRating
DS
= Max Rating Tc=125oC
V
DS
=± 20 V
V
GS
1
10
± 100 nA
ON(∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
Gate Threshold
V
DS=VGSID
= 250µA
234V
Voltage
R
DS(on)
Static Drain-source On
VGS=10V ID= 9 A 0.15 0.18 Ω
Resistanc e
I
D(on)
On State Drain Cu r rent VDS>I
D(on)xRDS(on)max
18 A
VGS=10V
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
(∗)Forward
fs
Tr ansconductanc e
C
C
C
Input Capacitanc e
iss
Out put Ca pacita nce
oss
Reverse T ransfer
rss
Capacitance
VDS>I
D(on)xRDS(on)maxID
=9A 7 11 S
VDS=25V f=1MHz VGS= 0 1200
200
60
1560
260
80
µ
µA
pF
pF
pF
A
2/9
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IRF640/FP
ELECTRICAL CHARACTERISTICS
(continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
Turn-on Time
r
Rise T ime
t
VDD= 100 V ID=9A
R
=4.7
G
Ω
VGS=10V
13
27
17
35
(see te st circuit, figure 3)
Q
Q
Q
Total Gate Charge
g
Gat e- Source Charge
gs
Gate-Drain Ch arge
gd
VDD= 160 V ID=18A VGS= 1 0V 55
10
21
72 nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
r(Voff)
t
t
Off -voltage R ise T ime
Fall Time
f
Cross-ov er T ime
c
VDD= 160 V ID=18A
=4.7 ΩVGS=10V
R
G
(see te st circuit, figure 5)
21
25
50
27
32
65
SOURCEDRAINDIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safeoperating area
Source-drain C urr ent
(•)
Source-drain C urr ent
18
72
(pulsed)
(∗) For ward On Voltage ISD=18A VGS=0 1.5 V
Reverse Rec o very
rr
Time
Reverse Rec o very
rr
= 18 A di / dt = 100 A /µs
I
SD
=50V Tj= 150oC
V
DD
(see te st circuit, figure 5)
240
1.8
Charge
Reverse Rec o very
15
Current
ns
ns
nC
nC
ns
ns
ns
A
A
ns
µ
A
C
SafeOperating Area for TO-220 SafeOperating Area for TO-220FP
3/9
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IRF640/FP
ThermalImpedancefor TO-220
OutputCharacteristics
ThermalImpedance for TO-220FP
TransferCharacteristics
Transconductance
4/9
Static Drain-sourceOn Resistance
Page 5
IRF640/FP
Gate Charge vs Gate-sourceVoltage
Normalized GateThresholdVoltage vs
Temperature
CapacitanceVariations
Normalized On Resistance vsTemperature
Source-drainDiode ForwardCharacteristics
5/9
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IRF640/FP
Fig. 1:
UnclampedInductive Load TestCircuit
Fig. 3: SwitchingTimes Test CircuitsFor
ResistiveLoad
Fig. 2:
UnclampedInductive Waveform
Fig. 4: Gate Chargetest Circuit
Fig. 5:
Test Circuit For InductiveLoad Switching
And Diode Recovery Times
6/9
Page 7
TO-220 MECHANICAL DATA
IRF640/FP
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
mm inch
E
A
L4
D
F2
F1
G1
H2
G
F
P011C
C
D1
L2
Dia.
L5
L7
L6
L9
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IRF640/FP
TO-220FP MECHANICAL DATA
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
B 2.5 2.7 0.098 0.106
D 2.5 2.75 0.098 0.108
E 0.45 0.7 0.017 0.027
F 0.75 1 0.030 0.039
F1 1.15 1.7 0.045 0.067
F2 1.15 1.7 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409
L2 16 0.630
L3 28.6 30.6 1.126 1.204
L4 9.8 10.6 0.385 0.417
L6 15.9 16.4 0.626 0.645
L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126
mm inch
E
A
D
B
L3
L6
L7
¯
F1
F
G1
H
G
F2
123
L2
L4
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IRF640/FP
Information furnishedis believed to be accurateand reliable.However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specificationmentioned in this publicationare
subjecttochange without notice.This publication supersedesand replaces all information previously supplied.STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The STlogo is a trademark of STMicroelectronics
1999 STMicroelectronics – Printed in Italy – All Rights Reserved
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