Page 1
S
D
G
PD - 95342
Document Number: 91033
www.vishay.com
1
IRF634NPbF
IRF634NSPbF
l Advanced Process Technology
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
l Ease of Paralleling
l Simple Drive Requirements
l Lead-Free
HEXFET® Power MOSFET
Description
Fifth Generation HEXFET® Power MOSFETs from International
Rectifier utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized device
design that HEXFET Power MOSFETs are well known for,
provides the designer with an extremely efficient and reliable
device for use in a wide variety of applications.
The TO-220 package is universally preferred for all commercialindustrial applications at power dissipation levels to
approximately 50 watts. The low thermal resistance and low
package cost of the TO-220 contribute to its wide acceptance
throughout the industry.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the highest
power capability and the lowest possible on-resistance in any
existing surface mount package. The D2Pak is suitable for high
current applications because of its low internal connection
resistance and can dissipate up to 2.0W in a typical surface
mount application.
The through-hole version (IRF634NL) is available for lowprofile application.
TO-220AB
IRF634N
IRF634NS
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 8.0
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 5.6 A
I
DM
PD @TC = 25°C Power Dissipation 88 W
PD @TA = 25°C Power Dissipation 3.8
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 7.3 V/ns
T
J
T
STG
Pulsed Drain Current 32
Linear Derating Factor 0.59 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche Energy 110 mJ
Avalanche Current 4.8 A
Repetitive Avalanche Energy 8.8 mJ
Operating Junction and -55 to +175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)
IRF634NLPbF
V
DSS
R
DS(on)
ID = 8.0A
D2Pak
= 250V
= 0.435Ω
TO-262
IRF634NL
°C
05/28/04
Page 2
IRF634N/S/LPbF
S
D
G
S
D
Document Number: 91033
www.vishay.com
2
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage 250 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.33 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance ––– ––– 0.435 Ω VGS = 10V, ID = 4.8A
Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
Forward Transconductance 5.4 ––– ––– S VDS = 50V, ID = 4.8A
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage ––– ––– 100 V
Gate-to-Source Reverse Leakage ––– ––– -100
––– ––– 25
––– ––– 250 VDS = 200V, VGS = 0V, TJ = 150°C
µA
nA
= 250V, VGS = 0V
V
DS
= 20V
GS
VGS = -20V
Total Gate Charge ––– ––– 34 ID = 4.8A
Gate-to-Source Charge ––– ––– 6.5 nC VDS = 200V
Gate-to-Drain ("Miller") Charge ––– ––– 16 VGS = 10V, See Fig. 6 and 13
Turn-On Delay Time ––– 8.4 ––– VDD = 125V
Rise Time ––– 16 ––– ID = 4.8A
Turn-Off Delay Time ––– 28 ––– RG = 1.3Ω
ns
Fall Time ––– 15 ––– VGS = 10V, See Fig. 10
4.5
Internal Drain Inductance
Internal Source Inductance ––– –––
––– –––
7.5
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
Input Capacitance ––– 620 ––– VGS = 0V
Output Capacitance ––– 84 ––– VDS = 25V
Reverse Transfer Capacitance ––– 23 ––– pF ƒ = 1.0MHz, See Fig. 5
G
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
8.0
32
showing the
A
p-n junction diode.
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 4.8A, VGS = 0V
Reverse Recovery Time ––– 130 200 ns TJ = 25°C, IF = 4.8A
Reverse Recovery Charge ––– 650 980 nC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θCS
R
θJA
R
θJA
Junction-to-Case ––– 1.7
Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
Junction-to-Ambient ––– 62
Junction-to-Ambient (PCB mount) ––– 40
Page 3
IRF634N/S/LPbF
Document Number: 91033
www.vishay.com
3
100
10
1
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
4.5V
0.1
D
I , Drain-to-Source Current (A)
20µs PULSE WIDTH
°
T = 25 C
0.01
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
100
J
100
10
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
4.5V
1
D
I , Drain-to-Source Current (A)
20µs PULSE WIDTH
°
T = 175 C
0.1
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
J
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.5
I =
D
7.9A
°
T = 175 C
10
J
1
D
I , Drain-to-Source Current (A)
0.1
4.0 5.0 6.0 7.0 8.0 9.0
V , Gate-to-Source Voltage (V)
T = 25 C
J
GS
°
V = 50V
DS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
3.0
2.5
2.0
1.5
(Normalized)
1.0
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature ( C)
J
Fig 4. Normalized On-Resistance
Vs. Temperature
V =
GS
°
10V
Page 4
IRF634N/S/LPbF
Document Number: 91033
www.vishay.com
4
)
F
p
(
e
c
n
a
t
i
c
a
p
a
C
,
C
1200
1000
800
600
400
Ciss
Coss
V
= 0V, f = 1 MHZ
GS
C
= C
iss
gs
C
= C
rss
gd
C
= C
ds
+ C
oss
+ Cgd, C
gd
ds
Crss
200
0
1 10 100 1000
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
10
°
T = 175 C
J
1
T = 25 C
SD
I , Reverse Drain Current (A)
0.1
0.2 0.4 0.6 0.8 1.0 1.2
V ,Source-to-Drain Voltage (V)
SD
J
SHORTED
°
V = 0 V
GS
20
I =
4.8A
D
V = 200V
DS
V = 125V
DS
V = 50V
DS
V , Gate-to-Source Voltage (V)
GS
16
12
8
4
FOR TEST CIRCUIT
0
0 10 20 30 40
Q , Total Gate Charge (nC)
G
SEE FIGURE
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
)
A
(
t
n
e
r
r
10
u
C
e
c
r
u
o
S
o
t
n
1
i
a
r
D
,
D
Tc = 25°C
I
Tj = 175°C
Single Pulse
0.1
1 10 100 1000
OPERATION IN THIS AREA
LIMITED BY RDS(on)
V
, Drain-toSource Voltage (V)
DS
13
100µsec
1msec
10msec
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 8. Maximum Safe Operating Area
Page 5
V
9
1
V
+
-
1
10.0
Document Number: 91033
www.vishay.com
5
8.0
IRF634N/S/LPbF
R
V
DS
V
GS
R
G
D
D.U.T.
V
DD
6.0
4.0
D
I , Drain Current (A)
2.0
0.0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
thJC
1
D = 0.50
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
DS
0%
0%
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
0.20
0.10
0.05
0.1
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
Thermal Response (Z )
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
0.01
0.00001 0.0001 0.001 0.01 0.
t , Rectangular Pulse Duration (sec)
1
J DM thJC C
1 2
P
DM
t
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Page 6
IRF634N/S/LPbF
V
S
Current Regulator
I
A
Document Number: 91033
www.vishay.com
6
15V
DRIVER
+
V
DD
-
R
G
V
20V
V
DS
GS
L
D.U.T
I
AS
Ω
0.01
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
AS
Fig 12b. Unclamped Inductive Waveforms
200
TOP
160
120
80
40
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting T , Junction Temperature ( C)
J
BOTTOM
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
D
2.0A
3.4A
4.8A
°
Q
G
10 V
Q
GS
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
+
V
D
-
I
D
Fig 13b. Gate Charge Test Circuit
Page 7
IRF634N/S/LPbF
R
V
+
-
Document Number: 91033
www.vishay.com
7
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
-
R
G
Driver Gate Drive
P.W.
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
• dv/dt controlled by R
• Driver same type as D.U.T.
G
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Period
D =
Period
P. W .
+
V
DD
VGS=10V
*
Reverse
Recovery
Current
e-Applied
oltage
D.U.T. ISDWaveform
Body Diode Forward
Current
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
* V
= 5V for Logic Level Devices
GS
di/dt
Diode Recovery
dv/dt
V
DD
I
SD
Fig 14. For N-Channel HEXFET® Power MOSFETs
Page 8
IRF634N/S/LPbF
K
R
Document Number: 91033
www.vishay.com
8
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (.555)
13.47 (.530)
1.40 (.055)
3X
1.15 (.045)
2.54 (.100)
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
2X
10.29 (.405)
4
1 2 3
3X
3.78 (.149)
3.54 (.139)
- A -
6.47 (.255)
6.10 (.240)
1.15 (.045)
MIN
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
0.36 (.014) M B A M
4.69 (.185)
4.20 (.165)
- B -
1.32 (.052)
1.22 (.048)
2.92 (.115)
2.64 (.104)
HEXFET
1- GATE
2- DRAIN
3- SOURCE
4- DRAIN
3X
LEAD ASSIGNMENTS
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURC E
4 - DRAIN
0.55 (.022)
0.46 (.018)
IGBTs, CoPAC
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
TO-220AB Part Marking Information
EXAMPLE:
THIS IS AN IRF1010
LOT CODE 1789
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
Note: "P" in assembly line
position indicates "Lead-Free"
INT ERNATI ONAL
RECTIFIER
ASSEMBLY
LOT CODE
LOGO
PART NUMBE
DATE CODE
YE AR 7 = 1997
WEEK 19
LINE C
Page 9
2
R
Document Number: 91033
www.vishay.com
9
D
Pak Package Outline
Dimensions are shown in millimeters (inches)
IRF634N/S/LPbF
D2Pak Part Marking Information
THIS IS AN IRF 530S WITH
LOT CO D E 8024
ASSEMBLED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
Note: "P" in ass embly line
position indi cates "Lead-F ree"
OR
INTE RNATIONAL
RE CTIFIER
LOGO
ASSEMBLY
LO T CODE
F530S
INT ER NAT IONAL
RECTIFIER
LOGO
AS S E MB LY
LOT CODE
PART NUMB E R
DATE CODE
P = DESIGNATES LEAD-FREE
PROD UCT (O PTIO NAL)
YEAR 0 = 2000
WEEK 02
A = ASSEMBLY SITE CODE
F530S
PAR T NUMBE
DATE CODE
YEAR 0 = 2000
WE E K 02
LINE L
Page 10
IRF634N/S/LPbF
Document Number: 91033
www.vishay.com
10
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXAMPLE:
THI S I S AN IRL 3103L
L OT CODE 1789
ASS EMBLED ON WW 19, 1997
IN THE ASSE MBLY LINE "C"
No te: "P" in assembly line
pos iti on indi cates "L ead-F ree"
INTERNATIONAL
OR
INTERNATIONAL
RECTIFIER
LOGO
AS S E MB L Y
LOT C ODE
RECTIFIE R
LOGO
ASSEMBLY
LOT C ODE
PART NUMBER
DA TE CODE
YEAR 7 = 1997
WEE K 19
LINE C
PART NUMBER
DATE CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 7 = 1997
WEEK 19
A = AS S E MB L Y S IT E CO DE
Page 11
D2Pak Tape & Reel Infor-
TRR
F
F
)
)
)
Document Number: 91033
www.vishay.com
11
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
EED DIRECTION
TRL
EED DIRECTION
1.85 (.073)
1.65 (.065)
10.90 (.42 9)
10.70 (.42 1)
11.60 (.457)
11.40 (.449)
16.10 (.634)
15.90 (.626)
1.60 ( .063)
1.50 ( .059)
1.75 (.069)
1.25 (.049)
15.42 (.60 9)
15.22 (.60 1)
0.368 (.01 45)
0.342 (.01 35)
24.30 ( .957
23.90 ( .941
4.72 (.136)
4.52 (.178)
IRF634N/S/LPbF
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
27.40 (1.079)
23.90 (.941)
4
26.40 (1.039)
24.40 (.961)
3
60.00 (2.362
MIN.
30.40 (1.197)
MAX.
4
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting T
RG = 25Ω, I
This is applied to D
For recommended footprint and soldering techniques refer to application note #AN-994.
= 25°C, L = 9.5mH
J
= 4.8A,VGS=10V
AS
2
Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).
Pulse width ≤ 400µs; duty cycle ≤ 2%.
This is only applied to TO-220A package
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] (IRF634N),
Qualification Standards can be found on IR’s Web site.
Industrial (IRF634NS and IRF634NL)
market.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
05/04
Page 12
Legal Disclaimer Notice
Vishay
Notice
The products described herein were acquired by Vishay Intertechnology, Inc., as part of its acquisition of
International Rectifier’s Power Control Systems (PCS) business, which closed in April 2007. Specifications of the
products displayed herein are pending review by Vishay and are subject to the terms and conditions shown below.
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or
anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.
International Rectifier
are registered trademarks of International Rectifier Corporation in the U.S. and other countries. All other product
names noted herein may be trademarks of their respective owners.
®
, IR®, the IR logo, HEXFET®, HEXSense®, HEXDIP®, DOL®, INTERO®, and POWIRTRAIN
®
Document Number: 99901 www.vishay.com
Revision: 12-Mar-07 1
Loading...