Datasheet IRF550A Datasheet (Fairchild Semiconductor)

Page 1
Advanced Power MOSFET
IRF550A
FEATURES
Avalanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitance Improved Gate Charge Extended Safe Operating Area
Ο
175 Operating Temperature
C
Lower Leakage Current : 10 A (Max.) @ VDS = 100V Lower R
: 0.032 (Typ.)
DS(ON)
Ω
µ
Absolute Maximum Ratings
Characteristic Value UnitsSymbol
Drain-to-Source Voltage Continuous Drain Current (T Continuous Drain Current (T
=25 )
C
=100 )
C
Ο
C
Ο
C
Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (T
=25 )
C
Ο
C
Linear Derating Factor Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8” from case for 5-seconds
T
V
DSS
I
D
I
DM
V E
I
AR
E
dv/dt
P
, T
J
T
GS
AS
AR
D
STG
L
O O
O O O
BV R I
= 100 V
DSS
DS(on)
= 40 A
D
= 0.04
Ω
TO-220
1
2
3
1.Gate 2. Drain 3. Source
100
40
28.3
1
2
1 1
3
160
+
_
640
16.7
6.5
20
40
167
1.11
- 55 to +175
300
V A A
V
mJ
A
mJ
V/ns
W
W/
Ο
C
Ο
C
Thermal Resistance
R
JC
θ
R
CS
θ
R
θ
JA
©1999 Fairchi ld Semiconduc tor Corpor ation
Characteristic Max. UnitsSymbol Typ.
Junction-to-Case
Case-to-Sink
Junction-to-Ambient
--
0.5
--
0.9
--
62.5
Ο
C
/W
Rev. B
Page 2
IRF550A
Electrical Characteristics (T
Ο
=25 unless otherwise specified)
C
C
N-CHANNEL
POWER MOSFET
BV
∆ ∆
BV/ T
V
GS(th)
I
I
R
DS(on)
C
C
C
t
d(on)
t
d(off)
Q Q
DSS
GSS
DSS
g
iss
oss
rss
t
t
Q
CharacteristicSymbol
Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff.
J
Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse
Drain-to-Source Leakage Current
Static Drain-Source On-State Resistance Forward Transconductance
fs
Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time
r
Turn-Off Delay Time Fall Time
f
Total Gate Charge
g
Gate-Source Charge
gs
Gate-Drain(“Miller”) Charge
gd
100
--
2.0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
Max. UnitsTyp.Min. Test Condition
V
--
0.11
--
--
--
--
--
--
27.44 1750
420 185
17 20 80 45 75
13.2
34.8
--
--
4.0
100
-100 10
100
0.04
--
2270
485 215
50 50
160 100
97
--
--
V/
nA
µ
pF
ns
nC
V
Ο
V
A
Ω
Ω
=0V,ID=250 A
GS
I
=250 A See Fig 7
C
D
V
=5V,ID=250 A
DS
V
=20V
GS
V
=-20V
GS
V
=100V
DS
V
=80V,TC=150
DS
=10V,ID=20A
V
GS
=40V,ID=20A
V
DS
=0V,VDS=25V,f =1MHz
V
GS
See Fig 5
V
=50V,ID=40A,
DD
=6.2
R
G
See Fig 13
V
=80V,VGS=10V,
DS
I
=40A
D
See Fig 6 & Fig 12
µ
µ
µ
Ο
C
4
O
4
O
Ω
4
5
O
O
4
5
O
O
Source-Drain Diode Ratings and Characteristics
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
I
I
SM
V
t
Q
Notes ;
Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
1
O
2
L=0.6mH, I
O
3
I
O
SD
Pulse Test : Pulse Width = 250 s, Duty Cycle 2%
4
O
Essentially Independent of Operating Temperature
5
O
Continuous Source Current
S
Pulsed-Source Current Diode Forward Voltage
SD
Reverse Recovery Time
rr
Reverse Recovery Charge
rr
=40A, VDD=25V, RG=27 , Starting TJ =25
AS
_
µ
40A, di/dt 470A/ s, VDD BV
_
<
<
_
<
µ
Ω
, Starting TJ =25
DSS
O O
_
<
40
--
--
1
--
4
--
--
--
o
C
o
C
--
--
135
0.65
160
1.6
--
--
Integral reverse pn-diode
A
in the MOSFET
V
ns
µ
C
Ο
C
T
=25 ,IS=40A,VGS=0V
J
Ο
C
T
=25 ,IF=40A
J
/dt=100A/ s
di
F
µ
O
4
Page 3
N-CHANNEL
POWER MOSFET
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
V Top : 1 5 V
1 0 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V Bottom : 4.5 V
-1
GS
10
VDS , Drain-Source Voltage [V]
2
10
1
10
, Drain Current [A]
D
I
0
10
10
0
@ Notes :
1. 250
2. T
s Pulse Test
µ
= 25 oC
C
IRF550A
2
10
o
175
C
1
10
25 oC
, Drain Current [A]
D
I
0
1
10
10
2 4 6 8 10
- 55
o
C
VGS , Gate-Source Voltage [V]
@ Notes :
1. V
2. V
3. 250
= 0 V
GS
= 40 V
DS
s Pulse Test
µ
0.06
0.05
]
0.04
Ω
, [
0.03
DS(on)
R
0.02
Drain-Source On-Resistance
0.01
0.00 0 25 50 75 100 125 150 175
VGS = 10 V
ID , Drain Current [A]
3000
C
iss
2000
C
oss
1000
Capacitance [pF]
C
rss
C
= Cgs+ Cgd ( Cds= shorted )
iss
C
= Cds+ C
oss
gd
C
= C
rss
gd
VGS = 20 V
@ Note : TJ = 25 oC
@ Notes :
= 0 V
1. V
GS
2. f = 1 MHz
Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistance vs. Drain Current
2
10
1
10
175 oC
, Reverse Drain Current [A]
DR
I
25 oC
0
10
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
@ Notes :
1. V
= 0 V
GS
2. 250 µs Pulse Test
VSD , Source-Drain Voltage [V]
Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drain-Source Voltage
V
= 20 V
10
5
V
DS
VDS = 80 V
DS
= 50 V
, Gate-Source Voltage [V]
GS
0
0
10
1
10
VDS , Drain-Source Voltage [V]
V
0
0 10 20 30 40 50 60 70 80
QG , Total Gate Charge [nC]
@ Notes : ID =40.0 A
Page 4
IRF550A
Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature
1.2
1.1
3.0
2.5
2.0
POWER MOSFET
N-CHANNEL
1.0
, (Normalized)
DSS
BV
0.9
Drain-Source Breakdown Voltage
0.8
-75 -50 -25 0 25 50 75 100 125 150 175 200
@ Notes :
1. V
2. I
TJ , Junction Temperature [oC]
3
10
2
10
1
10
, Drain Current [A]
D
0
10
I
-1
10
0
10
Operation in This Area is Limited by R
DS(on)
@ Notes :
= 25 oC
1. T
C
2. T
= 175 oC
J
3. Single Pulse
1
10
1 ms
10 ms
DC
VDS , Drain-Source Voltage [V]
100
= 0 V
GS
= 250 µA
D
s
µ
10
10 µs
2
1.5
, (Normalized)
1.0
DS(on)
R
0.5
Drain-Source On-Resistance
0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200
@ Notes :
1. V
2. I
TJ , Junction Temperature [oC]
Fig 10. Max. Drain Current vs. Case TemperatureFig 9. Max. Safe Operating Area
50
40
30
20
, Drain Current [A]
D
I
10
0
25 50 75 100 125 150 175
Tc , Case Temperature [oC]
= 10 V
GS
= 20.0 A
D
0
10
D=0.5
0.2
-1
0.1
10
0.05
0.02
0.01
(t) , Thermal Response
JC
-2
θ
10
Z
-5
10
single pulse
-4
10
t1 , Square Wave Pulse Duration [sec]
Fig 11. Thermal Response
@ Notes :
1. Z
2. Duty Factor, D=t
3. TJM-TC=PDM*Z
P
DM
-3
10
-2
10
-1
10
(t)=0.9 oC/W Max.
JC
θ
JC
θ
t
1
t
2
0
10
(t)
1/t2
1
10
Page 5
N-CHANNEL
POWER MOSFET
IRF550A
Fig 12. Gate Charge Test Circuit & Waveform
10V
“ Current Regulator
200nF12V
3mA
Current Sampling (IG)
V
R
G
50K
”
Same Type
Ω
300nF
V
GS
as DUT
V
GS
Q
10V
V
DS
Q
gs
g
Q
gd
DUT
R
1
Resistor
Fig 13. Resistive Switching Test Circuit & Waveforms
V
out
in
DUT
R
2
Current Sampling (ID)
Resistor
R
L
V
DD
( 0.5 rated V
Charge
V
out
90%
)
DS
10%
V
in
t
d(on)tr
t
on
t
d(off)
t
f
t
off
Vary tp to obtain required peak I
10V
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BV
L
DUT
L
BV
I
D
C
V
DD
DSS
I
AS
V
DD
V
DS
D
R
G
t
p
E
= LL I
AS
----
1 2
2
AS
(t)
I
D
t
p
DSS
-------------------­BV
-- V
DSS
DD
Time
V
(t)
DS
Page 6
IRF550A
N-CHANNEL
POWER MOSFET
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
VV
V
GS
( Driver )
DUT
+
V
DS
--
I
S
L
V
GS
GS
Driver
R
G
D =
Same Type
as DUT
• dv/dt controlled by “RG”
• I
controlled by Duty Factor “D”
S
Gate Pulse Width
-------------------------­Gate Pulse Period
V
DD
10V
I
S
( DUT )
V
DS
( DUT )
IFM , Body Diode Forward Current
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
f
Body Diode
Forward Voltage Drop
di/dt
V
DD
Page 7
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ CoolFET™ CROSSVOLT™ E2CMOS
TM
FACT™ FACT Quiet Series™
®
FAST FASTr™ GTO™ HiSeC™
ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 TinyLogic™
UHC™ VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
PRODUCT STA TUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
Formative or In Design
First Production
Full Production
Not In Production
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
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