Datasheet irf540z Datasheet

PD - 94644

g

AUTOMOTIVE MOSFET

IRF540Z

HEXFET® Power MOSFET

Features

O Advanced Process Technology O Ultra Low On-Resistance O Dynamic dv/dt Rating O 175°C Operating Temperature O Fast Switching O Repetitive Avalanche Allowed up to Tjmax

G

Description

Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.

Absolute Maximum Ratings

Parameter Units

ID @ TC = 25°C I

@ TC = 100°C

D

I

DM

PD @TC = 25°C

V

GS

E

AS

E

(tested)

AS

I

AR

E

AR

T

J

T

STG

Conti n uous Drai n Cur r e nt, V Conti n uous Drai n Cur r e nt, V Pulsed Drain Current Maximum Power Dissipation W

Linear D er ating Factor W/°C Gate-to-Source Voltage V

Single Puls e Avalanche Ener gy (Thermal ly Limited) Sin

le Pulse Avala nche Energy Tested Va lu e Avalanche Current Repetitiv e Av alanch e Energy

Operating Junction and °C Stor ag e T e m perature Ra ng e

Soldering Temperature, for 10 seconds Mount ing torq ue , 6- 32 or M3 sc rew

c

@ 10V (Si licon Lim i t e d)

GS

@ 10V (See F i g. 9)

GS

i

h

d

Thermal Resistance

Parameter Typ. Max. Units

R

JC

θ

R

CS

θ

R

JA

θ

Junction-to-Case ––– 1.64 °C/W Case- t o- Sink, F l at, Greased Surf ac e

Junction-to-Ambient ––– 62

HEXFET® is a registered trademark of International Rectifier.

www.irf.com 1

D

V

DSS

R

DS(on)

ID = 34A

S

TO-220AB

Max.

34 24

140

91

0.61

± 20

96

120

See Fig.12a,12b,15,16

-55 to + 175

300 (1. 6m m fr o m case )

10 lbf•in (1.1N•m)

0.50 –––

= 100V

= 29.5mΩ

A

mJ

A

mJ

03/20/03

IRF540Z

/

g

Static @ TJ = 25°C (unless otherwise specified)

V

(BR)DSS

∆ΒV R

DS(on)

V

GS(th)

DSS

Drain-to-Sou r c e Br e akdown Voltage 100 ––– ––– V

∆T

Breakdown Voltage Temp. Coef fi cient ––– 0.088 ––– V/°C

J

Stat ic D r ai n- to-Sou rce On-Res i s tance ––– 23.5 29.5 Gate Thr es h old Voltage 2.0 ––– 4.0 V

fs For ward Transconductance 52 ––– ––– S

I

DSS

GSS

Drain-to-Sou r c e Le akage Current ––– ––– 20 µA

Gate-to-Source Forward Leakage ––– ––– 200 nA

Gate-to-Sou rce Reverse Leaka Q Q Q t t t t L

L

C C C C C C

g gs

gd d(on) r d(off) f

D

S

iss oss rss oss oss oss

eff.

Total Gate Charge ––– 40 61 nC Gate-to-Source Charge ––– 9.6 14 Gate-to-Drain (" M iller") Charge ––– 15 23 Turn-On Delay Time ––– 15 ––– ns Rise Time ––– 53 ––– Turn-Off Delay Time ––– 45 ––– Fall Time ––– 47 ––– Internal Drain Inductance ––– 4.5 ––– nH Between lead,

Internal Source Inducta nce ––– 7.5 ––– from package

Input Capacitance ––– 1800 ––– pF Output Capacitance ––– 170 ––– Reverse Transfer Capacitance ––– 94 – –– Output Capacitance ––– 710 ––– Output Capacitance ––– 110 ––– Effe c tive Out pu t C ap ac itance – –– 180 –––

Parameter Min. Typ. Max. Units

––– ––– 250

e ––– ––– -200

Conditions

VGS = 0V, ID = 250µA Referenc e to 25°C , I V

= 10V, ID = 20A

Ω

m

GS

= VGS, ID = 250µA

V

DS

V

= 25V, ID = 20A

DS

V

= 100V, VGS = 0V

DS

V

= 100V, VGS = 0V, TJ = 125°C

DS

V

= 20V

GS

V

= -20V

GS

I

= 20A

D

VDS = 80V V

GS

V

DD

I

= 20A

D

R

G

V

GS

6mm (0.25in.)

and center of die contact V

GS

V

DS

ƒ = 1.0MHz , See Fig . 5 V

GS

V

GS

VGS = 0V, VDS = 0V to 80V

f

= 10V = 50V

= 12Ω

f

= 10V

= 0V

= 25V

= 0V, VDS = 1.0V, ƒ = 1.0MHz = 0V, VDS = 80V, ƒ = 1. 0M Hz

= 1mA

D

f

D

G

S

Diode Characterist ics

I

S

I

SM

V

SD

t

rr

Q

rr

t

on

Notes:

Contin uous Source Current ––– ––– 34 (Body Diode) A

Pulsed Source Current ––– ––– 140 (Body Diode)

c

Diode Forward Voltage Reverse Recovery Time

Reverse Recovery Charge ––– 82 120 nC Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

 Repetitive rating; pulse width limited by

max. junction temperature. (See fig. 11).

Paramet e r Min. Typ. Max. Units

 Limited by T

RG = 25Ω, I recommended for use above this value.

 I

≤ 20A, di/dt ≤ 400A/µs, V

SD

TJ ≤ 175°C.

, starting TJ = 25°C, L = 0.46mH,

Jmax

= 20A, VGS =10V. Part not

AS

≤ V

DD

(BR)DSS

MOSFET symbol showing the

integral reverse

p-n junct ion diode. ––– ––– 1.3 V –––4263ns

TJ = 25°C, IS = 20A, VGS = 0V

T

= 25°C, IF = 20A, VDD = 50V

J

di/dt = 100A/µs

 Pulse width ≤ 1.0ms; duty cycle ≤ 2%.  C

eff. is a fixed capacitance that gives the same charging time

oss

as C

while V

oss

 Limited by T

avalanche performance.

,

 This value determined from sample failure population. 100%

tested to this value in production.

is rising from 0 to 80% V

DS

, see Fig.12a, 12b, 15, 16 for typical repetitive

Jmax

Conditions

f

.

DSS

G

2 www.irf.com

D

S

f

IRF540Z

) A

(

t

n

e

r

u C e

c

r

u

o S

-

o

t

-

n

i

a

r D

, I

1000

TOP 15V

100

BOTTOM 4.5V

10

1

D

VGS 10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

20µs PULSE WIDTH Tj = 25°C

0.1

0.1 1 10 100

VDS, Drain-to-Source V oltage (V)

1000

) A

(

t

n

e

r

u C e

c

r

u

o S

-

o

t

-

n

i

a

r D

, I

D

1000

100

10

TOP 15V

BOTTOM 4.5V

VGS 10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

20µs PULSE WIDTH Tj = 175°C

1

0.1 1 10 100

VDS, Drain-to-Source V oltage (V)

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

40

)

35

)

Α

(

t

n

e

r

100

r

u C e

c

r

u

o S

-

o

t

-

n

10

i

a

r D

,

D

I

TJ = 25°C

TJ = 175°C

V

= 25V

DS

20µs PULSE WIDTH

1

4 6 8 10 12 14 16

VGS, Gate-to-Source Vol tage (V)

Fig 3. Typical Transfer Characteristics

S

( e

c

30

n

a

t

c

u

25

d

n

o

c

s

20

n

a

r T

d

15

r

a w

r

o

10

F

,

s

f

G

5

TJ = 25°C

TJ = 175°C

0

0 5 10 15 20 25 30 35 40

ID,Drain-to-Source Current (A)

Fig 4. Typical Forward Transconductance

vs. Drain Current

www.irf.com 3

IRF540Z

100000

10000

) F

p

(

e

c

n

a

t

i

1000

c

a

p

a C

, C

100

10

V

= 0V, f = 1 MHZ

GS

C

= C

iss rss oss

oss

= C

gs

gd

ds

C C

C

iss

C

rss

1 10 100

VDS, Drain-to-Source V oltage (V)

Fig 5. Typical Capacitance vs.

Drain-to-Source Voltage

1000

) A

(

t

100

n

e

r

u C n

i

a

r

10

D e

s

r

e

v

e R

,

1

D S

I

0

0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3

TJ = 175°C

VSD, Source-to-Drain V oltage (V)

+ Cgd, C

+ C

gd

TJ = 25°C

SHORTED

ds

V

GS

= 0V

) V

( e

g

a

t

l

o V

e

c

r

u

o S

-

o

t

-

e

t

a G

, V

12.0 ID= 20A

10.0

8.0

6.0

4.0

S G

2.0

0.0 0 1020304050

VDS= 80V VDS= 50V VDS= 20V

Q

Total G ate Charge (nC)

G

Fig 6. Typical Gate Charge vs.

Gate-to-Source Voltage

1000

OPERATION IN THIS AREA

) A

(

t

100

n

e

r

u C e

c

r

u

10

o S

-

o

t

-

n

i

a

r D

1

,

D

Tc = 25°C

I

Tj = 175°C Single Pulse

0.1 1 10 100 1000

LIMITED BY RDS(on)

100µsec

1msec

10msec

VDS, Drain-to-Source V oltage (V)

Fig 7. Typical Source-Drain Diode

Fig 8. Maximum Safe Operating Area

Forward Voltage

4 www.irf.com

IRF540Z

40

35

30

) A

(

t

25

n

e

r

u C

20

n

i

a

r

15

D

,

D

I

10

5

0

25 50 75 100 125 150 175

TC , Case Temper ature (°C)

Fig 9. Maximum Drain Current vs.

Case Temperature

10

3.0

e

c

n

a

t

s

i

s

e R n O e

c

r

u

o S

-

o

t

-

n

i

a

r D

,

)

n

o

( S D

R

ID = 34A V

= 10V

GS

2.5

)

2.0

d

e

z

i

l

a m

r

1.5

o N

(

1.0

0.5

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

TJ , Junction Temperature (° C)

Fig 10. Normalized On-Resistance

vs. Temperature

)

C

1

J

h

t

Z (

e

s

n

o

p

s

e R

l

a m

r

e

h T

0.001

D = 0.50

0.20

0.10

0.1

0.05

0.02

0.01

1E-006 1E-005 0.0001 0.001 0.01 0.1

SINGLE PULSE ( THERMAL RESPONSE )

Notes:

1. Duty factor D = t / t

2. Peak T = P x Z + T

J DM thJC C

1 2

P

DM

t

1

t

2

t1 , Rectangular Pulse Durat ion (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

www.irf.com 5

IRF540Z

A

15V

DRIVER

+

V

DD

-

R

20V

V

DS

G

GS

L

D.U.T

I

AS

Ω

0.01

t

p

Fig 12a. Unclamped Inductive Test Circuit

V

(BR)DSS

t

p

I

AS

Fig 12b. Unclamped Inductive Waveforms

Q

G

10 V

Q

GS

Q

GD

180

)

J m

160

( y

g

r

140

e

n E

e

120

h

c

n

a

l

100

a

v A

80

e

s

l

u P

60

e

l

g

n

i

40

S

,

S

20

A

E

0

25 50 75 100 125 150 175

TOP 8.3A

BOTTOM20A

Starting TJ , Junction Temperature (° C)

Fig 12c. Maximum Avalanche Energy

vs. Drain Current

4.0

I

D

14A

) V

V

G

Charge

Fig 13a. Basic Gate Charge Waveform

Current Regulator

Same Type as D.U.T.

50KΩ

.2µF

12V

V

GS

.3µF

D.U.T.

3mA

I

G

Current Sampling Resistors

+

V

DS

-

I

D

Fig 13b. Gate Charge Test Circuit

( e

g

a

t

l

o

3.0

V d

l

o

h

s

e

r

h

t e

t

a

2.0

G

)

h

t

( S G

V

1.0

-75 -50 -25 0 25 50 75 100 125 150 175

ID = 250µA

TJ , Temperature ( °C )

Fig 14. Threshold Voltage vs. Temperature

6 www.irf.com

IRF540Z

1000

Duty Cycle = Single P ulse

100

) A

(

t

n

e

r

u C

10

e

h

c

n

a

l

a

v A

1

0.1

1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

0.01

0.05

0.10

tav (sec)

Fig 15. Typical Avalanche Current vs.Pulsewidth

Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆ Tj = 25°C due to avalanche losses

100

90

)

80

J m

( y

70

g

r

e

n

60

E e

h

50

c

n

a

l

40

a

v A

,

30

R A

20

E

10

0

25 50 75 100 125 150 175

TOP Single Pulse BOTTOM 10% Duty Cycle ID = 20A

Starting TJ , Junction Temperature (° C)

Fig 16. Maximum Avalanche Energy

vs. Temperature

Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a

temperature far in excess of T every part type.

2. Safe operation in Avalanche is allowed as long asT not exceeded.

. This is validated for

jmax

3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.

4. P

avalanche pulse.

= Average power dissipation per single

D (ave)

5. BV = Rated breakdown voltage (1.3 factor accounts for

voltage increase during avalanche).

6. I

= Allowable avalanche current.

av

7. ∆T = Allowable rise in junction temperature, not to exceed

T

(assumed as 25°C in Figure 15, 16).

jmax

t

Average time in avalanche.

av =

D = Duty cycle in avalanche = t Z

(D, tav) = Transient thermal resistance, see figure 11)

thJC

P

= 1/2 ( 1.3·BV·Iav) = DT/ Z

D (ave)

I

2DT/ [1.3·BV·Zth]

av =

E

AS (AR)

= P

·f

av

D (ave)·tav

thJC

www.irf.com 7

is

IRF540Z

Reverse Recovery Current

Driver Gate Drive

D.U.T. ISDWaveform

D.U.T. VDSWaveform

D.U.T

+



-

+



Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

-

• Low Leakage Inductance Current Transformer



-

+



V

DD

R

G

• dv/dt controlled by R

• Driver same type as D.U.T.

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

G

+

-

Re-Applied Voltage

Inductor Curent

* V

GS

Period

P.W.

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

= 5V for Logic Level Devices

D =

P.W.

Period

VGS=10V

V

DD

I

SD

*

Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET® Power MOSFETs

R

D.U.T.

D

+

V

DD

-

V

DS

V

GS

R

G

10V

Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %

Fig 18a. Switching Time Test Circuit

V

DS

90%

10% V

GS

t

d(on)tr

t

d(off)tf

Fig 18b. Switching Time Waveforms

8 www.irf.com

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

2.87 (.113)

2.62 (.103)

15.24 (.600)

14.84 (.584)

14.09 (.555)

13.47 (.530)

10.54 (.415)

10.29 (.405)

1 2 3

4

6.47 (.255)

6.10 (.240)

1.15 (.045) MIN

4.06 (.160)

3.55 (.140)

3.78 (.149)

3.54 (.139)

- A -

4.69 (.185)

4.20 (.165)

- B -

1.32 (.052)

1.22 (.048)

IRF540Z

LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN

0.93 (.037)

3X

1.40 (.055)

3X

1.15 (.045)

2.54 (.100)

NOTES: 1 DIM ENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 2 CONTROLLING DI MENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INC LUD E BURR S.

2X

0.69 (.027)

0.36 (.014) M B A M

0.55 (.022)

3X

0.46 (.018)

2.92 (.115)

2.64 (.104)

TO-220AB Part Marking Information

R

0

F

1

I

0

1

A

N

S

P

L

E

X

M

A

TO-220AB package is not recommended for Surface Mount Application.

I

:

S

H

T

9

8

7

C

O

L A I

N

1

D

O

E

T

S

S T

O

E

D

L

B

E

M E

H

W

N

A

S

E

L

Y

B

M

7

9

1

,

9

1

W

"

L

C

E

I

N

E

RNA

T

N

I

O

A

L

N

I

F

T

E

C

I

E

R

O

L

O

G

Y

L

B

S

E

M

A

O

E

C

O

D

L

T

P

D

A

E

Y W

E

L

I

N

B

NUM

T

A

R

T

D

O

E

C

9

=

7

9

1

A

R

9

1

E

K

E

C

Data and specifications subject to change without notice.

This product has been designed and qualified for the Automotive [Q101] market.

Qualification Standards can be found on IR’s Web site.

R

E

7

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information. 03/03

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