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Advanced Process Technology
Ultra Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Lead-Free
Description
Advanced HEXFET® Power MOSFETs from International
Rectifier utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal
resistance and low package cost of the TO-220 contribute
to its wide acceptance throughout the industry.
PD - 94812
IRF540NPbF
HEXFET® Power MOSFET
D
G
S
TO-220AB
V
R
DS(on)
DSS
= 100V
= 44mΩ
ID = 33A
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 33
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 23 A
I
DM
PD @TC = 25°C Power Dissipation 130 W
V
GS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 7.0 V/ns
T
J
T
STG
Pulsed Drain Current 110
Linear Derating Factor 0.87 W/°C
Gate-to-Source Voltage ± 20 V
Avalanche Current 16 A
Repetitive Avalanche Energy 13 mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)
°C
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θCS
R
θJA
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Junction-to-Case ––– 1.15
Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
Junction-to-Ambient ––– 62
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IRF540NPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
E
AS
Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.12 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance ––– ––– 44 mΩ VGS = 10V, ID = 16A
Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
Forward Transconductance 21 ––– ––– S VDS = 50V, ID = 16A
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 V
Gate-to-Source Reverse Leakage ––– ––– -100
VDS = 100V, VGS = 0V
µA
= 20V
GS
nA
VGS = -20V
Total Gate Charge ––– ––– 71 ID = 16A
Gate-to-Source Charge ––– ––– 14 nC VDS = 80V
Gate-to-Drain ("Miller") Charge ––– ––– 21 VGS = 10V, See Fig. 6 and 13
Turn-On Delay Time ––– 11 ––– VDD = 50V
Rise Time ––– 35 ––– ID = 16A
Turn-Off Delay Time ––– 39 ––– RG = 5.1Ω
ns
Fall Time ––– 35 ––– VGS = 10V, See Fig. 10
4.5
Internal Drain Inductance
Internal Source Inductance ––– –––
––– –––
7.5
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
Input Capacitance ––– 1960 ––– VGS = 0V
Output Capacitance ––– 250 ––– VDS = 25V
Reverse Transfer Capacitance ––– 40 ––– pF ƒ = 1.0MHz, See Fig. 5
Single Pulse Avalanche Energy ––– 700 185 mJ I
= 16A, L = 1.5mH
AS
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
33
110
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– 1.2 V TJ = 25°C, IS = 16A, VGS = 0V
Reverse Recovery Time ––– 115 170 ns TJ = 25°C, IF = 16A
Reverse Recovery Charge ––– 505 760 nC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
I
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11)
Starting T
RG = 25Ω, I
= 25°C, L =1.5mH
J
= 16A. (See Figure 12)
AS
≤ 16A, di/dt ≤ 340A/µs, V
SD
TJ ≤ 175°C
Pulse width ≤ 400µs; duty cycle ≤ 2%.
This is a typical value at device destruction and represents
operation outside rated limits.
This is a calculated value limited to T
DD
≤ V
(BR)DSS
= 175°C .
J
,
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D
S
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IRF540NPbF
1000
100
10
D
I , Drain-to-Source Current (A)
1
0.1 1 10 100
1000
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.5V
4.5V
20µs PULSE WIDTH
T = 25 C
J
V , Drain-to-Source Voltage (V)
DS
°
1000
100
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
4.5V
10
D
I , Drain-to-Source Current (A)
20µs PULSE WIDTH
°
T = 175 C
1
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
J
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.5
I =
D
33A
3.0
2.5
°
T = 25 C
100
D
I , Drain-to-Source Current (A)
10
4.0 5.0 6.0 7.0 8.0 9.0
J
°
T = 175 C
J
V = 50V
DS
20µs PULSE WIDTH
V , Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
2.0
1.5
(Normalized)
1.0
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature ( C)
J
Fig 4. Normalized On-Resistance
V =
GS
°
10V
Vs. Temperature
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IRF540NPbF
3000
2500
2000
1500
1000
C, Capacitance (pF)
500
0
1 10 100
V
=
0V,
GS
C
=
iss gs gd , ds
C
=
rss gd
C
=
oss ds gd
V , Drain-to- Source Voltage (V)
DS
f = 1MHz
C
+ C
C
C
C
iss
C
oss
C
rss
C SHORTED
+ C
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
100
°
T = 175 C
J
10
°
T = 25 C
J
1
SD
I , Reverse Drain Current (A)
0.1
0.2 0.6 1.0 1.4 1.8
V ,Source-to-Drain Voltage (V)
SD
V = 0 V
GS
20
I =
16A
D
V = 80V
DS
V = 50V
16
12
8
4
GS
V , Gate-to-Source Voltage (V)
0
0 20 40 60 80
Q , Total Gate Charge (nC)
G
DS
V = 20V
DS
FOR TEST CIRCUIT
SEE FIGURE
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
OPERATION IN THIS AREA
)
A
(
t
100
n
e
r
r
u
C
e
c
r
10
u
o
S
o
t
n
i
a
r
1
D
,
I
D
TA = 25°C
TJ = 175°C
Single Pulse
0.1
1 10 100 1000
V
LIMITED BY RDS(on)
, Drain-toSource Voltage (V)
DS
100µsec
13
1msec
10msec
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
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IRF540NPbF
35
30
25
20
15
D
10
I , Drain Current (A)
5
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
R
V
DS
V
GS
R
G
V
GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
D
D.U.T.
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
+
V
DD
-
thJC
1
D = 0.50
0.20
1 2
P
DM
t
1
t
2
0.10
0.1
0.05
0.02
Thermal Response (Z )
0.01
0.01
0.00001 0.0001 0.001 0.01 0.1 1
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
t , Rectangular Pulse Duration (sec)
1
J DM thJC C
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRF540NPbF
A
15V
DRIVER
R
20V
V
DS
G
t
L
D.U.T
I
AS
0.01
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
400
TOP
300
+
V
DD
-
200
100
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting T , Junction Temperature ( C)
J
BOTTOM
I
D
6.5A
11.3A
16A
°
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Current Regulator
Same Type as D.U.T.
50KΩ
Q
G
V
GS
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
12V
Fig 13b. Gate Charge Test Circuit
.2µF
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
I
D
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+
V
DS
-
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IRF540NPbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
+
-
-
+
R
G
V
GS
• dv/dt controlled by R
• ISD controlled by Duty Factor "D"
G
• D.U.T. - Device Under Test
+
V
DD
-
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D =
P. W .
Period
VGS=10V
[ ] ***
D.U.T. ISDWaveform
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. VDSWaveform
Inductor Curent
*** V
= 5.0V for Logic Level and 3V Drive Devices
GS
Fig 14. For N-channel HEXFET
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
®
power MOSFETs
V
DD
[ ]
I
[ ]
SD
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IRF540NPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
2.87 (. 113)
2.62 (. 103)
15.24 (.600)
14.84 (.584)
14.09 (. 555)
13.47 (. 530)
10.29 (.405)
1 2 3
6.47 (.255)
6.10 (.240)
4
3.78 (.1 49)
3.54 (.1 39)
1.15 (.0 45)
MIN
4.06 ( .160)
3.55 ( .140)
- A -
4.69 (.1 85)
4.20 (.1 65)
- B -
1.32 (.052)
1.22 (.048)
HEXFET
1- GATE
2- DRAIN
3- S OURCE
4- DRAIN
LEAD ASSI GNMENTS
LEAD ASSIGNMENTS
1 - GAT E
2 - DRA IN
3 - SOU RCE
4 - DRA IN
IGBTs, C oPACK
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
0.93 (. 037)
3X
1.40 (.055)
3X
1.15 (.045)
2.54 (.1 00)
NOTES:
1 DIMENSION ING & TOLER ANC ING PER AN SI Y14 .5M, 19 82. 3 OUTLIN E CONF ORMS TO JE DEC OUTL INE TO-220 AB.
2 CONTROL LING D IMENSION : INC H 4 HEATS INK & LEA D MEAS UREMENT S DO NOT INCLUDE BURRS.
2X
0.69 (. 027)
0.36 (.014) M B A M
0.55 (. 022)
3X
0.46 (. 018)
2.92 (. 115)
2.64 (. 104)
TO-220AB Part Marking Information
EXAMPLE:
THIS IS AN IRF1010
LOT CODE 1789
ASSEMB LED O N WW 19 , 1997
IN THE ASSE MBLY LINE "C"
Note: "P" in assembly line
position indicates "Lead-Free"
This product has been designed and qualified for the industrial market.
INTE RN ATIO NAL
REC TIFIER
LOGO
ASSEMBLY
LOT CODE
Data and specifications subject to change without notice.
Qualification Standards can be found on IR’s Web site.
PART NUM BER
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.11/03
8 www.irf.com
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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