Datasheet IRF530NSPBF Datasheet

PD - 95100

IRF530NSPbF

IRF530NLPbF

HEXFET® Power MOSFET

l Advanced Process Technology l Ultra Low On-Resistance l Dynamic dv/dt Rating l 175°C Operating Temperature l Fast Switching l Fully Avalanche Rated l Lead-Free

G

D

V

R

DS(on)

DSS

= 100V

= 90mΩ

ID = 17A

S

Description

Advanced HEXFET® Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low onresistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.

The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The

2

Pak is suitable for high current applications because of its low internal

D connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRF530NL) is available for low-profile applications.

D2Pak

IRF530NSPbF

TO-262

IRF530NLPbF

Absolute Maximum Ratings

Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V  17 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V  12 A I

DM

PD @TA = 25°C Power Dissipation 3.8 W PD @TC = 25°C Power Dissipation 70 W

V

GS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt  7.4 V/ns T

J

T

STG

Pulsed Drain Current  60

Linear Derating Factor 0.47 W/°C Gate-to-Source Voltage ± 20 V Avalanche Current 9.0 A Repetitive Avalanche Energy 7.0 mJ

Operating Junction and -55 to + 175 Storage Temperature Range °C Soldering Temperature, for 10 seconds 300 (1.6mm from case )

Thermal Resistance

Parameter Typ. Max. Units

R

θJC

R

θJA

www.irf.com 1

Junction-to-Case ––– 2.15 Junction-to-Ambient (PCB Mounted,steady-state)** ––– 40

°C/W

03/10/04

IRF530NS/LPbF

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions

V

(BR)DSS

∆V

(BR)DSS

R

DS(on)

V

GS(th)

g

fs

I

DSS

I

GSS

Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

L

D

L

S

C

iss

C

oss

C

rss

E

AS

Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, ID = 250µA

/∆T

Breakdown Voltage Temp. Coefficient ––– 0.11 ––– V/°C Reference to 25°C, ID = 1mA 

J

Static Drain-to-Source On-Resistance ––– ––– 90 mΩ VGS = 10V, ID = 9.0A  Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA Forward Transconductance 12 ––– ––– S VDS = 50V, ID = 9.0A

Drain-to-Source Leakage Current

––– ––– 25

––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V Gate-to-Source Reverse Leakage ––– ––– -100

VDS = 100V, VGS = 0V

µA

nA

VGS = -20V Total Gate Charge ––– ––– 37 ID = 9.0A Gate-to-Source Charge ––– ––– 7.2 nC VDS = 80V Gate-to-Drain ("Miller") Charge ––– ––– 11 VGS = 10V, See Fig. 6 and 13  Turn-On Delay Time ––– 9.2 ––– VDD = 50V Rise Time ––– 22 ––– ID = 9.0A Turn-Off Delay Time ––– 35 ––– RG = 12Ω

ns

Fall Time ––– 25 ––– VGS = 10V, See Fig. 10 

4.5

Internal Drain Inductance

Internal Source Inductance ––– –––

––– –––

7.5

Between lead,

6mm (0.25in.)

nH

from package

and center of die contact Input Capacitance ––– 920 ––– VGS = 0V Output Capacitance ––– 130 ––– VDS = 25V Reverse Transfer Capacitance ––– 19 ––– pF ƒ = 1.0MHz, See Fig. 5  Single Pulse Avalanche Energy ––– 340 93 mJ I

= 9.0A, L = 2.3mH

AS

D

G

S

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units Conditions

I

S

I

SM

V

SD

t

rr

Q

rr

t

on

Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode)

––– –––

17

60

showing the

A

p-n junction diode.

G

Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 9.0A, VGS = 0V  Reverse Recovery Time ––– 93 140 ns TJ = 25°C, IF = 9.0A Reverse Recovery Charge ––– 320 480 nC di/dt = 100A/µs



Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:

 Repetitive rating; pulse width limited by

max. junction temperature. (See fig. 11)

 Starting T

RG = 25Ω, I

 I

SD

= 25°C, L = 2.3mH

J

= 9.0A, VGS=10V (See Figure 12)

AS

≤ 9.0A, di/dt ≤ 410A/µs, V

DD

≤ V

(BR)DSS

TJ ≤ 175°C

 Pulse width ≤ 400µs; duty cycle ≤ 2%.

,

 This is a typical value at device destruction and represents

operation outside rated limits.

 This is a calculated value limited to T

= 175°C .

J

 Uses IRF530N data and test conditions.

**When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994

2 www.irf.com

D

S

IRF530NS/LPbF

100

10

D

I , Drain-to-Source Current (A)

1

0.1 1 10 100

100

VGS

TOP

15V 10V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM

4.5V

20µs PULSE WIDTH T = 25 C

J

V , Drain-to-Source Voltage (V)

DS

°

100

TOP

BOTTOM

VGS 15V 10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

10

D

I , Drain-to-Source Current (A)

20µs PULSE WIDTH

°

T = 175 C

1

0.1 1 10 100

V , Drain-to-Source Voltage (V)

DS

J

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

3.5

I =

D

15A

3.0

°

T = 25 C

J

°

T = 175 C

J

2.5

2.0

1.5

(Normalized)

1.0

D

I , Drain-to-Source Current (A)

V = 50V

DS

10

4.0 5.0 6.0 7.0 8.0

V , Gate-to-Source Voltage (V)

GS

20µs PULSE WIDTH

Fig 3. Typical Transfer Characteristics

0.5

DS(on)

R , Drain-to-Source On Resistance

0.0

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

T , Junction Temperature ( C)

J

Fig 4. Normalized On-Resistance

V =

GS

°

10V

Vs. Temperature

www.irf.com 3

IRF530NS/LPbF

1600

1200

800

V

=

GS

C

=

iss gs gd , ds

C

=

rss gd

C

=

oss ds gd

C

iss

C

oss

0V, C C C

f = 1MHz

+ C

C SHORTED

C, Capacitance (pF)

400

C

rss

0

1 10 100

V , Drain- to-Source Voltage (V)

DS

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

100

°

T = 175 C

J

10

1

T = 25 C

SD

I , Reverse Drain Current (A)

0.1

0.2 0.4 0.6 0.8 1.0 1.2 1.4

V ,Source-to-Drain Voltage (V)

SD

J

°

V = 0 V

GS

20

I =

9.0A

D

V = 80V

DS

V = 50V

16

12

8

4

GS

V , Gate-to-Source Voltage (V)

0

0 10 20 30 40

Q , Total Gate Charge (nC)

G

DS

V = 20V

DS

FOR TEST CIRCUIT

SEE FIGURE

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

1000

) A

( t

100

n e

r

r u

C e

c

r

10

u o S

o

t

n

i a

r

1

D ,

D

Tc = 25°C

I

Tj = 175°C Single Pulse

0.1 1 10 100 1000

OPERATION IN THIS AREA LIMITED BY RDS(on)

V

, Drain-toSource Voltage (V)

DS

100µsec

1msec

10msec

13

Fig 7. Typical Source-Drain Diode

Fig 8. Maximum Safe Operating Area

Forward Voltage

4 www.irf.com

IRF530NS/LPbF

20

16

12

8

D

I , Drain Current (A)

4

0

25 50 75 100 125 150 175

T , Case Temperature ( C)

C

°

Fig 9. Maximum Drain Current Vs.

Case Temperature

10

R

V

DS

V

GS

R

G

V

GS

Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %

D

D.U.T.

Fig 10a. Switching Time Test Circuit

V

DS

90%

10% V

GS

t

d(on)tr

t

d(off)tf

Fig 10b. Switching Time Waveforms

+

V

DD

-

thJC

D = 0.50

1

0.20

0.10

0.05

0.1

0.02

0.01

SINGLE PULSE

(THERMAL RESPONSE)

Thermal Response (Z )

Notes:

1. Duty factor D = t / t

2. Peak T = P x Z + T

0.01

0.00001 0.0001 0.001 0.01 0.1

t , Rectangular Pulse Duration (sec)

1

J DM thJC C

1 2

P

DM

t

1

t

2

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

www.irf.com 5

IRF530NS/LPbF

A

15V

DRIVER

+

V

DD

-

R

20V

V

DS

G

GS

L

D.U.T

I

AS

Ω

0.01

t

p

Fig 12a. Unclamped Inductive Test Circuit

V

(BR)DSS

t

p

I

AS

Fig 12b. Unclamped Inductive Waveforms

200

TOP

160

120

80

40

AS

E , Single Pulse Avalanche Energy (mJ)

0

25 50 75 100 125 150 175

Starting T , Junction Temperature ( C)

J

BOTTOM

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

Current Regulator

Same Type as D.U.T.

I

D

3.7A

6.4A

9.0A

°

50KΩ

Q

G

V

GS

Q

GS

V

G

Q

GD

Charge

Fig 13a. Basic Gate Charge Waveform

12V

Fig 13b. Gate Charge Test Circuit

.2µF

V

GS

.3µF

D.U.T.

3mA

I

G

Current Sampling Resistors

I

D

6 www.irf.com

+

V

DS

-

IRF530NS/LPbF

Peak Diode Recovery dv/dt Test Circuit

D.U.T*

+



Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance Current Transformer

-

+



-



-

+



R

G

V

GS

• dv/dt controlled by R

• ISD controlled by Duty Factor "D"

G

• D.U.T. - Device Under Test

+

V

DD

-

* Reverse Polarity of D.U.T for P-Channel

Driver Gate Drive

P.W.

Period

D =

P. W .

Period

VGS=10V

[ ] ***

D.U.T. ISDWaveform

Reverse Recovery Current

Re-Applied Voltage

D.U.T. VDSWaveform

Inductor Curent

*** V

= 5.0V for Logic Level and 3V Drive Devices

GS

Fig 14. For N-channel HEXFET

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

®

power MOSFETs

V

DD

[ ]

I

[ ]

SD

www.irf.com 7

IRF530NS/LPbF

2

D

Pak Package Outline

Dimensions are shown in millimeters (inches)

D2Pak Part Marking Information (Lead-Free)

T H IS IS AN IR F 5 30S WIT H

LOT CODE 8024 AS S E M B LE D ON WW 0 2, 2000 IN THE ASS EMBLY LINE "L"

N ote: "P" in as semb ly line po s i tio n i nd icate s "L ead-F ree"

INT ER NAT ION AL

R E CT IF IER

LOGO

AS S E M B L Y LOT CODE

F530S

PART NUMBER

DATE CODE YE AR 0 = 2000 WEE K 02 LINE L

OR

IN T E R N AT ION AL

RECTIFIER

LOGO

AS S EM B LY LOT CODE

F 530S

8 www.irf.com

PART NUMB ER

DATE CODE P = DESIGNATE S LEAD-F RE E

PRODUCT (OPTIONAL)

YEAR 0 = 2000 WEEK 02

A = ASSEMBLY SITE CODE

TO-262 Package Outline

IRF530NS/LPbF

IGBT

1- GATE

2- COLLECTOR

3- EMITTER

TO-262 Part Marking Information

TH IS IS AN I RL3103L

E X AMPL E :

LOT CODE 1789 ASS EMBLE D ON WW 19, 1997 IN T HE ASSEMBLY LINE "C"

Note: "P" in ass embl y line pos iti on indicates "L ead-F ree"

INTE RNAT IONAL

RECT IFIER

LOGO

AS S E MB L Y LOT CODE

PART NUMBE R

DATE CODE YEAR 7 = 1997 WEEK 19 LINE C

OR

INTE RNATIONAL

RECT IFIE R

LOGO

ASSEMBLY LOT CODE

www.irf.com 9

PART NUMB ER

DAT E CODE P = DES IGNATES LE AD-FRE E

PRODUCT (OPT IONAL)

YEAR 7 = 1997 WE EK 19

A = ASSEMBLY SITE CODE

IRF530NS/LPbF

D2Pak Tape & Reel Infomation

Dimensions are shown in millimeters (inches)

TRR

FEED DI RECTION

TRL

FEED DI RECTION

1.85 (.073)

1.65 (.065)

10.90 (.429)

10.70 (.421)

4.10 (.161)

3.90 (.153)

1.60 (.063)

1.50 (.059)

11.60 (.457)

11.40 (.449)

16.10 (.634)

15.90 (.626)

1.60 (.063)

1.50 (.059)

1.75 (.069)

1.25 (.049)

15.42 (.609)

15.22 (.601)

0.368 (.0145)

0.342 (.0135)

24.30 (.957)

23.90 (.941)

4.72 (.136)

4.52 (.178)

13.50 ( .532)

12.80 ( .504)

330.00 (14.173) MAX.

NOTES :

1. COMFORMS TO EIA-418.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION MEASURED @ HUB.

4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.

27.40 ( 1.079)

23.90 ( .941)

4

60.00 (2.362) MIN.

30.40 ( 1.197)

26.40 ( 1.03 9)

24.40 ( .961 )

3

MAX.

4

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information.03/04

10 www.irf.com

Note: For the most current drawings please refer to the IR website at:

http://www.irf.com/package/