Datasheet IRF5305S, IRF5305L Datasheet (International Rectifier)

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PD - 91386C
IRF5305S/L
HEXFET® Power MOSFET
l Advanced Process Technology l Surface Mount (IRF5305S) l Low-profile through-hole (IRF5305L) l 175°C Operating Temperature l Fast Switching l P-Channel l Fully Avalanche Rated
G
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.
2
Pak is a surface mount power package capable of
The D accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on­resistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRF5305L) is available for low­profile applications.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ -10V -31 ID @ TC = 100°C Continuous Drain Current, VGS @ -10V -22 A I
DM
PD @TA = 25°C Power Dissipation 3.8 W PD @TC = 25°C Power Dissipation 110 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt  -5.8 V/ns T
J
T
STG
Pulsed Drain Current  -110
Linear Derating Factor 0.71 W/°C Gate-to-Source Voltage ± 20 V Single Pulse Avalanche Energy 280 mJ Avalanche Current -16 A Repetitive Avalanche Energy 11 mJ
Operating Junction and -55 to + 175 Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
Junction-to-Case ––– 1.4 Junction-to-Ambient ( PCB Mounted,steady-state)** –– – 40
2
D Pak
D
V
R
DS(on)
DSS
= -55V
= 0.06
ID = -31A
S
TO-262
°C/W
°C
4/1/99
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IRF5305S/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
S
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage -55 ––– ––– V VGS = 0V, ID = -250µA
/T
Breakdown Voltage Temp. Coefficient ––– -0.034 –– – V/°C Reference to 25°C, ID = -1mA
J
Static Drain-to-Source On-Resistance ––– ––– 0.06 VGS = -10V, ID = -16A Gate Threshold Voltage -2.0 ––– -4.0 V VDS = VGS, ID = -250µA Forward Transconductance 8.0 ––– ––– S VDS = -25V, ID = -16A
Drain-to-Source Leakage Current
––– ––– -25
––– ––– -250 VDS = -44V, VGS = 0V, TJ = 150°C Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V Gate-to-Source Reverse Leakage ––– ––– -100
VDS = -55V, VGS = 0V
µA
nA
VGS = -20V Total Gate Charge ––– ––– 63 ID = -16A Gate-to-Source Charge ––– ––– 13 nC VDS = -44V Gate-to-Drain ("Miller") Charge ––– ––– 29 VGS = -10V, See Fig. 6 and 13  Turn-On Delay Time ––– 14 ––– VDD = -28V Rise Time ––– 66 ––– ID = -16A Turn-Off Delay Time ––– 39 ––– RG = 6.8
ns
Fall Time ––– 63 ––– RD = 1.6Ω, See Fig. 10  Internal Source Inductance
––– –––
7.5
Between lead,
nH
and center of die contact Input Capacitance ––– 1200 ––– VGS = 0V Output Capacitance ––– 520 ––– pF VDS = -25V Reverse Transfer Capacitance ––– 250 ––– ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode)
––– –––
––– –––
-31
-110
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– -1.3 V TJ = 25°C, IS = -16A, VGS = 0V Reverse Recovery Time ––– 71 110 n s TJ = 25°C, IF = -16A Reverse Recovery Charge ––– 170 250 nC di/dt = -100A/µs

Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
Pulse width 300µs; duty cycle 2%.
max. junction temperature. ( See fig. 11 )
V
= -25V, Starting TJ = 25°C, L = 2.1mH
DD
RG = 25, I
I
-16A, di/dt -280A/µs, V
SD
= -16A. (See Figure 12)
AS
DD
V
(BR)DSS
Uses IRF5305 data and test conditions
,
TJ ≤ 175°C
** When mounted on 1" square PCB (FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994.
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D
S
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IRF5305S/L
A
A
)
A
)
A
1000
VGS TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V BOTTOM - 4.5V
100
10
D
-I , Drain -to-S ou rce C urre nt (A )
-4.5V
20µs PULSE WIDTH
TJ = 25°C
T = 25 °C
1
0.1 1 10 100
-V , Drain-to-S ource Voltage (V)
DS
c
Fig 1. Typical Output Characteristics
100
1000
VGS TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V BOTTOM - 4.5V
100
10
D
-I , Drain -to-S ou rce C urren t (A )
-4.5 V
20µs PULSE W IDTH
TJ = 175°C
T = 175°C
1
0.1 1 10 10 0
-V , Dra in-t o- S o u rc e Voltage (V
DS
C
Fig 2. Typical Output Characteristics
2.0
I = - 2 7 A
D
T = 25°C
10
J
T = 175°C
J
1.5
1.0
(Norm alized)
0.5
D
-I , D rain- to-S ou rc e C u rre nt (A )
1
45678910
-V , Gate -to-S ou rce V oltage (V
GS
V = -25 V
DS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
DS(on)
R , Dra in -to -S o u rc e On R e s is tan c e
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , J unc tion T empe rature ( °C )
J
Fig 4. Normalized On-Resistance
V = -1 0V
GS
Vs. Temperature
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IRF5305S/L
A
g
g
g
)
)
A
A
)
A
g
)
2500
2000
1500
1000
C, C apac itance (pF )
500
0
1 10 100
V = 0V, f = 1M Hz
GS
C = C + C , C S H O RTE D
iss
C = C C = C + C
C
iss
C
oss
C
rss
-V , Drai n-to - S o ur c e V o ltage (V
DS
s gd d s
d
rss oss ds
d
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
20
I = - 1 6A
-V , Gate -to -S o u rc e Volta ge (V )
16
12
GS
D
8
4
V = -4 4V
DS
V = -2 8V
DS
FOR TEST CIRCUIT
0
0 102030405060
Q , T ota l G a te C h arge (nC
G
SE E F IG U RE 1 3
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
OP ER A T IO N IN T H IS A R E A L IMITED BY R
DS(on)
100
100
T = 175°C
J
T = 25°C
SD
-I , Rev ers e D ra in C urre nt (A )
10
0.4 0.8 1.2 1.6 2.0
-V , Sou rc e - to -Drain V o ltage (V
SD
J
V = 0 V
Fig 7. Typical Source-Drain Diode
GS
10
D
-I , Drain C urren t (A )
T = 25 °C
C
T = 17 5 °C
J
Sin
le Pulse
1
1 10 100
-V , Drai n-to - S o ur c e Voltage (V
DS
Fig 8. Maximum Safe Operating Area
100µs
1ms
10ms
Forward Voltage
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IRF5305S/L
R
D.U.T.
D
-
+
V
DD
V
DS
35
30
V
GS
R
G
25
20
15
D
10
-I , Drain Current (A)
5
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
thJC
1
D = 0.50
-10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
GS
10%
90% V
DS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
0.20
0.10
0.05
0.1
0.02
Thermal Response (Z )
0.01
0.01
0.00001 0.0001 0.001 0.01 0.1
SINGLE PULSE
(THERMAL RESPONSE)
t , Rectangular Pulse Duration (sec)
1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
J DM thJC C
1 2
P
DM
t
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRF5305S/L
(BR)
A
)
L
D.U.T
I
AS
0.01
t
p
DRIVER
15V
V
DD
R
-20V
V
DS
G
Fig 12a. Unclamped Inductive Test Circuit
I
AS
t
p
V
DSS
700
I
D
TO P -6.6 A
600
A
500
400
300
200
100
AS
V = -2 5V
E , S ing le Puls e A va lan c h e E n erg y ( mJ)
DD
0
25 50 75 100 125 150 175
Starting T , Junction Temperature (°C
J
-11A BOT TOM -16 A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
Q
G
-10V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
12V
V
GS
Fig 13b. Gate Charge Test Circuit
50K
.2µF
.3µF
-3mA
Current Sampling Resistors
­V
DS
+
D.U.T .
I
G
I
D
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IRF5305S/L
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
-
R
G
V
GS
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
+
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance Current Transformer
-
-
dv/dt controlled by R
ISD controlled by Duty Factor "D"
+
G
D.U.T. - Device Under Test
P.W.
D =
Period
+
V
DD
-
VGS=10V
[ ] ***
D.U.T. ISDWaveform
Reverse Recovery Current
Re-Applied Voltage
D.U.T. VDSWaveform
Inductor Curent
*** V
= 5.0V for Logic Level and 3V Drive Devices
GS
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple 5%
V
DD
[ ]
I
[ ]
SD
Fig 14. For P-Channel HEXFETS
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IRF5305S/L
A
D2Pak Package Outline
10.54 (.415)
1.40 (.055) MAX.
1.78 (.070)
1.27 (.050)
1.40 (.055)
3X
1.14 (.045)
5.08 (.200)
NOTE S: 1 DIMENSIONS AFTER SOLDER DIP. 2 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 CONTROLLING DIMENSION : INCH. 4 HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.
10.29 (.405)
- A ­2
1 3
15.49 (.610)
14.73 (.580)
0.93 (.037)
3X
0.69 (.027)
0.2 5 ( .0 10) M B A M
Part Marking Information
D2Pak
4.69 (.185)
4.20 (.165)
5.28 (.208)
4.78 (.188)
0.55 (.022)
0.46 (.018)
- B -
1.32 (.052)
1.22 (.048)
2.79 (.110)
2.29 (.090)
1.39 (.055)
1.14 (.045)
LEAD ASSIGNMENTS 1 - G ATE 2 - D RAIN 3 - S OU R CE
10.16 (.400) REF.
6.47 (.255)
6.18 (.243)
2.61 (.103)
2.32 (.091)
8.89 (.350) REF.
MINIMUM RECOMMENDED FOOTPRINT
11.43 (.450)
8.89 (.350)
17.78 (.700)
3.81 (.150)
2.08 (.082) 2X
2.54 (.100) 2X
INTERNATIONAL RE CTIFIE R LO G O
A S SEMBLY LO T CO D E
F530S
9246
9 B 1 M
PART NUM B ER
DATE CODE (YYW W ) YY = YEAR WW = WEEK
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Page 9
Package Outline
TO-262 Outline
IRF5305S/L
Part Marking Information
TO-262
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Page 10
IRF5305S/L
Tape & Reel Information
D2Pak
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
1.60 (.063)
1.50 (.059)
0.368 (.0145)
0.342 (.0135)
FEED D IRECTION
1.85 (.073)
1.65 (.065)
TRL
10.90 (.429)
10.70 (.421)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
330.00 (14.173) MAX.
NOTES :
1. COM FO R M S TO E IA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HU B.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
11.60 (.457)
11.40 (.449)
1.75 (.069)
1.25 (.049)
16.10 (.634)
15.90 (.626)
15.42 (.609)
15.22 (.601)
27.40 (1.079)
23.90 (.941)
4
26.4 0 (1.039)
24.40 (.961 )
3
24.30 (.957)
23.90 (.941)
4.72 (.136)
4.52 (.178)
60.00 (2.362) MIN.
30.40 (1.197) MAX .
4
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http://www.irf.com/ Data and specifications subject to change without notice. 4/99
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