Datasheet IRF520VL, IRF520VS Datasheet (International Rectifier)

Page 1
l Advanced Process Technology l Ultra Low On-Resistance l Dynamic dv/dt Rating l 175°C Operating Temperature l Fast Switching l Fully Avalanche Rated l Optimized for SMPS Applications
G
Description
Advanced HEXFET® Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on­resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.
The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The
2
Pak is suitable for high current applications because of its low internal
D connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRF520VL) is available for low-profile applications.
PD - 94306
IRF520VS
IRF520VL
HEXFET® Power MOSFET
D
S
D2Pak
IRF520VS
V
R
DS(on)
DSS
= 100V = 0.165Ω
ID = 9.6A
TO-262
IRF520VL
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 9.6 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 6.8 A I
DM
PD @TC = 25°C Power Dissipation 44 W
V
GS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt  7.0 V/ns T
J
T
STG
Pulsed Drain Current  37
Linear Derating Factor 0.29 W/°C Gate-to-Source Voltage ± 20 V Avalanche Current 9.2 A Repetitive Avalanche Energy 4.4 m J
Operating Junction and -55 to + 175 Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case )
°C
Thermal Resistance
Parameter Typ. Max. Units
R
R
θJA
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Junction-to-Case ––– 3.4 Junction-to-Ambient (PCB Mounted, steady state)** ––– 40
°C/W
01/18/02
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IRF520VS/IRF520VL
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
E
AS
Drain-to-Source Breakdown Voltage 100 ––– ––– VVGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.12 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance ––– ––– 0.165 Ω VGS = 10V, ID = 5.5A Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA Forward Transconductance 1.9 ––– ––– SVDS = 50V, ID = 5.5A
Drain-to-Source Leakage Current
––– ––– 25 ––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V Gate-to-Source Reverse Leakage ––– ––– -100
VDS = 100V, VGS = 0V
µA
nA
VGS = -20V Total Gate Charge ––– ––– 22 ID = 9.2A Gate-to-Source Charge ––– ––– 5.2 nC VDS = 80V Gate-to-Drain ("Miller") Charge ––– ––– 7.0 VGS = 10V, See Fig. 6 and 13 Turn-On Delay Time ––– 6.9 ––– VDD = 50V Rise Time ––– 23 ––– ID = 9.2A Turn-Off Delay Time ––– 30 ––– RG = 18Ω
ns
Fall Time ––– 24 ––– VGS = 10V, See Fig. 10 
4.5
Internal Drain Inductance
Internal Source Inductance ––– –––
––– –––
7.5
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact Input Capacitance ––– 560 ––– VGS = 0V Output Capacitance ––– 81 ––– VDS = 25V Reverse Transfer Capacitance ––– 10 ––– pF ƒ = 1.0MHz, See Fig. 5 Single Pulse Avalanche Energy ––– 15044 mJ I
= 9.2A, L = 1.0mH
AS
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode)
––– –––
––– –––
9.6
37
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– 1.2 V TJ = 25°C, IS = 9.2A, VGS = 0V Reverse Recovery Time ––– 83 120 ns TJ = 25°C, IF = 9.2A Reverse Recovery Charge ––– 220 330 nC di/dt = 100A/µs

Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting T
RG = 25Ω, I
I
SD
= 25°C, L = 1.0mH
J
= 9.2A, VGS=10V (See Figure 12)
AS
≤ 9.2A, di/dt ≤ 360A/µs, V
DD
≤ V
(BR)DSS
TJ ≤ 175°C
Pulse width ≤ 400µs; duty cycle ≤ 2%.
,
This is a typical value at device destruction and represents
operation outside rated limits.
This is a calculated value limited to T
= 175°C .
J
Uses IRF520V data and test conditions.
**When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994
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D
S
Page 3
IRF520VS/IRF520VL
100
10
D
I , Drain-to-Source Current (A)
1
0.1 1 10 100
100
VGS
TOP
15V 10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.5V
4.5V
20µs PULSE WIDTH
T = 25 C
J
V , Drain-to-Source Voltage (V)
DS
°
T = 25 C
J
°
100
10
D
I , Drain-to-Source Current (A)
1
VGS
TOP
15V 10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.5V
4.5V
20µs PULSE WIDTH
1 10 100
V , Drain-to-Source Voltage (V)
DS
°
T = 175 C
J
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.5
3.0
9.2A
I =
D
2.5
°
T = 175 C
J
2.0
10
1.5
(Normalized)
1.0
D
I , Drain-to-Source Current (A)
V = 50V
DS
1
4.0 5.0 6.0 7.0 8.0 9.0
V , Gate-to-Source Voltage (V)
GS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature ( C)
J
Fig 4. Normalized On-Resistance
V =
10V
GS
°
Vs. Temperature
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Page 4
IRF520VS/IRF520VL
1000
800
600
400
C, Capacitance(pF)
200
0
1 10 100
V
= 0V, f = 1 MHZ
GS
C
= C
= C
= C
gs gd ds
Ciss
Coss Crss
+ Cgd, C
+ C
gd
iss
C
rss
C
oss
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
°
T = 175 C
J
SHORTED
ds
20
I =
9.2A
D
16
12
8
4
GS
V , Gate-to-Source Voltage (V)
0
0 4 8 12 16 20 24
Q , Total Gate Charge (nC)
G
V = 80V
DS
V = 50V
DS
V = 20V
DS
FOR TEST CIRCUIT
SEE FIGURE
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
OPERATION IN THIS AREA LIMITED BY RDS(on)
13
10
1
°
T = 25 C
SD
I , Reverse Drain Current (A)
0.1
0.4 0.6 0.8 1.0 1.2 1.4 1.6
V ,Source-to-Drain Voltage (V)
SD
J
V = 0 V
GS
Fig 7. Typical Source-Drain Diode
10
100µsec
1
, Drain-to-Source Current (A)
D
Tc = 25°C
I
Tj = 175°C Single Pulse
0.1 1 10 100 1000
V
, Drain-toSource Voltage (V)
DS
1msec
10msec
Fig 8. Maximum Safe Operating Area
Forward Voltage
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Page 5
IRF520VS/IRF520VL
10.0
8.0
6.0
4.0
D
I , Drain Current (A)
2.0
0.0 25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
R
V
DS
V
GS
R
G
V
GS
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
D
D.U.T.
Fig 10a. Switching Time Test Circuit
V
DS
90%
10% V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
+
V
DD
-
D = 0.50
thJC
1
0.20
0.10
0.05
0.02
0.01
0.1
Thermal Response (Z )
0.01
0.00001 0.0001 0.001 0.01 0.1
SINGLE PULSE
(THERMAL RESPONSE)
t , Rectangular Pulse Duration (sec)
1
P
DM
t
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
J DM thJC C
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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Page 6
IRF520VS/IRF520VL
A
15V
DRIVER
+
-
V
DD
R
V
G
V
20V
GS
DS
L
D.U.T
I
AS
0.01
t
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
80
TOP
60
40
20
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting T , Junction Temperature ( C)
J
BOTTOM
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Current Regulator
Same Type as D.U.T.
I
D
3.8A
6.5A
9.2A
°
50KΩ
Q
G
V
GS
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
12V
Fig 13b. Gate Charge Test Circuit
.2µF
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
I
D
6 www.irf.com
+
V
DS
-
Page 7
IRF520VS/IRF520VL
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance Current Transformer
-
+
-
-
+
R
G
V
GS
• dv/dt controlled by R
• ISD controlled by Duty Factor "D"
G
• D.U.T. - Device Under Test
+
V
DD
-
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D =
P.W.
Period
VGS=10V
[ ] ***
D.U.T. ISDWaveform
Reverse Recovery Current
Re-Applied Voltage
D.U.T. VDSWaveform
Inductor Curent
*** V
= 5.0V for Logic Level and 3V Drive Devices
GS
Fig 14. For N-channel HEXFET
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
®
power MOSFETs
V
DD
[ ]
I
[ ]
SD
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Page 8
IRF520VS/IRF520VL
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
1.40 (.055) MA X.
1.78 (.070)
1.27 (.050)
1.40 (.055)
3X
1.14 (.045)
5.08 (.200)
NOTE S: 1 DIMENSIONS AFTER SOLDER DIP. 2 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 CONTROLLING DIMENSION : INCH. 4 HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.
2
Pak Part Marking Information
D
10.29 (.405)
- A ­2
1 3
15.49 (.610)
14.73 (.580)
0.93 (.037)
3X
0.69 (.027)
0.2 5 ( .0 10 ) M B A M
4.69 (.185)
4.20 (.165)
5.28 (.208)
4.78 (.188)
0.55 (.022)
0.46 (.018)
- B -
1.32 (.052)
1.22 (.048)
2.79 (.110)
2.29 (.090)
1.39 (.055)
1.14 (.045)
LEAD ASSIGNMENTS 1 - G ATE 2 - D RA IN 3 - S OUR CE
10.16 (.400) REF .
6.47 (.255)
6.18 (.243)
2.61 (.103)
2.32 (.091)
8.89 (.350) REF .
MINIMUM RECOMMENDED FOOTPRINT
11.43 (.450)
8.89 (.350)
17.78 (.700)
3.81 (.150)
2.08 (.082) 2X
2.54 (.100) 2X
THIS IS AN IRF530S W ITH LOT CODE 8024
A SSEMBLED ON WW 02, 2000 IN THE ASSEMBLY LINE "L"
INTERNATIONA L
REC TIFIER
LOGO
F530S
PART NUMBER
DA TE C ODE
ASSEMBLY LOT C ODE
YEAR 0 = 2000 WEE K 02 LINE L
8 www.irf.com
Page 9
TO-262 Package Outline
EX AMPLE: TH IS I S AN IRL310 3L
LOT CODE 1789
ASSEMBLY
PART NUMBER
DA TE C ODE
WEE K 19 LINE C
LOT C ODE
YEA R 7 = 1997
A SSEMBLED ON WW 19, 1997 I N TH E ASSEMBLY LINE "C"
LOGO
REC TIFIER
INTERNATIONAL
Dimensions are shown in millimeters (inches)
IRF520VS/IRF520VL
TO-262 Par t Mar king Information
www.irf.com 9
Page 10
IRF520VS/IRF520VL
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
4.10 (.161)
3.90 (.153)
FEED DIRECTION
TRL
FEED DIRECTION
1.85 (.073)
1.65 (.065)
10.90 (.429)
10.70 (.421)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
16.10 (.634)
15.90 (.626)
1.60 (.063)
1.50 (.059)
1.75 (.069)
1.25 (.049)
15.42 (.609)
15.22 (.601)
0.368 (.0145)
0.342 (.0135)
24.30 (.957)
23.90 (.941)
4.72 (.136)
4.52 (.178)
13.50 (.532)
12.80 (.504)
330.00 (14.173) MAX.
NOTES :
1. COMFORM S TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
27.40 (1.079)
23.90 (.941)
4
26.40 (1.039)
24.40 (.961)
3
60.00 (2.362) MIN.
30.40 (1.197) MA X.
4
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.01/02
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