Datasheet IRF520 Datasheet (Intersil)

IRF520

Data Sheet November 1999

9.2A, 100V, 0.270 Ohm, N-Channel
Power MOSFET

This N-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.

Formerly developmental type TA09594.

Ordering Information

PART NUMBER PACKAGE BRAND

IRF520 TO-220AB IRF520

NOTE: When ordering, use the entire part number.

File Number 1574.4

Features

• 9.2A, 100V

•r

• SOA is Power Dissipation Limited

• Single Pulse Avalanche Energy Rated

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

= 0.270Ω

DS(ON)

Components to PC Boards”

Symbol

D

G

Packaging

S

JEDEC TO-220AB

SOURCE

DRAIN

GATE

DRAIN (FLANGE)

4-172

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

1-888-INTERSIL or 321-724-7143

| Copyright © Intersil Corporation 1999

IRF520

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

IRF520 UNITS

Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DGR

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

TC= 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P

DS

D
D

DM

GS

D

100 V
100 V

9.2

6.5
37 A

±20 V

60 W

A
A

Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.4 W/oC

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ,T

AS

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

36 mJ

-55 to 175

300
260

o

C

o

C

o

C

NOTE:

1. TJ = 25oC to 150oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate to Threshold Voltage V

GS(TH)VGS

Zero Gate Voltage Drain Current I

On-State Drain Current (Note 2) I

D(ON)VDS

Gate to Source Leakage Current I
Drain to Source On Resistance (Note 2) r

DS(ON)ID

Forward Transconductance (Note 2) g
Turn-On Delay Time t

d(ON)VDD

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Total Gate Charge

Q

g(TOT)VGS

(Gate to Source + Gate to Drain)
Gate to Source Charge Q
Gate to Drain “Miller” Charge Q
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Internal Drain Inductance L

Internal Source Inductance L

Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R

DSSID

DSS

GSS

fs

r

f

gs
gd

ISS
OSS
RSS

D

S

θJC

θJA

= 250µA, VGS = 0V (Figure 10) 100 - - V

= VDS, ID = 250µA 2.0 - 4.0 V
VDS = 95V, VGS = 0V - - 250 µA
VDS = 0.8 x Rated BV

> I

D(ON)

x r

DS(ON)MAX

, VGS = 0V, TJ= 150oC - - 1000 µA

DSS

, VGS = 10V (Figure 7) 9.2 - - A

VGS = ±20V - - ±100 nA

= 5.6A, VGS = 10V (Figure 8, 9) - 0.25 0.27 Ω

VDS≥ 50V, ID = 5.6A (Figure 12) 2.7 4.1 - S

= 50V, ID≈ 9.2A, RG = 18Ω, RL = 5.5Ω
MOSFET Switching Times are Essentially
Independent of Operating
Temperature

- 9 13 ns

-3063ns

-1870ns

-2059ns

= 10V, ID = 9.2A, VDS = 0.8 x Rated BV
I

= 1.5mA (Figure 14) Gate Charge is

g(REF)

Essentially Independent of Operating
Temperature

DSS

,

-1030nC

- 2.5 - nC

- 2.5 - nC

VDS = 25V, VGS = 0V, f = 1MHz
(Figure 11)

- 350 - pF

- 130 - pF

-25- pF

Measured From the Contact
Screw On Tab To Center of
Die

Measured From the Drain
Lead, 6mm (0.25in) From
Package to Center of Die

Measured From the Source
Lead, 6mm (0.25in) From
Header to Source Bonding
Pad

Free Air Operation - - 80

Modified MOSFET
Symbol Showing the
Internal Devices
Inductances

D

L

D

G

L

S

S

- 3.5 - nH

- 4.5 - nH

- 7.5 - nH

- - 2.5

o

C/W

o

C/W

4-173

IRF520

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current I
Pulse Source to Drain Current (Note 3) I

SD

SDM

Source to Drain Diode Voltage (Note 2) V
Reverse Recovery Time t
Reverse Recovered Charge Q

NOTES:

2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD = 25V, starting TJ = 25oC, L = 640mH, RG = 25Ω, peak IAS = 9.2A.

Modified MOSFET Symbol

Showing the Integral

D

Reverse P-NJunction Diode

G

S

TJ = 25oC, ISD = 9.2A, VGS = 0V (Figure 13) - - 2.5 V

SD

TJ = 25oC, ISD = 9.2A, dISD/dt = 100A/µs 5.5 100 240 ns

rr

TJ = 25oC, ISD = 9.2A, dISD/dt = 100A/µs 0.17 0.5 1.1 µC

RR

- - 9.2 A

- - 37 A

Typical Performance Curves Unless Otherwise Specified

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

25 50 75 100

0

TC, CASE TEMPERATURE (oC)

125

150

FIGURE 1. NORMALIZEDPOWER DISSIPATION vs CASE

TEMPERATURE

10

C/W)

o

0.5

1

0.2

0.1

, TRANSIENT

θJC

Z

0.1

THERMAL IMPEDANCE (

0.01
10

0.05

0.02

0.01

SINGLE PULSE

-5

-4

10

-3

10

t1, RECTANGULAR PULSE DURATION (s)

175

10

8

6

4

, DRAIN CURRENT (A)

D

I

2

0

50 75 100 17525

TC, CASE TEMPERATURE (oC)

125 150

FIGURE 2. MAXIMUMCONTINUOUSDRAIN CURRENT vs

CASE TEMPERATURE

P

DM

t

1

t

2

NOTES:
DUTY FACTOR: D = t
PEAK TJ= PDM x Z

-2

10

0.1 1 10

θJC

1/t2

+ T

C

4-174

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

IRF520

Typical Performance Curves Unless Otherwise Specified (Continued)

100

10

1

, DRAIN CURRENT (A)

D

I

0.1

OPERATION IN THIS
AREA IS LIMITED
BY r

DS(ON)

TC = 25oC
TJ= MAX RATED
SINGLE PULSE

VDS, DRAIN TO SOURCE VOLTAGE (V)

10µs

100µs

1ms

10ms

10001 10 100

15

10V

VGS = 8V

12

9

6

, DRAIN CURRENT (A)

D

I

3

0

10 40

VDS, DRAIN TO SOURCE VOLTAGE (V)

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

20050

30

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

15

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

12

9

VGS= 10V

VGS= 8V

VGS= 7V

2

10

VDS ≥ 50V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

10

VGS = 7V

VGS = 6V

VGS = 5V

VGS = 4V

6

, DRAIN CURRENT (A)

D

I

3

0

123405

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS= 6V

VGS= 5V
VGS= 4V

1

, ON-STATE DRAIN CURRENT (A)

D(ON)

I

0.1

175oC

24680

VGS, GATE TO SOURCE VOLTAGE (V)

25oC

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

2.5

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

2.0

1.5

1.0

0.5

, DRAIN TO SOURCE ON RESISTANCE

0

DS(ON)

r

VGS = 10V

VGS = 20V

824

16 32040

ID, DRAIN CURRENT (A)

3.0
ID = 9.2A, VGS = 10V

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

2.4

1.8

1.2

0.6

NORMALIZED ON RESISTANCE

0

-40 -20 20 40 80 100

060-60

TJ, JUNCTION TEMPERATURE (oC)

140120

10

160 180

FIGURE 8. DRAIN TOSOURCE ON RESISTANCEvsGATE

VOLTAGE AND DRAIN CURRENT

4-175

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

IRF520

Typical Performance Curves Unless Otherwise Specified (Continued)

1.25
ID = 250µA

1.15

1.05

0.95

BREAKDOWN VOLTAGE

0.85

NORMALIZED DRAIN TO SOURCE

0.75

-60

0 180

TJ, JUNCTION TEMPERATURE (oC)

60 120

FIGURE 10. NORMALIZEDDRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

5

4

3

TJ = 25oC

TJ = 175oC

1000

800

600

400

C, CAPACITANCE (pF)

200

0

1

C

ISS

C

OSS

C

RSS

10

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = 0V, f = 1MHz
C

= CGS + C

C
C

ISS
RSS

OSS

= C

≈ CDS + C

GD

GD

GD

10

FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

100

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

10

2

2

, TRANSCONDUCTANCE (S)

1

fs

g

0

≥ 50

V

DS

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

36912015

ID, DRAIN CURRENT (A)

, SOURCE TO DRAIN CURRENT (A)

SD

I

TJ = 175oC

1

0.1
0 0.4 1.2 1.6 2.00.8

VSD, SOURCE TO DRAIN VOLTAGE (V)

TJ = 25oC

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

20

ID = 9.2A

16

12

8

4

, GATE TO SOURCE VOLTAGE (V)

GS

V

0

36912015

Qg, GATE CHARGE (nC)

VDS = 20V
V

= 50V

DS

= 80V

V

DS

4-176

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

IRF520

Test Circuits and Waveforms

V

DS

BV

DSS

L

VARY t

TO OBTAIN

P

REQUIRED PEAK I

V

GS

AS

R

G

+

V

DD

-

DUT

0V

P

I

AS

0.01Ω

0

t

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

t

P

I

AS

t

AV

V

DS

V

DD

t

ON

t

d(ON)

t

R

L

+

V

R

G

DD

-

V

DS

0

r

90%

10%

DUT

V

GS

V

GS

10%

0

50%

PULSE WIDTH

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

V

DS

(ISOLATED
SUPPLY)

SAME TYPE
AS DUT

V

DD

Q

g(TOT)

Q

gd

Q

gs

12V

BATTERY

0.2µF

50kΩ

CURRENT

REGULATOR

0.3µF

t

d(OFF)

90%

V

GS

t

OFF

50%

t

f

90%

10%

D

V

DS

G

I

0

g(REF)

IG CURRENT

SAMPLING

RESISTOR RESISTOR

DUT

S

CURRENT

I

D

SAMPLING

0

V

DS

I

G(REF)

0

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

4-177

IRF520

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