Advanced Process Technology
Ultra Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
P-Channel
Fully Avalanche Rated
Lead-Free
G
HEXFET® Power MOSFET
D
V
= -55V
DSS
R
S
= 0.02Ω
DS(on)
ID = -74A
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use
in a wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power
dissipation levels to approximately 50 watts. The low
TO-220AB
thermal resistance and low package cost of the TO220 contribute to its wide acceptance throughout the
industry.
Absolute Maximum Ratings
ParameterMax.Units
ID @ TC = 25°CContinuous Drain Current, VGS @ -10V-74
ID @ TC = 100°CContinuous Drain Current, VGS @ -10V-52A
I
DM
PD @TC = 25°CPower Dissipation200W
V
GS
E
AS
I
AR
E
AR
dv/dtPeak Diode Recovery dv/dt -5.0V/ns
T
J
T
STG
Pulsed Drain Current -260
Linear Derating Factor1.3W/°C
Gate-to-Source Voltage ± 20V
Single Pulse Avalanche Energy930mJ
Avalanche Current-38A
Repetitive Avalanche Energy20mJ
Operating Junction and-55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds300 (1.6mm from case )
Mounting torque, 6-32 or M3 screw10 lbf•in (1.1N•m)
and center of die contact
Input Capacitance––– 3400 –––VGS = 0V
Output Capacitance––– 1400 –––pFVDS = -25V
Reverse Transfer Capacitance–––640–––ƒ = 1.0MHz, See Fig. 5
Diode Forward Voltage––– ––– -1.6VTJ = 25°C, IS = -38A, VGS = 0V
Reverse Recovery Time–––89130nsTJ = 25°C, IF = -38A
Reverse Recovery Charge––– 230 350nCdi/dt = -100A/µs
Forward Turn-On TimeIntrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
I
≤ -38A, di/dt ≤ -270A/µs, V
SD
TJ ≤ 175°C
= 25°C, L = 1.3mH
J
= -38A. (See Figure 12)
AS
Pulse width ≤ 300µs; duty cycle ≤ 2%.
-74
-260
showing the
A
p-n junction diode.
DD
≤ V
(BR)DSS
D
G
S
,
Page 3
IRF4905PbF
A
A
A
A
1000
VGS
TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTT OM - 4. 5V
100
10
D
-I , Drain-to-Source Current (A)
-4.5V
20µs PULSE WIDTH
T = 25°C
1
0.1110100
-V , Drain-to-Source Voltage (V)
DS
c
Fig 1. Typical Output Characteristics
1000
1000
VGS
TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
100
10
D
-I , Drain-to-Source Current (A)
-4.5V
20µs PULSE WIDTH
T = 175°C
1
0.1110100
-V , Drain-to-Source Voltage (V)
DS
C
Fig 2. Typical Output Characteristics
2.0
I = -64A
D
T = 25°C
100
10
D
-I , Drain-to-Source Current (A)
1
45678910
-V , Gate-to-Source Voltage (V)
GS
J
T = 175°C
J
V = -25V
DS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
1.5
1.0
(Normalized)
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature (°C)
J
Fig 4. Normalized On-Resistance
Vs. Temperature
V = -10V
GS
Page 4
IRF4905PbF
A
A
A
A
7000
6000
5000
4000
3000
C, Capacitance (pF)
2000
1000
0
110100
V = 0V, f = 1MHz
GS
C = C + C , C SHORTED
iss gs gd ds
C = C
rss gd
C = C + C
oss ds gd
C
iss
C
oss
C
rss
-V , Drain-to-Source Voltage (V)
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
20
I = -38A
D
V = -44V
16
12
GS
8
4
DS
V = -28V
DS
-V , Gate-to-Source Voltage (V)
FOR TEST CIRCUIT
0
04080120160200
Q , Total Gate Charge (nC)
G
SEE FIGURE 13
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
100
T = 175°C
J
T = 25°C
J
10
SD
-I , Reverse Drain Current (A)
1
0.40.60.81.01.21.41.61.8
-V , Source-to-Drain Voltage (V)
SD
V = 0V
Fig 7. Typical Source-Drain Diode
Forward Voltage
GS
100
10
D
-I , Drain Current (A)
T = 25°C
C
T = 175°C
J
Single Pulse
1
110100
-V , Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
100µs
1ms
10ms
Page 5
IRF4905PbF
80
60
40
D
I , Drain Current (A)
20
0
255075100125150175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
1
R
D.U.T.
D
-
+
V
DS
V
GS
R
G
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
GS
10%
90%
V
DS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
V
DD
D = 0.50
thJC
0.20
0.1
0.10
P
1 2
DM
t
1
t
2
0.05
Thermal Response (Z )
0.02
0.01
0.01
0.000010.00010.0010.010.1 1
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
2. Peak T = Px Z+ T
t , Rectangular Pulse Duration (sec)
1
JDMthJCC
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Page 6
IRF4905PbF
(BR)
A
A
L
D.U.T
I
AS
0.01
t
p
DRIVER
Ω
15V
V
DD
R
V
G
-20V
DS
Fig 12a. Unclamped Inductive Test Circuit
I
AS
t
p
V
DSS
2500
I
TOP -16A
-27A
2000
1500
1000
500
AS
E , Single Pulse Avalanche Energy (mJ)
0
255075100125150175
Starting T , Junction Temperature (°C)
J
BOTTOM -38A
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
D
Fig 12b. Unclamped Inductive Waveforms
Q
G
-10V
Q
GS
V
G
Q
GD
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T.
-3mA
I
G
Current Sampling Resistors
V
DS
+
I
D
Fig 13b. Gate Charge Test Circuit
Page 7
IRF4905PbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
+
-
-
+
R
G
V
GS
• dv/dt controlled by R
• ISD controlled by Duty Factor "D"
G
• D.U.T. - Device Under Test
+
V
DD
-
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D =
P. W .
Period
VGS=10V
[ ] ***
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. ISDWaveform
Body Diode Forward
Current
D.U.T. VDSWaveform
Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5%
*** V
= 5.0V for Logic Level and 3V Drive Devices
GS
di/dt
Diode Recovery
dv/dt
Fig 14. For P-Channel HEXFETS
V
DD
[ ]
I
[ ]
SD
Page 8
IRF4905PbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
2.87 (. 113)
2.62 (. 103)
15.24 (.600)
14.84 (.584)
14.09 (. 555)
13.47 (. 530)
10.54 (.415)
10.29 (.405)
1 2 3
3.78 (.1 49)
3.54 (.1 39)
- A -
6.47 (.255)
6.10 (.240)
4
1.15 (.0 45)
MIN
4.06 ( .160)
3.55 ( .140)
4.69 (.1 85)
4.20 (.1 65)
- B -
1.32 (.052)
1.22 (.048)
HEXFET
1- GATE
2- DRAIN
3- S OURCE
4- DRAIN
LEAD ASSI GNMENTS
LEAD ASSIGNMENTS 1 -GATE 2 -DRAIN 3 -SOURCE 4 -DRAIN
IGBTs, C oPACK
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
0.93 (. 037)
3X
1.40 (.055)
3X
1.15 (.045)
2.54 (.1 00)
NOTES:
1 DIMENSION ING & TOLER ANC ING PER AN SI Y14.5M, 19 82. 3 OUTLIN E CONFO RMS TO JEDE C OUTLINE T O-22 0AB .
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
2X
0.69 (. 027)
0.36 (.014 ) M B A M
0.55 (. 022)
3X
0.46 (. 018)
2.92 (. 115)
2.64 (. 104)
TO-220AB Part Marking Information
EXAMPLE:
THIS IS AN IRF1010
LOT CODE 1789
ASSEMB LED O N WW 19 , 1997
IN THE ASSEM BLY LINE "C"
Note: "P" in assembly line
position indicates "Lead-Free"
INTER NATION AL
RECTIFIER
LOGO
ASSEMBLY
LOT C ODE
Data and specifications subject to change without notice.
PART NUM BER
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.11/03
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