Datasheet IRF443, IRF441, IRF440, IRF442 Datasheet (Intersil)

IRF440

Data Sheet March 1999

8A, 500V, 0.850 Ohm, N-Channel
Power MOSFET

This N-Channel enhancementmode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdownavalanchemodeof operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.

Formerly developmental type TA17425.

Ordering Information

PART NUMBER PACKAGE BRAND

IRF440 TO-204AE IRF440

NOTE: When ordering, use the entire part number .

File Number

Features

• 8A, 500V

•r

• Single Pulse Avalanche Energy Rated

• SOA is Power-Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Majority Carrier Device

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

= 0.850Ω

DS(ON)

Components to PC Boards”

Symbol

D

2308.3

Packaging

DRAIN
(FLANGE)

GATE (PIN 1)

G

S

JEDEC TO-204AE

SOURCE (PIN 2)

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

IRF440

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

IRF440 UNITS

Drain To Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain To Gate Voltage (RGS = 20kΩ) (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DGR

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

TC= 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Gate To Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

DS

D
D

DM

GS

D

500 V
500 V

8.0

5.0
32 A

±20 V
125 W

A
A

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0 W/oC

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ,T

AS

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

510 A

-55 to 150

300
260

o

C

o

C

o

C

NOTE:

1. TJ= 25oC to 125oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain To Source Breakdown Voltage BV
Gate Threshold Voltage V
Zero Gate Voltage Drain Current I

On-State Drain Current (Note 2) I
Gate to Source Leakage Current I
Drain to Source On Resistance (Note 2) r
Forward Transconductance (Note 2) g
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Total Gate Charge

DSSID

GS(TH)VDS

DSS

D(ON)VDS

GSS

DS(ON)ID

fs

d(ON)VDD

r

d(OFF)

f

Q

g(TOT)VGS

(Gate to Source + Gate to Drain)
Gate to Source Charge Qgs - 9 - nC
Gate to Drain “Miller” Charge Q
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Internal Drain Inductance L

Internal Source Inductance L

Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R

gd

ISS
OSS
RSS

D

S

θJC

θJA

= 250µA, VGS = 0V (Figure 10) 500 - - V

= VGS, ID = 250µA 2.0 - 4.0 V
VDS = Rated BV
VDS = 0.8 x Rated BV

> I

D(ON)

, VGS = 0V - - 25 µA

DSS

, VGS = 0V, TJ = 125oC - - 250 µA

DSS

x r

DS(ON)MAX

, VGS = 10V 8.0 - - A

VGS = ±20V - - ±100 nA

= 4.4A, VGS = 10V (Figures 8, 9) - 0.70 0.850 Ω

VDS = 50V, ID = 4.4A (Figure 12) 4.9 7.5 - S

= 250V, I
(Figure 17, 18) MOSFET Switching Times are
Essentially Independent of Operating Temperature

≈ 8.0A, R

D

= 9.1Ω, RL = 30Ω,

G

-1521ns

-2235ns

-4974ns

-2030ns

= 10V, ID = 8.0A, VDS = 0.8 x Rated BV
I

= 1.5mA (Figures 14, 19, 20) Gate Charge is

g(REF)

DSS

,

-4263nC

Essentially Independent of Operating Temperature

-22-nC

VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) - 1225 - pF

- 200 - pF

-85-pF

Measured between the
Contact Screw on Header
thatis Closer to Sourceand
Gate Pins and Center of
Die

Measured from the Source
Lead, 6mm (0.25in) from
Header and Source
Bonding Pad

Modified MOSFET
Symbol Showing the
Internal Device
Inductances

D

L

D

G

L

S

S

- 5.0 - nH

- 12.5 - nH

- - 1.0oC/W

Free Air Operation - - 30

o

C/W

2

IRF440

Source To Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current I
Pulse Source to Drain Current

I

SDM

(Note 3)

Drain to Source Diode Voltage (Note 2) V
Reverse Recovery Time t
Reverse Recovery Charge Q

NOTE:

2. Pulse Test: Pulse Width ≤ 300µs, Duty Cycle ≤ 2%.

3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance Curve (Figure 3).

4. VDD = 50V, starting TJ = 25oC, L = 14mH, RG = 25Ω, peak IAS = 8.0A (Figures 15, 16).

Modified MOSFET Symbol

SD

Showing the Integral
Reverse P-N Junction

D

- - 8.0 A

- - 32 A

Rectifier

G

S

TJ = 25oC, ISD = 8.0A, VGS = 0V (Figure 13) - - 2.0 V

SD

TJ = 25oC, ISD = 8.0A, dISD/dt = 100A/µs 210 460 970 ns

rr

TJ = 25oC, ISD = 8.0A, dISD/dt = 100A/µs 2 4 8.9 µC

RR

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 50 100 150

TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

2
1

0.5

0.2

0.1

0.1

0.05

0.02

10

, TRANSIENT THERMAL IMPEDANCE

θJC

Z

10

0.01

-2

-3

-5

10

SINGLE PULSE

-4

10

-3

10

RECTANGULAR PULSE DURATION (s)

10

8

6

4

, DRAIN CURRENT (A)

D

I

2

0

25 50 75 100 125 150

TC, CASE TEMPERATURE (oC)

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

P

DM

t

1

t

2

NOTES:
DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-2

10

0.1 1 10

θJC

1/t2

x R

θJC

+ T

C

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

3

IRF440

Typical Performance Curves

2

10

10

OPERATION IN

1

, DRAIN CURRENT (A)

D

I

0.1
110

THIS AREA LIMITED
BY r

TC = 25oC
T

= 150oC

J

SINGLE PULSE

VDS, DRAIN TO SOURCE VOLTAGE (V)

DS(ON)

(Continued)

2

10

10µs

100µs

1ms

10ms

DC

10

15

VGS = 10V

12

9

6

, DRAIN CURRENT (A)

D

I

3

0

3

0 50 100 150 200 250

, DRAIN TO SOURCE VOLTAGE (V)

V

DS

80µs PULSE TEST

VGS = 4V

VGS = 6V

VGS = 5.5V

VGS = 5V

VGS = 4.5V

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

15

80µs PULSE TEST

12

VGS = 10V

10

VDS≥ 50V
80µs PULSE TEST

9

6

, DRAIN CURRENT (A)

D

I

3

VGS = 4V

0

0 3 6 9 12 15

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = 6V

VGS = 5.5V

VGS = 5V

VGS = 4.5V

1

CURRENT (A)

, DRAIN TO SOURCE

0.1

DS(ON)

I

-2

10

TJ = 150oC

0246810

V

, GATE TO SOURCE VOLTAGE (V)

GS

TJ = 25oC

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

10

80µs PULSE TEST

8

VGS = 10V

6

4

, DRAIN TO SOURCE

ON RESISTANCE

2

DS(ON)

r

0

0 8 16 24 32 40

I

, DRAIN CURRENT (A)

D

VGS = 20V

3.0
ID = 8.0A

= 10V

V

GS

2.4

1.8

1.2

ON RESISTANCE

0.6

NORMALIZED DRAIN TO SOURCE

0

-60 0 60 120 180
T

, JUNCTION TEMPERATURE (oC)

J

FIGURE 8. DRAIN TOSOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT

4

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

IRF440

Typical Performance Curves

1.25
ID = 250µA

1.15

1.05

0.95

BREAKDOWN VOLTAGE

0.85

NORMALIZED DRAIN TO SOURCE

0.75

-60 0 60 120 180
, JUNCTION TEMPERATURE (oC)

T

J

(Continued)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

15

VDS≥ 50V
80µs PULSE TEST

12

9

TJ = 25oC

3000

2400

1800

1200

C, CAPACITANCE (pF)

600

0

110

V

C

ISS

C

OSS

C

RSS

, DRAIN TO SOURCE VOLTAGE (V)

DS

VGS = 0V, f = 1MHz

= CGS + C

C
C
C

ISS
RSS
OSS

= C

≈ C

GD

DS

GD

+ C

GS

100

FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

100

10

6

, TRANSCONDUCTANCE (S)

3

fs

g

0

0 3 6 9 12 15

, DRAIN CURRENT (A)

I

D

TJ = 150oC

1

, SOURCE TO DRAIN CURRENT (A)

SD

I

0.1
0 0.3 0.6 0.9 1.2 1.5

TJ = 150oC

V

, SOURCE TO DRAIN VOLTAGE (V)

SD

TJ = 25oC

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

20

ID = 8.0A

16

12

8

4

, GATE TO SOURCE VOLTAGE (V)

GS

V

0

0 1224364860

Q

, TOTAL GATE CHARGE (nC)

g(TOT)

VDS = 400V
V

= 250V

DS

V

= 100V

DS

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

5

IRF440

Test Circuits and Waveforms

V

DS

t

I

AS

VARY t

TO OBTAIN

P

REQUIRED PEAK I

V

GS

AS

L

R

G

+

V

DD

-

DUT

0V

P

I

AS

0

t

0.01Ω

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

BV

DSS

P

t

AV

V

DS

V

DD

R

G

V

GS

FIGURE 17. SWITCHING TIME TEST CIRCUIT

CURRENT

REGULATOR

12V

BATTERY

0.2µF

50kΩ

0.3µF

t

ON

t

d(ON)

t

V

R

L

+

V

DD

-

DUT

DS

0

V

GS

0

90%

10%

r

10%

50%

PULSE WIDTH

t

d(OFF)

90%

t

OFF

50%

t

f

90%

10%

FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

V

DS

(ISOLATED
SUPPLY)

SAME TYPE
AS DUT

V

DD

Q

g(TOT)

Q

gd

Q

gs

V

GS

G

I

0

g(REF)

IG CURRENT

SAMPLING

RESISTOR RESISTOR

FIGURE 19. GATE CHARGE TEST CIRCUIT

6

D

S

CURRENT

I

D

SAMPLING

DUT

V

DS

0

I

V

DS

g(REF)

0

FIGURE 20. GATE CHARGE WAVEFORMS

IRF440

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